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inline-lrint_1.c: Broaden regexp.

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2017-06-12  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/inline-lrint_1.c: Broaden regexp.
	* gcc.target/aarch64/inline-lrint_2.c: Likewise.
	* gcc.target/aarch64/no-inline-lrint_1.c: Likewise.
	* gcc.target/aarch64/no-inline-lrint_2.c: Likewise.

From-SVN: r249127
This commit is contained in:
Tamar Christina 2017-06-12 14:23:22 +00:00 committed by Tamar Christina
parent 5ed2fdfee4
commit 64ff4f60d0
5 changed files with 13 additions and 14 deletions
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7
gcc/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2017-06-12 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/inline-lrint_1.c: Broaden regexp.
* gcc.target/aarch64/inline-lrint_2.c: Likewise.
* gcc.target/aarch64/no-inline-lrint_1.c: Likewise.
* gcc.target/aarch64/no-inline-lrint_2.c: Likewise.
2017-06-12 Tamar Christina <tamar.christina@arm.com>
* gcc.target/arm/sdiv_costs_1.c: Require arm_v8_vfp_ok.

6
gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c
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@ -13,8 +13,6 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-not "bl" } } */

8
gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
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@ -13,10 +13,6 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, d\[0-9\]+" 2 } } */
/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, s\[0-9\]+" 2 } } */
/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-times "fcvtzs\t\[w,x\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-not "bl" } } */

3
gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c
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@ -13,8 +13,7 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */
/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
/* { dg-final { scan-assembler-not "fcvtzs" } } */

3
gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c
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@ -13,8 +13,7 @@ TEST (fif, float , int, )
TEST (dlld, double, long long, l)
TEST (fllf, float , long long, l)
/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */
/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
/* { dg-final { scan-assembler-not "fcvtzs" } } */