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altivec.md (altivec_dst): Make the first operand a REG, not a MEM.

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2005-02-02  Geoffrey Keating  <geoffk@apple.com>

	* config/rs6000/altivec.md (altivec_dst): Make the first operand
	a REG, not a MEM.
	(altivec_dstt): Likewise.
	(altivec_dstst): Likewise.
	(altivec_dststt): Likewise.
	* config/rs6000/rs6000.c (altivec_expand_dst_builtin): Adjust creation
	of first operand.

Index: testsuite/ChangeLog
2005-02-02  Geoffrey Keating  <geoffk@apple.com>

	* gcc.dg/altivec-19.c: New.

From-SVN: r94652
This commit is contained in:
Geoffrey Keating 2005-02-03 06:36:02 +00:00 committed by Geoffrey Keating
parent cce4ca5559
commit 666158b9ce
4 changed files with 27 additions and 13 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2005-02-02 Geoffrey Keating <geoffk@apple.com>
* config/rs6000/altivec.md (altivec_dst): Make the first operand
a REG, not a MEM.
(altivec_dstt): Likewise.
(altivec_dstst): Likewise.
(altivec_dststt): Likewise.
* config/rs6000/rs6000.c (altivec_expand_dst_builtin): Adjust creation
of first operand.
2005-02-03 Dorit Naishlos <dorit@il.ibm.com>
* tree-vectorizer.c (slpeel_make_loop_iterate_ntimes): Copy

24
gcc/config/rs6000/altivec.md
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@ -1542,35 +1542,35 @@
[(set_attr "type" "vecsimple")])
(define_insn "altivec_dst"
[(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
[(unspec [(match_operand 0 "register_operand" "b")
(match_operand:SI 1 "register_operand" "r")
(match_operand:QI 2 "immediate_operand" "i")] 190)]
"TARGET_ALTIVEC"
"dst %P0,%1,%2"
"TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
"dst %0,%1,%2"
[(set_attr "type" "vecsimple")])
(define_insn "altivec_dstt"
[(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
[(unspec [(match_operand 0 "register_operand" "b")
(match_operand:SI 1 "register_operand" "r")
(match_operand:QI 2 "immediate_operand" "i")] 191)]
"TARGET_ALTIVEC"
"dstt %P0,%1,%2"
"TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
"dstt %0,%1,%2"
[(set_attr "type" "vecsimple")])
(define_insn "altivec_dstst"
[(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
[(unspec [(match_operand 0 "register_operand" "b")
(match_operand:SI 1 "register_operand" "r")
(match_operand:QI 2 "immediate_operand" "i")] 192)]
"TARGET_ALTIVEC"
"dstst %P0,%1,%2"
"TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
"dstst %0,%1,%2"
[(set_attr "type" "vecsimple")])
(define_insn "altivec_dststt"
[(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
[(unspec [(match_operand 0 "register_operand" "b")
(match_operand:SI 1 "register_operand" "r")
(match_operand:QI 2 "immediate_operand" "i")] 193)]
"TARGET_ALTIVEC"
"dststt %P0,%1,%2"
"TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
"dststt %0,%1,%2"
[(set_attr "type" "vecsimple")])
(define_insn "altivec_lvsl"

2
gcc/config/rs6000/rs6000.c
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@ -7225,7 +7225,7 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
}
if (! (*insn_data[d->icode].operand[0].predicate) (op0, mode0))
op0 = gen_rtx_MEM (mode0, copy_to_mode_reg (Pmode, op0));
op0 = copy_to_mode_reg (Pmode, op0);
if (! (*insn_data[d->icode].operand[1].predicate) (op1, mode1))
op1 = copy_to_mode_reg (mode1, op1);

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2005-02-02 Geoffrey Keating <geoffk@apple.com>
* gcc.dg/altivec-19.c: New.
2005-02-03 Joseph S. Myers <joseph@codesourcery.com>
PR c/17807