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locks.h (compare_and_swap): Use __sync_bool_compare_and_swap.

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* sysdep/m68k/locks.h (compare_and_swap): Use
__sync_bool_compare_and_swap.
(release_set): Use write_barrier instead of inlining it.

From-SVN: r188650
This commit is contained in:
Andreas Schwab 2012-06-15 08:08:04 +00:00 committed by Andreas Schwab
parent 6d017004b1
commit 6724292e72
2 changed files with 32 additions and 30 deletions
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6
libjava/ChangeLog
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@ -1,3 +1,9 @@
2012-06-15 Andreas Schwab <schwab@linux-m68k.org>
* sysdep/m68k/locks.h (compare_and_swap): Use
__sync_bool_compare_and_swap.
(release_set): Use write_barrier instead of inlining it.
2012-06-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* sysdep/s390/locks.h (compare_and_swap, release_set)

56
libjava/sysdep/m68k/locks.h
View File

@ -1,6 +1,6 @@
// locks.h - Thread synchronization primitives. m68k implementation.
/* Copyright (C) 2006 Free Software Foundation
/* Copyright (C) 2006, 2012 Free Software Foundation
This file is part of libgcj.
@ -22,35 +22,7 @@ static inline bool
compare_and_swap(volatile obj_addr_t *addr,
obj_addr_t old, obj_addr_t new_val)
{
char result;
__asm__ __volatile__("cas.l %2,%3,%0; seq %1"
: "+m" (*addr), "=d" (result), "+d" (old)
: "d" (new_val)
: "memory");
return (bool) result;
}
// Set *addr to new_val with release semantics, i.e. making sure
// that prior loads and stores complete before this
// assignment.
// On m68k, the hardware shouldn't reorder reads and writes,
// so we just have to convince gcc not to do it either.
static inline void
release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
{
__asm__ __volatile__(" " : : : "memory");
*(addr) = new_val;
}
// Compare_and_swap with release semantics instead of acquire semantics.
// On many architecture, the operation makes both guarantees, so the
// implementation can be the same.
static inline bool
compare_and_swap_release(volatile obj_addr_t *addr,
obj_addr_t old,
obj_addr_t new_val)
{
return compare_and_swap(addr, old, new_val);
return __sync_bool_compare_and_swap (addr, old, new_val);
}
// Ensure that subsequent instructions do not execute on stale
@ -69,4 +41,28 @@ write_barrier(void)
// m68k does not reorder writes. We just need to ensure that gcc also doesn't.
__asm__ __volatile__(" " : : : "memory");
}
// Set *addr to new_val with release semantics, i.e. making sure
// that prior loads and stores complete before this
// assignment.
// On m68k, the hardware shouldn't reorder reads and writes,
// so we just have to convince gcc not to do it either.
static inline void
release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
{
write_barrier ();
*addr = new_val;
}
// Compare_and_swap with release semantics instead of acquire semantics.
// On many architecture, the operation makes both guarantees, so the
// implementation can be the same.
static inline bool
compare_and_swap_release(volatile obj_addr_t *addr,
obj_addr_t old,
obj_addr_t new_val)
{
return compare_and_swap(addr, old, new_val);
}
#endif