Optimize (double)(long) to generate FRIZ if -ffast-math
From-SVN: r163786
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@ -1,3 +1,16 @@
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2010-09-02 Michael Meissner <meissner@linux.vnet.ibm.com>
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* config/rs6000/rs6000.opt (-mfriz): New switch to control whether
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to convert (double)(long) into a single FRIZ instruction or not
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when -ffast-math is used.
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* config/rs6000/vsx.md (VSX_DF): New iterator for DF/V2DF modes.
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(vsx_float_fix_<mode>2): Optimize (double)(long) into X{S,V}RDPIZ
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or FRIZ instruction if -ffast-math.
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* config/rs6000/rs6000.md (friz): Ditto.
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* doc/invoke.texi (RS/6000 and PowerPC Options): Document -mfriz.
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2010-09-02 Joseph Myers <joseph@codesourcery.com>
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* opth-gen.awk (quote, comma): Remove unused variables.
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@ -6983,6 +6983,18 @@
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"fctiwuz %0,%1"
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[(set_attr "type" "fp")])
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;; Only optimize (float (fix x)) -> frz if we are in fast-math mode, since
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;; since the friz instruction does not truncate the value if the floating
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;; point value is < LONG_MIN or > LONG_MAX.
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(define_insn "*friz"
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[(set (match_operand:DF 0 "gpc_reg_operand" "=d")
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(float:DF (fix:DI (match_operand:DF 1 "gpc_reg_operand" "d"))))]
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"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_POPCNTB
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&& !VECTOR_UNIT_VSX_P (DFmode) && flag_unsafe_math_optimizations
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&& !flag_trapping_math && TARGET_FRIZ"
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"friz %0,%1"
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[(set_attr "type" "fp")])
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;; No VSX equivalent to fctid
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(define_insn "lrint<mode>di2"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=d")
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@ -1,6 +1,7 @@
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; Options for the rs6000 port of the compiler
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;
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; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
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; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010 Free Software
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; Foundation, Inc.
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; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
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;
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; This file is part of GCC.
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@ -115,6 +116,10 @@ mpopcntd
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Target Report Mask(POPCNTD)
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Use PowerPC V2.06 popcntd instruction
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mfriz
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Target Report Var(TARGET_FRIZ) Init(-1)
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Under -ffast-math, generate a FRIZ instruction for (double)(long long) conversions
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mveclibabi=
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Target RejectNegative Joined Var(rs6000_veclibabi_name)
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Vector library ABI to use
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@ -28,6 +28,9 @@
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;; Iterator for the 2 32-bit vector types
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(define_mode_iterator VSX_W [V4SF V4SI])
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;; Iterator for the DF types
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(define_mode_iterator VSX_DF [V2DF DF])
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;; Iterator for vector floating point types supported by VSX
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(define_mode_iterator VSX_F [V4SF V2DF])
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@ -1053,6 +1056,22 @@
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"VECTOR_UNIT_VSX_P (V2DFmode)"
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"xvcvspuxds %x0,%x1"
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[(set_attr "type" "vecfloat")])
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;; Only optimize (float (fix x)) -> frz if we are in fast-math mode, since
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;; since the xsrdpiz instruction does not truncate the value if the floating
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;; point value is < LONG_MIN or > LONG_MAX.
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(define_insn "*vsx_float_fix_<mode>2"
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[(set (match_operand:VSX_DF 0 "vsx_register_operand" "=<VSr>,?wa")
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(float:VSX_DF
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(fix:<VSI>
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(match_operand:VSX_DF 1 "vsx_register_operand" "<VSr>,?wa"))))]
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"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT
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&& VECTOR_UNIT_VSX_P (<MODE>mode) && flag_unsafe_math_optimizations
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&& !flag_trapping_math && TARGET_FRIZ"
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"x<VSv>r<VSs>iz %x0,%x1"
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[(set_attr "type" "<VStype_simple>")
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(set_attr "fp_type" "<VSfptype_simple>")])
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;; Logical and permute operations
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(define_insn "*vsx_and<mode>3"
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@ -789,7 +789,7 @@ See RS/6000 and PowerPC Options.
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-msdata=@var{opt} -mvxworks -G @var{num} -pthread @gol
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-mrecip -mrecip=@var{opt} -mno-recip -mrecip-precision
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-mno-recip-precision @gol
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-mveclibabi=@var{type}}
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-mveclibabi=@var{type} -mfriz -mno-friz}
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@emph{RX Options}
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@gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol
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@ -15931,6 +15931,15 @@ GCC will currently emit calls to @code{acosd2}, @code{acosf4},
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for power7. Both @option{-ftree-vectorize} and
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@option{-funsafe-math-optimizations} have to be enabled. The MASS
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libraries will have to be specified at link time.
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@item -mfriz
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@itemx -mno-friz
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@opindex mfriz
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Generate (do not generate) the @code{friz} instruction when the
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@option{-funsafe-math-optimizations} option is used to optimize
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rounding a floating point value to 64-bit integer and back to floating
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point. The @code{friz} instruction does not return the same value if
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the floating point number is too large to fit in an integer.
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@end table
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@node RX Options
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@ -1,3 +1,9 @@
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2010-09-02 Michael Meissner <meissner@linux.vnet.ibm.com>
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* gcc.target/powerpc/ppc-fpconv-10.c: New file to test generating
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FRIZ/XSRIZ instruciton for (double)(long long)x.
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* gcc.target/powerpc/ppc-fpconv-11.c: Ditto.
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2010-09-02 Eric Botcazou <ebotcazou@adacore.com>
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* g++.dg/debug/dwarf2/nested-2.C: Allow for ! as comment delimiter.
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@ -0,0 +1,11 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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/* { dg-options "-O2 -mcpu=power7 -ffast-math" } */
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/* { dg-final { scan-assembler "xsrdpiz" } } */
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/* { dg-final { scan-assembler-not "friz" } } */
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double round_double_llong (double a)
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{
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return (double)(long long)a;
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}
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@ -0,0 +1,10 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
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/* { dg-options "-O2 -mcpu=power5 -ffast-math" } */
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/* { dg-final { scan-assembler-not "xsrdpiz" } } */
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/* { dg-final { scan-assembler "friz" } } */
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double round_double_llong (double a)
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{
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return (double)(long long)a;
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}
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