AVX Programming Reference (January, 2009)
gcc/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * config/i386/sse.md (*vpclmulqdq): New. gcc/testsuite/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * gcc.target/i386/avx-vpclmulqdq.c: New. * gcc.target/i386/pclmul-avx-check.h: Likewise. * gcc.target/i386/i386.exp (check_effective_target_vpclmul): New. * gcc.target/i386/pclmulqdq.c (CHECK_H): New. (TEST): Likewise. Include CHECK_H instead of "pclmul-check.h". (pclmul_test): Renamed to ... (TEST): This. From-SVN: r143938
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@ -1,3 +1,8 @@
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2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
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AVX Programming Reference (January, 2009)
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* config/i386/sse.md (*vpclmulqdq): New.
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2009-02-04 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/38977
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@ -11509,6 +11509,18 @@
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(set_attr "prefix" "maybe_vex")
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(set_attr "mode" "TI")])
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(define_insn "*vpclmulqdq"
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[(set (match_operand:V2DI 0 "register_operand" "=x")
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(unspec:V2DI [(match_operand:V2DI 1 "register_operand" "x")
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(match_operand:V2DI 2 "nonimmediate_operand" "xm")
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(match_operand:SI 3 "const_0_to_255_operand" "n")]
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UNSPEC_PCLMUL))]
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"TARGET_PCLMUL && TARGET_AVX"
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"vpclmulqdq\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "type" "sselog1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "TI")])
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(define_insn "pclmulqdq"
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[(set (match_operand:V2DI 0 "register_operand" "=x")
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(unspec:V2DI [(match_operand:V2DI 1 "register_operand" "0")
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@ -1,3 +1,17 @@
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2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
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AVX Programming Reference (January, 2009)
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* gcc.target/i386/avx-vpclmulqdq.c: New.
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* gcc.target/i386/pclmul-avx-check.h: Likewise.
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* gcc.target/i386/i386.exp (check_effective_target_vpclmul): New.
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* gcc.target/i386/pclmulqdq.c (CHECK_H): New.
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(TEST): Likewise.
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Include CHECK_H instead of "pclmul-check.h".
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(pclmul_test): Renamed to ...
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(TEST): This.
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2009-02-04 Jakub Jelinek <jakub@redhat.com>
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PR c++/39095
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8
gcc/testsuite/gcc.target/i386/avx-vpclmulqdq.c
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8
gcc/testsuite/gcc.target/i386/avx-vpclmulqdq.c
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/* { dg-do run } */
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/* { dg-require-effective-target vpclmul } */
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/* { dg-options "-O2 -mpclmul -mavx" } */
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#define CHECK_H "pclmul-avx-check.h"
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#define TEST pclmul_avx_test
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#include "pclmulqdq.c"
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@ -92,6 +92,21 @@ proc check_effective_target_pclmul { } {
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} "-O2 -mpclmul" ]
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}
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# Return 1 if vpclmul instructions can be compiled.
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proc check_effective_target_vpclmul { } {
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return [check_no_compiler_messages vpclmul object {
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typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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__m128i pclmulqdq_test (__m128i __X, __m128i __Y)
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{
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return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
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(__v2di)__Y,
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1);
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}
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} "-O2 -mpclmul -mavx" ]
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}
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# Return 1 if sse4a instructions can be compiled.
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proc check_effective_target_sse4a { } {
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return [check_no_compiler_messages sse4a object {
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31
gcc/testsuite/gcc.target/i386/pclmul-avx-check.h
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31
gcc/testsuite/gcc.target/i386/pclmul-avx-check.h
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#ifdef DEBUG
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#include <stdio.h>
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#endif
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#include <stdlib.h>
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#include "cpuid.h"
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static void pclmul_avx_test (void);
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int
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main ()
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run PCLMUL + AVX test only if host has PCLMUL + AVX support. */
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if ((ecx & (bit_AVX | bit_PCLMUL)) == (bit_AVX | bit_PCLMUL))
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{
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pclmul_avx_test ();
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#ifdef DEBUG
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printf ("PASSED\n");
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#endif
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}
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#ifdef DEBUG
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else
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printf ("SKIPPED\n");
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#endif
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return 0;
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}
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/* { dg-require-effective-target pclmul } */
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/* { dg-options "-O2 -mpclmul" } */
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#ifndef CHECK_H
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#define CHECK_H "pclmul-check.h"
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#endif
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#ifndef TEST
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#define TEST pclmul_test
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#endif
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#include CHECK_H
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#include <wmmintrin.h>
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#include <string.h>
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#include "pclmul-check.h"
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extern void abort (void);
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#define NUM 1024
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@ -54,7 +62,7 @@ init_data (__m128i *ls1, __m128i *ls2, __m128i *le_00, __m128i *le_01,
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}
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static void
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pclmul_test (void)
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TEST (void)
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{
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int i;
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