re PR target/51532 (Invalid Code Generated for cpu32.)
PR target/51532 * config/m68k/m68k.h (FL_CAS, TARGET_CAS): Define. * config/m68k/m68k.c (FL_FOR_isa_20): Add FL_CAS. * config/m68k/sync.md: Use TARGET_CAS instead of (TARGET_68020 || TARGET_68040). From-SVN: r182475
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@ -1,3 +1,11 @@
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2011-12-19 Andreas Schwab <schwab@linux-m68k.org>
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PR target/51532
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* config/m68k/m68k.h (FL_CAS, TARGET_CAS): Define.
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* config/m68k/m68k.c (FL_FOR_isa_20): Add FL_CAS.
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* config/m68k/sync.md: Use TARGET_CAS instead of (TARGET_68020 ||
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TARGET_68040).
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2011-12-18 Anatoly Sokolov <aesok@post.ru>
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* config/ia64/ia64.h (REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P,
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@ -325,7 +325,7 @@ struct gcc_target targetm = TARGET_INITIALIZER;
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generated 68881 code for 68020 and 68030 targets unless explicitly told
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not to. */
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#define FL_FOR_isa_20 (FL_FOR_isa_10 | FL_ISA_68020 \
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| FL_BITFIELD | FL_68881)
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| FL_BITFIELD | FL_68881 | FL_CAS)
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#define FL_FOR_isa_40 (FL_FOR_isa_20 | FL_ISA_68040)
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#define FL_FOR_isa_cpu32 (FL_FOR_isa_10 | FL_ISA_68020)
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@ -226,6 +226,7 @@ along with GCC; see the file COPYING3. If not see
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#define FL_ISA_B (1 << 15)
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#define FL_ISA_C (1 << 16)
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#define FL_FIDOA (1 << 17)
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#define FL_CAS (1 << 18) /* Support cas insn. */
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#define FL_MMU 0 /* Used by multilib machinery. */
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#define FL_UCLINUX 0 /* Used by multilib machinery. */
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@ -236,6 +237,7 @@ along with GCC; see the file COPYING3. If not see
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#define TARGET_COLDFIRE_FPU (m68k_fpu == FPUTYPE_COLDFIRE)
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#define TARGET_68881 (m68k_fpu == FPUTYPE_68881)
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#define TARGET_FIDOA ((m68k_cpu_flags & FL_FIDOA) != 0)
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#define TARGET_CAS ((m68k_cpu_flags & FL_CAS) != 0)
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/* Size (in bytes) of FPU registers. */
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#define TARGET_FP_REG_SIZE (TARGET_COLDFIRE ? 8 : 12)
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@ -28,7 +28,7 @@
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(match_operand:SI 5 "const_int_operand" "") ;; is_weak
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(match_operand:SI 6 "const_int_operand" "") ;; success model
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(match_operand:SI 7 "const_int_operand" "")] ;; failure model
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"TARGET_68020 || TARGET_68040"
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"TARGET_CAS"
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{
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emit_insn (gen_atomic_compare_and_swap<mode>_1
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(operands[0], operands[1], operands[2],
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@ -52,7 +52,7 @@
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(unspec_volatile:QI
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[(match_dup 2) (match_dup 3) (match_dup 4)]
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UNSPECV_CAS_2))]
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"TARGET_68020 || TARGET_68040"
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"TARGET_CAS"
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;; Elide the seq if operands[0] is dead.
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"cas<sz> %1,%4,%2\;seq %0")
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@ -60,7 +60,7 @@
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[(match_operand:QI 0 "register_operand" "")
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(match_operand:QI 1 "memory_operand" "")
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(match_operand:QI 2 "general_operand" "")]
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"!(TARGET_68020 || TARGET_68040)"
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"!TARGET_CAS"
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{
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if (operands[2] != const1_rtx)
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FAIL;
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@ -76,5 +76,5 @@
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UNSPECV_TAS_1))
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(set (match_dup 1)
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(unspec_volatile:QI [(match_dup 1)] UNSPECV_TAS_2))]
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"!(TARGET_68020 || TARGET_68040)"
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"!TARGET_CAS"
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"tas %1\;sne %0")
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