re PR target/59405 (Incorrect FP<->MMX transition during call/ret)
PR target/59405 * config/i386/i386.c (type_natural_mode): Properly handle size 8 for !TARGET_64BIT. testsuite/ChangeLog: PR target/59405 * gcc.target/i386/pr59405.c: New test. From-SVN: r205753
This commit is contained in:
Uros Bizjak
parent
3fa2ccb430
commit
6b3d111345
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@ -1,6 +1,13 @@
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2013-12-06 Uros Bizjak <ubizjak@gmail.com>
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PR target/59405
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* config/i386/i386.c (type_natural_mode): Properly handle
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size 8 for !TARGET_64BIT.
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2013-12-06 Trevor Saunders <tsaunders@mozilla.com>
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* tree-ssa-pre.c (compute_antic_aux): Remove redundant call to vec::release.
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* tree-ssa-pre.c (compute_antic_aux): Remove redundant call to
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vec::release.
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2013-12-06 Ian Bolton <ian.bolton@arm.com>
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Mark Mitchell <mark@codesourcery.com>
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@ -11,8 +18,7 @@
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2013-12-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
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* expr.c (expand_assignment): Update bitregion_start and
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bitregion_end.
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* expr.c (expand_assignment): Update bitregion_start and bitregion_end.
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2013-12-06 Eric Botcazou <ebotcazou@adacore.com>
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@ -86,8 +92,7 @@
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2013-12-06 Richard Biener <rguenther@suse.de>
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PR tree-optimization/59058
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* tree-vectorizer.h (struct _loop_vec_info): Add num_itersm1
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member.
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* tree-vectorizer.h (struct _loop_vec_info): Add num_itersm1 member.
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(LOOP_VINFO_NITERSM1): New macro.
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* tree-vect-loop-manip.c (slpeel_tree_peel_loop_to_edge): Express
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the vector loop entry test in terms of scalar latch executions.
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@ -117,8 +122,7 @@
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* config/i386/i386.c (cpu_names): Add "ia".
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(processor_alias_table): Likewise.
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(ix86_option_override_internal): Disallow -march=ia.
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* config/i386/i386.h (target_cpu_default): Add
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TARGET_CPU_DEFAULT_ia.
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* config/i386/i386.h (target_cpu_default): Add TARGET_CPU_DEFAULT_ia.
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* doc/invoke.texi: Document -mtune=ia.
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@ -145,8 +149,8 @@
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(ubsan_build_overflow_builtin): Adjust ubsan_encode_value call.
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* ubsan.h (ubsan_encode_value): Adjust declaration.
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* internal-fn.c (ubsan_expand_si_overflow_addsub_check): Move
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ubsan_build_overflow_builtin above expand_normal call. Surround this call
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with push_temp_slots and pop_temp_slots.
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ubsan_build_overflow_builtin above expand_normal call. Surround
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this call with push_temp_slots and pop_temp_slots.
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(ubsan_expand_si_overflow_neg_check): Likewise.
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(ubsan_expand_si_overflow_mul_check): Likewise.
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@ -158,8 +162,8 @@
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2013-12-05 Tejas Belagod <tejas.belagod@arm.com>
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* rtlanal.c (set_noop_p): Return nonzero in case of redundant vec_select
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for overlapping register lanes.
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* rtlanal.c (set_noop_p): Return nonzero in case of redundant
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vec_select for overlapping register lanes.
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2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com>
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@ -172,7 +176,7 @@
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2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com>
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* config/i386/i386.c (IX86_BUILTIN_READ_FLAGS): New.
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* config/i386/i386.c (IX86_BUILTIN_READ_FLAGS): New.
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(IX86_BUILTIN_WRITE_FLAGS): Ditto.
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(ix86_init_mmx_sse_builtins): Define
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__builtin_ia32_writeeflags_u32, __builtin_ia32_writeeflags_u64,
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@ -188,8 +192,7 @@
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PR tree-optimization/59374
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* tree-vect-data-refs.c (vect_slp_analyze_data_ref_dependence):
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Commonize known and unknown dependence case fixing the allowed
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read-write dependence case and dropping code that should not
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matter.
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read-write dependence case and dropping code that should not matter.
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2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com>
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@ -214,8 +217,7 @@
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-fsanitize=signed-integer-overflow.
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* config/i386/i386.md (addv<mode>4, subv<mode>4, mulv<mode>4,
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negv<mode>3, negv<mode>3_1): Define expands.
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(*addv<mode>4, *subv<mode>4, *mulv<mode>4, *negv<mode>3): Define
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insns.
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(*addv<mode>4, *subv<mode>4, *mulv<mode>4, *negv<mode>3): Define insns.
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* sanitizer.def (BUILT_IN_UBSAN_HANDLE_ADD_OVERFLOW,
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BUILT_IN_UBSAN_HANDLE_SUB_OVERFLOW,
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BUILT_IN_UBSAN_HANDLE_MUL_OVERFLOW,
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@ -260,9 +262,8 @@
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-fisolate-erroneous-paths-dereference and
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-fisolate-erroneous-paths-attribute.
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* invoke.texi: Corresponding changes.
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* gimple.c (infer_nonnull_range): Add and use new arguments
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to control what kind of statements can be used to infer a
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non-null range.
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* gimple.c (infer_nonnull_range): Add and use new arguments to control
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what kind of statements can be used to infer a non-null range.
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* gimple.h (infer_nonnull_range): Update prototype.
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* tree-vrp.c (infer_value_range): Corresponding changes.
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* opts.c (default_options_table): Update due to option split.
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@ -270,8 +271,7 @@
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(find_implicit_erroneous_behaviour): Pass additional arguments
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to infer_nonnull_range.
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(find_explicit_erroneous_behaviour): Similarly.
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(gate_isolate_erroneous_paths): Check both of the new
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options.
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(gate_isolate_erroneous_paths): Check both of the new options.
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2013-12-04 Jeff Law <law@redhat.com>
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@ -559,7 +559,7 @@
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* config/arm/arm.c (arm_preferred_reload_class): Only return LO_REGS
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when rclass is GENERAL_REGS.
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2013-12-02 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
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2013-12-02 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
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* loop-unroll.c (decide_unroll_constant_iterations): Check macro
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TARGET_LOOP_UNROLL_ADJUST while deciding unroll factor.
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@ -1096,7 +1096,7 @@
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* tree-vect-loop.c (vect_estimate_min_profitable_iters): Ditto
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plus added openmp-simd warining.
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2013-11-27 H.J. Lu <hongjiu.lu@intel.com>
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2013-11-27 H.J. Lu <hongjiu.lu@intel.com>
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PR rtl-optimization/59311
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* dwarf2cfi.c (dwf_regno): Assert reg isn't pseudo register.
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@ -1478,7 +1478,7 @@
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* config/arm/arm.c (arm_new_rtx_costs): Initialise cost correctly
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for zero_extend case.
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2013-11-26 H.J. Lu <hongjiu.lu@intel.com>
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2013-11-26 H.J. Lu <hongjiu.lu@intel.com>
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PR bootstrap/55552
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* configure.ac (install_gold_as_default): New. Set to yes for
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@ -1893,7 +1893,7 @@
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* doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont.
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2013-11-22 Andrew MacLeod <amacleod@redhat.com>
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2013-11-22 Andrew MacLeod <amacleod@redhat.com>
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* hooks.h (hook_uint_mode_0): Add Prototype.
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* hooks.c (hook_uint_mode_0): New default function.
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@ -1903,7 +1903,7 @@
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* doc/tm.texi.in (TARGET_ATOMIC_ALIGN_FOR_MODE): Define.
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* doc/tm.texi (TARGET_ATOMIC_ALIGN_FOR_MODE): Add description.
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2013-11-22 Andrew MacLeod <amacleod@redhat.com>
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2013-11-22 Andrew MacLeod <amacleod@redhat.com>
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* gimple.h: Remove all includes.
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(recalculate_side_effects): Move prototype to gimplify.h.
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@ -4140,7 +4140,7 @@
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* profile.c (compute_branch_probabilities): Do not sanity check
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run_max.
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2013-11-18 Kenneth Zadeck <zadeck@naturalbridge.com>
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2013-11-18 Kenneth Zadeck <zadeck@naturalbridge.com>
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* tree.c (int_fits_type_p): Change GET_MODE_BITSIZE to
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GET_MODE_PRECISION.
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@ -4642,7 +4642,7 @@
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* lto-streamer-in.c (input function): Call cgraph_create_node if
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cgraph_get_node failed.
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2013-11-14 Olivier Hainque <hainque@adacore.com>
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2013-11-14 Olivier Hainque <hainque@adacore.com>
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* cfgexpand.c (defer_stack_allocation): When optimization is enabled,
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defer allocation of DECL_IGNORED_P variables at toplevel unless really
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@ -10459,7 +10459,7 @@
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* config/iq2000/iq2000.c (init_cumulative_args): Likewise.
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* config/rs6000/rs6000.c (init_cumulative_args): Likewise.
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2013-10-16 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
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2013-10-16 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
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* config/i386/i386.c (ix86_option_override_internal): Enable FMA4
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for AMD bdver3.
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@ -10469,7 +10469,7 @@
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* config/cris/t-elfmulti (MULTILIB_OPTIONS, MULTILIB_DIRNAMES)
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(MULTILIB_MATCHES): Add multilib for -march=v8.
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2013-10-15 Sriraman Tallam <tmsriram@google.com>
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2013-10-15 Sriraman Tallam <tmsriram@google.com>
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PR target/57756
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* optc-save-gen.awk: Add extra parameter to the save and restore
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@ -6172,7 +6172,8 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum)
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}
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return TYPE_MODE (type);
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}
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else if ((size == 8 || size == 16) && !TARGET_SSE)
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else if (((size == 8 && TARGET_64BIT) || size == 16)
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&& !TARGET_SSE)
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{
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static bool warnedsse;
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@ -6184,10 +6185,21 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum)
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warning (0, "SSE vector argument without SSE "
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"enabled changes the ABI");
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}
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return mode;
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}
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else
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return mode;
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else if ((size == 8 && !TARGET_64BIT) && !TARGET_MMX)
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{
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static bool warnedmmx;
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if (cum
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&& !warnedmmx
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&& cum->warn_mmx)
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{
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warnedmmx = true;
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warning (0, "MMX vector argument without MMX "
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"enabled changes the ABI");
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}
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}
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return mode;
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}
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gcc_unreachable ();
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@ -1,5 +1,10 @@
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2013-12-06 Uros Bizjak <ubizjak@gmail.com>
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PR target/59405
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* gcc.target/i386/pr59405.c: New test.
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2013-12-06 Ian Bolton <ian.bolton@arm.com>
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Mark Mitchell <mark@codesourcery.com>
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Mark Mitchell <mark@codesourcery.com>
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PR target/59091
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* gcc.target/arm/builtin-trap.c: New test.
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@ -56,7 +61,7 @@
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2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com>
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* gcc.target/i386/readeflags-1.c: New.
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* gcc.target/i386/readeflags-1.c: New.
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* gcc.target/i386/writeeflags-1.c: Ditto.
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2013-12-05 Yury Gribov <y.gribov@samsung.com>
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@ -91,8 +96,7 @@
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2013-12-05 Richard Biener <rguenther@suse.de>
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PR tree-optimization/56787
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* gcc.dg/vect/pr56787.c: Adjust to not require vector float
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division.
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* gcc.dg/vect/pr56787.c: Adjust to not require vector float division.
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2013-12-05 Kostya Serebryany <kcc@google.com>
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@ -182,10 +186,9 @@
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2013-12-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little
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endian.
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* gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little endian.
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2013-12-03 H.J. Lu <hongjiu.lu@intel.com>
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2013-12-03 H.J. Lu <hongjiu.lu@intel.com>
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PR target/59363
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* gcc.target/i386/pr59363.c: New file.
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@ -230,7 +233,7 @@
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2013-12-02 Sriraman Tallam <tmsriram@google.com>
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PR target/58944
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* testsuite/gcc.target/i386/pr58944.c: New test.
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* testsuite/gcc.target/i386/pr58944.c: New test.
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2013-12-02 Joseph Myers <joseph@codesourcery.com>
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@ -2306,7 +2309,7 @@
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* gcc.dg/tree-prof/tree-prof.exp: Fix comment.
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2013-10-15 Sriraman Tallam <tmsriram@google.com>
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2013-10-15 Sriraman Tallam <tmsriram@google.com>
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PR target/57756
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* gcc.target/i386/pr57756.c: New test.
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@ -0,0 +1,24 @@
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/* { dg-do run } */
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/* { dg-options "-mmmx -mfpmath=387" } */
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#include "mmx-check.h"
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#include <mmintrin.h>
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typedef float float32x2_t __attribute__ ((vector_size (8)));
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float
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foo32x2_be (float32x2_t x)
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{
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_mm_empty ();
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return x[1];
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}
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static void
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mmx_test (void)
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{
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float32x2_t b = { 0.0f, 1.0f };
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if (foo32x2_be (b) != 1.0f)
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abort ();
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}
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