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arm.c: Fix comment typos. 

* config/arm/arm.c: Fix comment typos.
	* config/arm/arm.h: Likewise.
	* config/arm/netbsd-elf.h: Likewise.
	* config/arm/netbsd.h: Likewise.

From-SVN: r62171
This commit is contained in:
Kazu Hirata 2003-01-31 02:20:48 +00:00 committed by Kazu Hirata
parent f099d36039
commit 6bc8279340
5 changed files with 29 additions and 22 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2003-01-30 Kazu Hirata <kazu@cs.umass.edu>
* config/arm/arm.c: Fix comment typos.
* config/arm/arm.h: Likewise.
* config/arm/netbsd-elf.h: Likewise.
* config/arm/netbsd.h: Likewise.
2003-01-30 Geoffrey Keating <geoffk@apple.com>
* gengtype.c (struct walk_type_data): Add needs_cast_p.

22
gcc/config/arm/arm.c
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@ -1,5 +1,5 @@
/* Output routines for GCC for ARM.
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
and Martin Simmons (@harleqn.co.uk).
@ -267,7 +267,7 @@ int arm_structure_size_boundary = DEFAULT_STRUCTURE_SIZE_BOUNDARY;
#define FL_THUMB (1 << 6) /* Thumb aware */
#define FL_LDSCHED (1 << 7) /* Load scheduling necessary */
#define FL_STRONG (1 << 8) /* StrongARM */
#define FL_ARCH5E (1 << 9) /* DSP extenstions to v5 */
#define FL_ARCH5E (1 << 9) /* DSP extensions to v5 */
#define FL_XSCALE (1 << 10) /* XScale */
/* The bits in this mask specify which
@ -1818,12 +1818,12 @@ arm_return_in_memory (type)
return (size < 0 || size > UNITS_PER_WORD);
}
/* For the arm-wince targets we choose to be compitable with Microsoft's
/* For the arm-wince targets we choose to be compatible with Microsoft's
ARM and Thumb compilers, which always return aggregates in memory. */
#ifndef ARM_WINCE
/* All structures/unions bigger than one word are returned in memory.
Also catch the case where int_size_in_bytes returns -1. In this case
the aggregate is either huge or of varaible size, and in either case
the aggregate is either huge or of variable size, and in either case
we will want to return it via memory and not in a register. */
if (size < 0 || size > UNITS_PER_WORD)
return 1;
@ -2259,7 +2259,7 @@ arm_set_default_type_attributes (type)
}
/* Return 1 if the operand is a SYMBOL_REF for a function known to be
defined within the current compilation unit. If this caanot be
defined within the current compilation unit. If this cannot be
determined, then 0 is returned. */
static int
@ -3672,7 +3672,7 @@ arm_reload_memory_operand (op, mode)
memory access (architecture V4).
MODE is QImode if called when computing constraints, or VOIDmode when
emitting patterns. In this latter case we cannot use memory_operand()
because it will fail on badly formed MEMs, which is precisly what we are
because it will fail on badly formed MEMs, which is precisely what we are
trying to catch. */
int
@ -5214,7 +5214,7 @@ arm_gen_rotated_half_load (memref)
COND_OR == 0 => (X && Y)
COND_OR == 1 => ((! X( || Y)
COND_OR == 2 => (X || Y)
If we are unable to support a dominance comparsison we return CC mode.
If we are unable to support a dominance comparison we return CC mode.
This will then fail to match for the RTL expressions that generate this
call. */
@ -6070,7 +6070,7 @@ add_minipool_forward_ref (fix)
a new entry for it. If MAX_MP is NULL, the entry will be put on
the end of the list since the placement is less constrained than
any existing entry. Otherwise, we insert the new fix before
MAX_MP and, if neceesary, adjust the constraints on the other
MAX_MP and, if necessary, adjust the constraints on the other
entries. */
mp = xmalloc (sizeof (* mp));
mp->fix_size = fix->fix_size;
@ -8340,7 +8340,7 @@ arm_output_epilogue (really_return)
default:
if (frame_pointer_needed)
/* If we used the frame pointer then the return adddress
/* If we used the frame pointer then the return address
will have been loaded off the stack directly into the
PC, so there is no need to issue a MOV instruction
here. */
@ -10287,7 +10287,7 @@ thumb_exit (f, reg_containing_return_addr, eh_ofs)
number_of_first_bit_set (regs_available_for_popping);
/* Remove this register for the mask of available registers, so that
the return address will not be corrupted by futher pops. */
the return address will not be corrupted by further pops. */
regs_available_for_popping &= ~(1 << reg_containing_return_addr);
}
@ -10948,7 +10948,7 @@ thumb_expand_prologue ()
{
rtx spare = gen_rtx (REG, SImode, IP_REGNUM);
/* Choose an arbitary, non-argument low register. */
/* Choose an arbitrary, non-argument low register. */
reg = gen_rtx (REG, SImode, LAST_LO_REGNUM);
/* Save it by copying it into a high, scratch register. */

14
gcc/config/arm/arm.h
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@ -707,7 +707,7 @@ extern int arm_structure_size_boundary;
/* This is the value used to initialize arm_structure_size_boundary. If a
particular arm target wants to change the default value it should change
the definition of this macro, not STRUCTRUE_SIZE_BOUNDARY. See netbsd.h
the definition of this macro, not STRUCTURE_SIZE_BOUNDARY. See netbsd.h
for an example of this. */
#ifndef DEFAULT_STRUCTURE_SIZE_BOUNDARY
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 32
@ -836,7 +836,7 @@ extern const char * structure_size_string;
SUBTARGET_CONDITIONAL_REGISTER_USAGE \
}
/* These are a couple of extensions to the formats accecpted
/* These are a couple of extensions to the formats accepted
by asm_fprintf:
%@ prints out ASM_COMMENT_START
%r prints out REGISTER_PREFIX reg_names[arg] */
@ -908,7 +908,7 @@ extern const char * structure_size_string;
should point to a special register that we will make sure is eliminated.
For the Thumb we have another problem. The TPCS defines the frame pointer
as r11, and GCC belives that it is always possible to use the frame pointer
as r11, and GCC believes that it is always possible to use the frame pointer
as base register for addressing purposes. (See comments in
find_reloads_address()). But - the Thumb does not allow high registers,
including r11, to be used as base address registers. Hence our problem.
@ -916,7 +916,7 @@ extern const char * structure_size_string;
The solution used here, and in the old thumb port is to use r7 instead of
r11 as the hard frame pointer and to have special code to generate
backtrace structures on the stack (if required to do so via a command line
option) using r11. This is the only 'user visable' use of r11 as a frame
option) using r11. This is the only 'user visible' use of r11 as a frame
pointer. */
#define ARM_HARD_FRAME_POINTER_REGNUM 11
#define THUMB_HARD_FRAME_POINTER_REGNUM 7
@ -1061,7 +1061,7 @@ enum reg_class
#define BASE_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
/* For the Thumb the high registers cannot be used as base registers
when addressing quanitities in QI or HI mode; if we don't know the
when addressing quantities in QI or HI mode; if we don't know the
mode, then we must be conservative. After reload we must also be
conservative, since we can't support SP+reg addressing, and we
can't fix up any bad substitutions. */
@ -1416,7 +1416,7 @@ enum reg_class
This is added to the cfun structure. */
typedef struct machine_function GTY(())
{
/* Additionsl stack adjustment in __builtin_eh_throw. */
/* Additional stack adjustment in __builtin_eh_throw. */
rtx eh_epilogue_sp_ofs;
/* Records if LR has to be saved for far jumps. */
int far_jump_used;
@ -1856,7 +1856,7 @@ typedef struct
#define SUBTARGET_NAME_ENCODING_LENGTHS
#endif
/* This is a C fragement for the inside of a switch statement.
/* This is a C fragment for the inside of a switch statement.
Each case label should return the number of characters to
be stripped from the start of a function's name, if that
name starts with the indicated character. */

4
gcc/config/arm/netbsd-elf.h
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@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, NetBSD/arm ELF version.
Copyright (C) 2002 Free Software Foundation, Inc.
Copyright (C) 2002, 2003 Free Software Foundation, Inc.
Contributed by Wasabi Systems, Inc.
This file is part of GNU CC.
@ -127,7 +127,7 @@ Boston, MA 02111-1307, USA. */
This has several side effects that should be considered.
1. Structures will only be aligned to the size of the largest member.
i.e. structures containing only bytes will be byte aligned.
structures containing shorts will be half word alinged.
structures containing shorts will be half word aligned.
structures containing ints will be word aligned.
This means structures should be padded to a word boundary if

4
gcc/config/arm/netbsd.h
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@ -1,5 +1,5 @@
/* NetBSD/arm a.out version.
Copyright (C) 1993, 1994, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1993, 1994, 1997, 1998, 2003 Free Software Foundation, Inc.
Contributed by Mark Brinicombe (amb@physig.ph.kcl.ac.uk)
This file is part of GNU CC.
@ -130,7 +130,7 @@ Boston, MA 02111-1307, USA. */
This has several side effects that should be considered.
1. Structures will only be aligned to the size of the largest member.
i.e. structures containing only bytes will be byte aligned.
structures containing shorts will be half word alinged.
structures containing shorts will be half word aligned.
structures containing ints will be word aligned.
This means structures should be padded to a word boundary if