Add PC-relative branch support to Moxie port.
From-SVN: r148390
This commit is contained in:
Anthony Green
Anthony Green
parent
4ec80803fb
commit
6be6462e00
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@ -1,3 +1,12 @@
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2009-06-11 Anthony Green <green@moxielogic.com>
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* config/moxie/moxie.md: Define length attribute for all
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instructions.
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(rCC): Define.
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(*b<cond:code>): Support limited branch ranges for new PC-relative
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branch instructions.
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* config/moxie/moxie.h (HAS_LONG_UNCOND_BRANCH): Define.
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2009-06-11 Jakub Jelinek <jakub@redhat.com>
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* config/i386/i386.c (min_insn_size): Use get_attr_length
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@ -571,4 +571,6 @@ do \
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builtin_define_std ("MOXIE"); \
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}
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#define HAS_LONG_UNCOND_BRANCH true
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#endif /* GCC_MOXIE_H */
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@ -19,12 +19,15 @@
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;; <http://www.gnu.org/licenses/>.
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;; -------------------------------------------------------------------------
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;; Moxie specific constraints
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;; Moxie specific constraints, predicates and attributes
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;; -------------------------------------------------------------------------
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(include "constraints.md")
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(include "predicates.md")
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; Most instructions are two bytes long.
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(define_attr "length" "" (const_int 2))
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;; -------------------------------------------------------------------------
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;; nop instruction
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;; -------------------------------------------------------------------------
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@ -232,7 +235,8 @@
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ld.l %0, %1
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lda.l %0, %1
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sto.l %0, %1
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ldo.l %0, %1")
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ldo.l %0, %1"
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[(set_attr "length" "2,6,2,6,2,6,6,6")])
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(define_expand "movqi"
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[(set (match_operand:QI 0 "general_operand" "")
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@ -258,7 +262,8 @@
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ld.b %0, %1
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lda.b %0, %1
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sto.b %0, %1
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ldo.b %0, %1")
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ldo.b %0, %1"
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[(set_attr "length" "2,6,2,6,2,6,6,6")])
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(define_expand "movhi"
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[(set (match_operand:HI 0 "general_operand" "")
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@ -284,7 +289,8 @@
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ld.s %0, %1
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lda.s %0, %1
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sto.s %0, %1
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ldo.s %0, %1")
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ldo.s %0, %1"
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[(set_attr "length" "2,6,2,6,2,6,6,6")])
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;; -------------------------------------------------------------------------
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;; Compare instructions
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@ -305,12 +311,12 @@
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(pc)))]
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""
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"
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/* Force the compare operands into registers. */
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if (GET_CODE (operands[1]) != REG)
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operands[1] = force_reg (SImode, operands[1]);
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if (GET_CODE (operands[2]) != REG)
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operands[2] = force_reg (SImode, operands[2]);
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")
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/* Force the compare operands into registers. */
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if (GET_CODE (operands[1]) != REG)
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operands[1] = force_reg (SImode, operands[1]);
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if (GET_CODE (operands[2]) != REG)
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operands[2] = force_reg (SImode, operands[2]);
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")
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(define_insn "*cmpsi"
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[(set (reg:CC CC_REG)
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@ -329,6 +335,9 @@ if (GET_CODE (operands[2]) != REG)
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(define_code_attr CC [(ne "ne") (eq "eq") (lt "lt") (ltu "ltu")
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(gt "gt") (gtu "gtu") (ge "ge") (le "le")
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(geu "geu") (leu "leu") ])
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(define_code_attr rCC [(ne "eq") (eq "ne") (lt "ge") (ltu "geu")
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(gt "le") (gtu "leu") (ge "lt") (le "gt")
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(geu "ltu") (leu "gtu") ])
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(define_insn "*b<cond:code>"
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[(set (pc)
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@ -337,7 +346,15 @@ if (GET_CODE (operands[2]) != REG)
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(label_ref (match_operand 0 "" ""))
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(pc)))]
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""
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"b<CC> %l0")
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{
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if (get_attr_length (insn) == 2)
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return "b<CC> %l0";
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else
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return "b<rCC> .+6\n\tjmpa %l0";
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}
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[(set (attr "length")
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(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 1022))
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(const_int 2) (const_int 8)))])
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;; -------------------------------------------------------------------------
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;; Call and Jump instructions
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@ -358,7 +375,8 @@ if (GET_CODE (operands[2]) != REG)
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""
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"@
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jsra %0
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jsr %0")
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jsr %0"
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[(set_attr "length" "6,2")])
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(define_expand "call_value"
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[(set (match_operand 0 "" "")
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@ -375,7 +393,8 @@ if (GET_CODE (operands[2]) != REG)
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1 "immediate_operand" "i"))
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(match_operand 2 "" "")))]
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""
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"jsra %1")
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"jsra %1"
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[(set_attr "length" "6")])
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(define_insn "*call_value_indirect"
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[(set (match_operand 0 "register_operand" "=r")
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@ -394,7 +413,8 @@ if (GET_CODE (operands[2]) != REG)
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[(set (pc)
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(label_ref (match_operand 0 "" "")))]
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""
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"jmpa %l0")
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"jmpa %l0"
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[(set_attr "length" "6")])
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;; -------------------------------------------------------------------------
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