avr-protos.h: (avr_output_ascii) Removed.
* config/avr/avr-protos.h: (avr_output_ascii) Removed. (avr_progmem_p): New prototype. (output_movsisf): Prototype declaration changed. (output_movqi): New prototype. (output_movhi): New prototype. (call_insn_operand): Likewise. (final_prescan_insn): Likewise. (avr_simplify_comparision_p): Likewise. (avr_normalize_condition): Likewise. (compare_eq_p): Likewise. (out_shift_with_cnt): Likewise. (const_int_pow2_p): Likewise. (output_reload_inhi): Prototype declaration changed. * config/avr/avr.c: (debug_hard_reg_set): Prototype declared. (ldi_reg_rtx): New. rtx for r31. (avr_init_stack): Initialize as "__stack". (function_prologue): Use it. Replace all TARGET_ENHANCED with AVR_ENHANCED. (avr_mcu_name): Initialize as "avr2". (avr_enhanced_p, avr_mega_p): New variables. (mcu_types, avr_override_options): Handle all known MCU types. Also handle avr1 (only preprocess, assemble and link). (print_operand): Using of `%K' in output template removed. (out_movqi_r_mr): Optimized. (out_movhi_r_mr): Likewise. (output_movqi): New function. (output_movhi): Likewise. (out_movsi_r_mr): Optimized. (output_movsisf): Compute insn length for `adjust_insn_length' (out_movqi_mr_r): Optimized. (out_movhi_mr_r): Optimized. (adjust_insn_length): Use output_movsisf, output_movqi, output_movhi for insn length adjusting. (reg_unused_after): Use dead_or_set_p. (preferred_reload_class): Now havn't any restriction. (reg_was_0): New function. (io_address_p): Likewise. (const_int_pow2_p): Likewise. (output_reload_inhi): Likewise. (output_reload_insisf): Likewise. * config/avr/avr.h (MULTILIB_DEFAULTS): Define. (LIB_SPEC): Use -lc for all supported devices. (LIBGCC_SPEC): Use -lgcc for all supported devices. (AVR_MEGA): Define as avr_mega_p. (AVR_ENHANCED): New, define as avr_enhanced_p. (TARGET_SWITCHES): Remove -menhanced, now handled by -mmcu=... (CPP_SPEC, LINK_SPEC): Handle all known MCU types. (CRT_BINUTILS_SPECS): Handle all known MCU types. Rename gcrt1-*.o to make file names unique on 8.3 filesystems. (EXTRA_SPECS): Add CPP_AVR[1-5]_SPEC. (ASM_SPEC): Pass -mmcu=... to the assembler. Change all -DAVR_* to -D__AVR_*__. (INIT_TARGET_OPTABS), config/avr/libgcc.S: Rename library functions to start with two underscores. (ASM_OUTPUT_COMMON): Outputs `.comm VAR,VAR-SIZE,1' to avoid alignment. (ASM_WEAKEN_LABEL): Declared for __attribute__((weak)). (SUPPORTS_WEAK): Likewise. (LDI_REG_REGNO): New. Register r31 will be used as temporary register for loading constants to r0-r14. * config/avr/avr.md: Replace all TARGET_ENHANCED with AVR_ENHANCED. (*mov_r_sp): Removed. Handled by output_movhi. (*mov_sp_r): Likewise. (*mov_sp_r_no_interrupts): Likewise (*mov_sp_r_tiny): Likewise. (*movqi): Use output_movqi. (*reload_inqi): New. (*movhi): Use output_movhi. (*reload_inhi): New. (*negsi2): Optimized. (*negsf2): Likewise. Added peepholes (define_peephole2) for loading constants to r0-r14 and for using `cpse' command. * config/avr/libgcc.S: Rename library functions to start with two underscores. Add support for enhanced core. (_moqhi3): Fix typo, now _modqi3. (__divsi_raw): Use __zero_reg__ as loop counter, smaller by 1 word. (__prologue_saves__): Remove test for stack adjust by 0. (__tablejump__): New. * config/avr/t-avr: Build libgcc2 with -mcall-prologues. Add multilib support. From-SVN: r36047
This commit is contained in:
Denis Chertykov
Denis Chertykov
parent
20bd7bfa3b
commit
6bec29c9e3
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@ -1,3 +1,94 @@
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Tue Aug 29 22:29:58 2000 Denis Chertykov <denisc@overta.ru> & Marek Michalkiewicz <marekm@linux.org.pl>
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* config/avr/avr-protos.h: (avr_output_ascii) Removed.
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(avr_progmem_p): New prototype.
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(output_movsisf): Prototype declaration changed.
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(output_movqi): New prototype.
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(output_movhi): New prototype.
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(call_insn_operand): Likewise.
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(final_prescan_insn): Likewise.
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(avr_simplify_comparision_p): Likewise.
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(avr_normalize_condition): Likewise.
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(compare_eq_p): Likewise.
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(out_shift_with_cnt): Likewise.
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(const_int_pow2_p): Likewise.
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(output_reload_inhi): Prototype declaration changed.
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* config/avr/avr.c: (debug_hard_reg_set): Prototype declared.
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(ldi_reg_rtx): New. rtx for r31.
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(avr_init_stack): Initialize as "__stack".
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(function_prologue): Use it.
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Replace all TARGET_ENHANCED with AVR_ENHANCED.
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(avr_mcu_name): Initialize as "avr2".
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(avr_enhanced_p, avr_mega_p): New variables.
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(mcu_types, avr_override_options): Handle all known MCU types.
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Also handle avr1 (only preprocess, assemble and link).
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(print_operand): Using of `%K' in output template removed.
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(out_movqi_r_mr): Optimized.
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(out_movhi_r_mr): Likewise.
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(output_movqi): New function.
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(output_movhi): Likewise.
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(out_movsi_r_mr): Optimized.
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(output_movsisf): Compute insn length for `adjust_insn_length'
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(out_movqi_mr_r): Optimized.
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(out_movhi_mr_r): Optimized.
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(adjust_insn_length): Use output_movsisf, output_movqi,
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output_movhi for insn length adjusting.
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(reg_unused_after): Use dead_or_set_p.
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(preferred_reload_class): Now havn't any restriction.
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(reg_was_0): New function.
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(io_address_p): Likewise.
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(const_int_pow2_p): Likewise.
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(output_reload_inhi): Likewise.
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(output_reload_insisf): Likewise.
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* config/avr/avr.h (MULTILIB_DEFAULTS): Define.
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(LIB_SPEC): Use -lc for all supported devices.
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(LIBGCC_SPEC): Use -lgcc for all supported devices.
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(AVR_MEGA): Define as avr_mega_p.
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(AVR_ENHANCED): New, define as avr_enhanced_p.
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(TARGET_SWITCHES): Remove -menhanced, now handled by -mmcu=...
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(CPP_SPEC, LINK_SPEC): Handle all known MCU types.
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(CRT_BINUTILS_SPECS): Handle all known MCU types.
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Rename gcrt1-*.o to make file names unique on 8.3 filesystems.
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(EXTRA_SPECS): Add CPP_AVR[1-5]_SPEC.
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(ASM_SPEC): Pass -mmcu=... to the assembler.
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Change all -DAVR_* to -D__AVR_*__.
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(INIT_TARGET_OPTABS), config/avr/libgcc.S:
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Rename library functions to start with two underscores.
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(ASM_OUTPUT_COMMON): Outputs `.comm VAR,VAR-SIZE,1' to avoid
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alignment.
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(ASM_WEAKEN_LABEL): Declared for __attribute__((weak)).
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(SUPPORTS_WEAK): Likewise.
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(LDI_REG_REGNO): New. Register r31 will be used as temporary
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register for loading constants to r0-r14.
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* config/avr/avr.md: Replace all TARGET_ENHANCED with
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AVR_ENHANCED.
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(*mov_r_sp): Removed. Handled by output_movhi.
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(*mov_sp_r): Likewise.
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(*mov_sp_r_no_interrupts): Likewise
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(*mov_sp_r_tiny): Likewise.
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(*movqi): Use output_movqi.
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(*reload_inqi): New.
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(*movhi): Use output_movhi.
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(*reload_inhi): New.
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(*negsi2): Optimized.
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(*negsf2): Likewise.
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Added peepholes (define_peephole2) for loading constants to r0-r14
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and for using `cpse' command.
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* config/avr/libgcc.S: Rename library functions to start with two
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underscores.
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Add support for enhanced core.
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(_moqhi3): Fix typo, now _modqi3.
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(__divsi_raw): Use __zero_reg__ as loop counter, smaller by 1 word.
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(__prologue_saves__): Remove test for stack adjust by 0.
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(__tablejump__): New.
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* config/avr/t-avr: Build libgcc2 with -mcall-prologues.
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Add multilib support.
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Tue Aug 29 15:17:54 EDT 2000 John Wehle (john@feith.com)
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* loop.c (prescan_loop): Don't check unknown_address_altered
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@ -21,9 +21,6 @@
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Boston, MA 02111-1307, USA. */
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extern void avr_output_ascii PARAMS ((FILE *file,
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const char *p,
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int size));
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extern int function_arg_regno_p PARAMS ((int r));
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extern void asm_file_start PARAMS ((FILE *file));
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extern void asm_file_end PARAMS ((FILE *file));
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@ -35,14 +32,17 @@ extern enum reg_class class_likely_spilled_p PARAMS ((int c));
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extern enum reg_class avr_regno_reg_class PARAMS ((int r));
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extern enum reg_class avr_reg_class_from_letter PARAMS ((int c));
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extern int frame_pointer_required_p PARAMS ((void));
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extern void asm_globalize_label PARAMS ((FILE *file,
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const char *name));
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extern void order_regs_for_local_alloc PARAMS ((void));
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extern int initial_elimination_offset PARAMS ((int from, int to));
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extern void function_prologue PARAMS ((FILE *file, int size));
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extern void function_epilogue PARAMS ((FILE *file, int size));
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extern void progmem_section PARAMS ((void));
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extern int mask_one_bit_p PARAMS ((HOST_WIDE_INT mask));
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extern void asm_globalize_label PARAMS ((FILE *file, const char *name));
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extern void order_regs_for_local_alloc PARAMS ((void));
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extern int initial_elimination_offset PARAMS ((int from, int to));
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extern void function_prologue PARAMS ((FILE *file, int size));
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extern void function_epilogue PARAMS ((FILE *file, int size));
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extern void progmem_section PARAMS ((void));
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extern int mask_one_bit_p PARAMS ((HOST_WIDE_INT mask));
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extern void gas_output_limited_string PARAMS ((FILE *file, char *str));
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extern void gas_output_ascii PARAMS ((FILE *file, char * str,
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size_t length));
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#ifdef TREE_CODE
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extern void asm_output_external PARAMS ((FILE *file, tree decl,
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@ -58,6 +58,9 @@ extern int valid_machine_type_attribute PARAMS ((tree type, tree attributes,
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extern int valid_machine_decl_attribute PARAMS ((tree decl, tree attributes,
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tree attr, tree args));
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extern int avr_progmem_p PARAMS ((tree decl));
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#ifdef RTX_CODE /* inside TREE_CODE */
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extern rtx avr_function_value PARAMS ((tree type, tree func));
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extern void init_cumulative_args PARAMS ((CUMULATIVE_ARGS *cum,
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@ -83,14 +86,15 @@ extern int legitimate_address_p PARAMS ((enum machine_mode mode, rtx x,
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int strict));
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extern void machine_dependent_reorg PARAMS ((rtx first_insn));
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extern int compare_diff_p PARAMS ((rtx insn));
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extern char * output_movqi PARAMS ((rtx insn, rtx operands[], int *l));
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extern char * output_movhi PARAMS ((rtx insn, rtx operands[], int *l));
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extern char * out_movqi_r_mr PARAMS ((rtx insn, rtx op[], int *l));
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extern char * out_movqi_mr_r PARAMS ((rtx insn, rtx op[], int *l));
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extern char * out_movhi_r_mr PARAMS ((rtx insn, rtx op[], int *l));
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extern char * out_movhi_mr_r PARAMS ((rtx insn, rtx op[], int *l));
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extern char * out_movsi_r_mr PARAMS ((rtx insn, rtx op[], int *l));
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extern char * out_movsi_mr_r PARAMS ((rtx insn, rtx op[], int *l));
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extern char * output_movsisf PARAMS ((rtx insn, rtx operands[],
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int which_alternative));
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extern char * output_movsisf PARAMS ((rtx insn, rtx operands[], int *l));
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extern char * out_tstsi PARAMS ((rtx insn, int *l));
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extern char * out_tsthi PARAMS ((rtx insn, int *l));
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extern char * ret_cond_branch PARAMS ((RTX_CODE cond, int len));
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@ -116,7 +120,7 @@ extern rtx legitimize_address PARAMS ((rtx x, rtx oldx,
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extern int adjust_insn_length PARAMS ((rtx insn, int len));
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extern rtx avr_libcall_value PARAMS ((enum machine_mode mode));
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extern char * output_reload_inhi PARAMS ((rtx insn, rtx *operands,
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int which_alternative));
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int *len));
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extern char * output_reload_insisf PARAMS ((rtx insn, rtx *operands,
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int which_alternative));
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extern int default_rtx_costs PARAMS ((rtx X, RTX_CODE code,
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@ -140,6 +144,16 @@ extern int jump_over_one_insn_p PARAMS ((rtx insn, rtx dest));
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extern int avr_hard_regno_mode_ok PARAMS ((int regno,
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enum machine_mode mode));
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extern int call_insn_operand PARAMS ((rtx op, enum machine_mode mode));
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extern void final_prescan_insn PARAMS ((rtx insn, rtx *operand,
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int num_operands));
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extern int avr_simplify_comparision_p PARAMS ((enum machine_mode mode,
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RTX_CODE operator, rtx x));
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extern RTX_CODE avr_normalize_condition PARAMS ((RTX_CODE condition));
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extern int compare_eq_p PARAMS ((rtx insn));
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extern void out_shift_with_cnt PARAMS ((char * template, rtx insn,
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rtx operands[], int *len));
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extern int const_int_pow2_p PARAMS ((rtx x));
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#endif /* RTX_CODE */
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#ifdef HAVE_MACHINE_MODES
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@ -151,6 +165,4 @@ extern int class_max_nregs PARAMS ((enum reg_class class,
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extern void asm_output_float PARAMS ((FILE *file, REAL_VALUE_TYPE n));
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#endif
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#endif
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1323
gcc/config/avr/avr.c
1323
gcc/config/avr/avr.c
File diff suppressed because it is too large
Load Diff
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@ -56,7 +56,6 @@ extern int target_flags;
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#define MASK_CALL_PROLOGUES 0x00040000
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#define MASK_TINY_STACK 0x00080000
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#define MASK_PACK_ARGS 0x00100000
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#define MASK_ENHANCED 0x00200000
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#define TARGET_ORDER_1 (target_flags & MASK_ORDER_1)
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#define TARGET_ORDER_2 (target_flags & MASK_ORDER_2)
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@ -66,7 +65,6 @@ extern int target_flags;
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#define TARGET_CALL_PROLOGUES (target_flags & MASK_CALL_PROLOGUES)
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#define TARGET_TINY_STACK (target_flags & MASK_TINY_STACK)
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#define TARGET_PACK_ARGS (target_flags & MASK_PACK_ARGS)
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#define TARGET_ENHANCED (target_flags & MASK_ENHANCED)
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/* Dump each assembler insn's rtl into the output file.
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This is for debugging the compiler itself. */
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@ -108,8 +106,6 @@ extern int target_flags;
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N_("Change only the low 8 bits of the stack pointer") }, \
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{ "pack-args", MASK_PACK_ARGS, \
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N_("Do not align function arguments on even numbered registers") }, \
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{ "enhanced", MASK_ENHANCED, \
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N_("Generate code for the enhanced AVR core") }, \
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{ "rtl", MASK_RTL_DUMP, NULL }, \
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{ "size", MASK_INSN_SIZE_DUMP, \
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N_("Output instruction sizes to the asm file") }, \
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@ -137,20 +133,16 @@ extern int target_flags;
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{ "68000", -1}, \
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{ "", 1}} */
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extern const char *avr_ram_end;
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extern const char *avr_init_stack;
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extern const char *avr_mcu_name;
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extern int avr_mega_p;
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extern int avr_enhanced_p;
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struct mcu_type_s {
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char * name;
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int stack;
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int mega;
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};
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extern struct mcu_type_s *avr_mcu_type;
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#define AVR_MEGA (avr_mcu_type->mega)
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#define AVR_MEGA (avr_mega_p)
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#define AVR_ENHANCED (avr_enhanced_p)
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#define TARGET_OPTIONS { \
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{ "init-stack=", &avr_ram_end, N_("Specify the initial stack address") }, \
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{ "init-stack=", &avr_init_stack, N_("Specify the initial stack address") }, \
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{ "mcu=", &avr_mcu_name, N_("Specify the MCU name") } }
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/* This macro is similar to `TARGET_SWITCHES' but defines names of
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command options that have values. Its definition is an
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@ -2246,7 +2238,7 @@ progmem_section (void) \
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do { \
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fputs ("\t.comm ", (STREAM)); \
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assemble_name ((STREAM), (NAME)); \
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fprintf ((STREAM), ",%d\n", (SIZE)); \
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fprintf ((STREAM), ",%d,1\n", (SIZE)); \
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} while (0)
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/* A C statement (sans semicolon) to output to the stdio stream
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STREAM the assembler definition of a common-label named NAME whose
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@ -2459,8 +2451,16 @@ while (0)
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and after that, output the additional assembler syntax for making
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that name global, and a newline. */
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/* `ASM_WEAKEN_LABEL'
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A C statement (sans semicolon) to output to the stdio stream
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#define ASM_WEAKEN_LABEL(FILE, NAME) \
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do \
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{ \
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fputs ("\t.weak\t", (FILE)); \
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assemble_name ((FILE), (NAME)); \
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fputc ('\n', (FILE)); \
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} \
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while (0)
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/* A C statement (sans semicolon) to output to the stdio stream
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STREAM some commands that will make the label NAME weak; that is,
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available for reference from other files but only used if no other
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definition is available. Use the expression `assemble_name
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@ -2470,9 +2470,10 @@ while (0)
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If you don't define this macro, GNU CC will not support weak
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symbols and you should not define the `SUPPORTS_WEAK' macro.
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*/
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`SUPPORTS_WEAK'
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A C expression which evaluates to true if the target supports weak
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#define SUPPORTS_WEAK 1
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/* A C expression which evaluates to true if the target supports weak
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symbols.
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If you don't define this macro, `defaults.h' provides a default
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@ -2919,19 +2920,36 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
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the BSD functions `bcopy' and `bzero'. */
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#define CPP_SPEC "\
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%{!mmcu=*:-DAVR_AT90S8515} \
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%{mmcu=at90s2313:-DAVR_AT90S2313} \
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%{mmcu=at90s2323:-DAVR_AT90S2323} \
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%{mmcu=at90s2333:-DAVR_AT90S2333} \
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%{mmcu=at90s2343:-DAVR_AT90S2343} \
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%{mmcu=attiny22:-DAVR_ATtiny22} \
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%{mmcu=at90s4433:-DAVR_AT90S4433} \
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%{mmcu=at90s4414:-DAVR_AT90S4414} \
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%{mmcu=at90s4434:-DAVR_AT90S4434} \
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%{mmcu=at90s8515:-DAVR_AT90S8515} \
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%{mmcu=at90s8535:-DAVR_AT90S8535} \
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%{mmcu=atmega603:-DAVR_ATmega603} \
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%{mmcu=atmega103:-DAVR_ATmega103} \
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%{!mmcu*|mmcu=avr2:%(cpp_avr2)} \
|
||||
%{mmcu=at90s2313:%(cpp_avr2) -D__AVR_AT90S2313__} \
|
||||
%{mmcu=at90s2323:%(cpp_avr2) -D__AVR_AT90S2323__} \
|
||||
%{mmcu=at90s2333:%(cpp_avr2) -D__AVR_AT90S2333__} \
|
||||
%{mmcu=at90s2343:%(cpp_avr2) -D__AVR_AT90S2343__} \
|
||||
%{mmcu=attiny22: %(cpp_avr2) -D__AVR_ATtiny22__} \
|
||||
%{mmcu=at90s4433:%(cpp_avr2) -D__AVR_AT90S4433__} \
|
||||
%{mmcu=at90s4414:%(cpp_avr2) -D__AVR_AT90S4414__} \
|
||||
%{mmcu=at90s4434:%(cpp_avr2) -D__AVR_AT90S4434__} \
|
||||
%{mmcu=at90s8515:%(cpp_avr2) -D__AVR_AT90S8515__} \
|
||||
%{mmcu=at90s8535:%(cpp_avr2) -D__AVR_AT90S8535__} \
|
||||
%{mmcu=at90c8534:%(cpp_avr2) -D__AVR_AT90C8534__} \
|
||||
%{mmcu=avr3:%(cpp_avr3)} \
|
||||
%{mmcu=atmega603:%(cpp_avr3) -D__AVR_ATmega603__} \
|
||||
%{mmcu=atmega103:%(cpp_avr3) -D__AVR_ATmega103__} \
|
||||
%{mmcu=avr4:%(cpp_avr4)} \
|
||||
%{mmcu=atmega83: %(cpp_avr4) -D__AVR_ATmega83__} \
|
||||
%{mmcu=atmega85: %(cpp_avr4) -D__AVR_ATmega85__} \
|
||||
%{mmcu=avr5:%(cpp_avr5)} \
|
||||
%{mmcu=atmega161:%(cpp_avr5) -D__AVR_ATmega161__} \
|
||||
%{mmcu=atmega163:%(cpp_avr5) -D__AVR_ATmega163__} \
|
||||
%{mmcu=atmega32: %(cpp_avr5) -D__AVR_ATmega32__} \
|
||||
%{mmcu=at94k: %(cpp_avr5) -D__AVR_AT94K__} \
|
||||
%{mmcu=avr1:%(cpp_avr1)} \
|
||||
%{mmcu=at90s1200:%(cpp_avr1) -D__AVR_AT90S1200__} \
|
||||
%{mmcu=attiny10|mmcu=attiny11: %(cpp_avr1) -D__AVR_ATtiny11__} \
|
||||
%{mmcu=attiny12: %(cpp_avr1) -D__AVR_ATtiny12__} \
|
||||
%{mmcu=attiny15: %(cpp_avr1) -D__AVR_ATtiny15__} \
|
||||
%{mmcu=attiny28: %(cpp_avr1) -D__AVR_ATtiny28__} \
|
||||
%{mno-interrupts:-D__NO_INTERRUPTS__} \
|
||||
%{mint8:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long -D__INT_MAX__=127} \
|
||||
%{!mint*:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int -D__INT_MAX__=32767} \
|
||||
%{posix:-D_POSIX_SOURCE}"
|
||||
|
|
@ -2968,14 +2986,14 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
Do not define this macro unless you need to override the default
|
||||
definition. */
|
||||
|
||||
#define CC1_SPEC "%{!mmcu*:-mmcu=at90s8515} %{profile:-p}"
|
||||
#define CC1_SPEC "%{profile:-p}"
|
||||
/* A C string constant that tells the GNU CC driver program options to
|
||||
pass to `cc1'. It can also specify how to translate options you
|
||||
give to GNU CC into options for GNU CC to pass to the `cc1'.
|
||||
|
||||
Do not define this macro if it does not need to do anything. */
|
||||
|
||||
#define ASM_SPEC ""
|
||||
#define ASM_SPEC "%{mmcu=*:-mmcu=%*}"
|
||||
/* A C string constant that tells the GNU CC driver program options to
|
||||
pass to the assembler. It can also specify how to translate
|
||||
options you give to GNU CC into options for GNU CC to pass to the
|
||||
|
|
@ -2995,6 +3013,14 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
%{!mmcu*:-m avr85xx} \
|
||||
%{mmcu=atmega603:-m avrmega603} \
|
||||
%{mmcu=atmega103:-m avrmega103} \
|
||||
%{mmcu=atmega161:-m avrmega161} \
|
||||
%{mmcu=atmega163:-m avrmega161} \
|
||||
%{mmcu=atmega32:-m avr5} \
|
||||
%{mmcu=at94k:-m avr5} \
|
||||
%{mmcu=atmega83:-m avr4} \
|
||||
%{mmcu=atmega85:-m avr4} \
|
||||
%{mmcu=at90s1200|mmcu=attiny1*:-m avr1200} \
|
||||
%{mmcu=attiny28:-m avr1} \
|
||||
%{mmcu=at90s2313:-m avr23xx} \
|
||||
%{mmcu=at90s2323:-m avr23xx} \
|
||||
%{mmcu=attiny22:-m avr23xx} \
|
||||
|
|
@ -3003,6 +3029,7 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
%{mmcu=at90s4433:-m avr4433} \
|
||||
%{mmcu=at90s4414:-m avr44x4} \
|
||||
%{mmcu=at90s4434:-m avr44x4} \
|
||||
%{mmcu=at90c8534:-m avr85xx} \
|
||||
%{mmcu=at90s8535:-m avr85xx} \
|
||||
%{mmcu=at90s8515:-m avr85xx}"
|
||||
|
||||
|
|
@ -3012,9 +3039,8 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
|
||||
Do not define this macro if it does not need to do anything. */
|
||||
|
||||
#define LIB_SPEC "\
|
||||
%{!mmcu*|mmcu=at90s*|mmcu=attiny22: -lc} \
|
||||
%{mmcu=atmega*: -lc-mega}"
|
||||
#define LIB_SPEC \
|
||||
"%{!mmcu=at90s1*:%{!mmcu=attiny1*:%{!mmcu=attiny28: -lc }}}"
|
||||
/* Another C string constant used much like `LINK_SPEC'. The
|
||||
difference between the two is that `LIB_SPEC' is used at the end
|
||||
of the command given to the linker.
|
||||
|
|
@ -3022,9 +3048,8 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
If this macro is not defined, a default is provided that loads the
|
||||
standard C library from the usual place. See `gcc.c'. */
|
||||
|
||||
#define LIBGCC_SPEC "\
|
||||
%{mmcu=atmega*:-lgcc} \
|
||||
%{!mmcu*|mmcu=at90s*|mmcu=attiny22:-lgcc}"
|
||||
#define LIBGCC_SPEC \
|
||||
"%{!mmcu=at90s1*:%{!mmcu=attiny1*:%{!mmcu=attiny28: -lgcc }}}"
|
||||
/* Another C string constant that tells the GNU CC driver program how
|
||||
and when to place a reference to `libgcc.a' into the linker
|
||||
command line. This constant is placed both before and after the
|
||||
|
|
@ -3050,21 +3075,43 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
Do not define this macro if it does not need to do anything. */
|
||||
|
||||
#define CRT_BINUTILS_SPECS "\
|
||||
%{!mmcu*:gcrt1-8515.o%s} \
|
||||
%{mmcu=atmega603:gcrt1-mega603.o%s} \
|
||||
%{mmcu=atmega103:gcrt1-mega103.o%s} \
|
||||
%{mmcu=at90s2313:gcrt1-2313.o%s} \
|
||||
%{mmcu=at90s2323:gcrt1-2323.o%s} \
|
||||
%{mmcu=attiny22:gcrt1-tiny22.o%s} \
|
||||
%{mmcu=at90s2333:gcrt1-2333.o%s} \
|
||||
%{mmcu=at90s2343:gcrt1-2343.o%s} \
|
||||
%{mmcu=at90s4433:gcrt1-4433.o%s} \
|
||||
%{mmcu=at90s4414:gcrt1-4414.o%s} \
|
||||
%{mmcu=at90s4434:gcrt1-4434.o%s} \
|
||||
%{mmcu=at90s8535:gcrt1-8535.o%s} \
|
||||
%{mmcu=at90s8515:gcrt1-8515.o%s}"
|
||||
%{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
|
||||
%{mmcu=attiny10|mmcu=attiny11:crttn11.o%s} \
|
||||
%{mmcu=attiny12:crttn12.o%s} \
|
||||
%{mmcu=attiny15:crttn15.o%s} \
|
||||
%{mmcu=attiny28:crttn28.o%s} \
|
||||
%{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
|
||||
%{mmcu=at90s2313:crts2313.o%s} \
|
||||
%{mmcu=at90s2323:crts2323.o%s} \
|
||||
%{mmcu=attiny22:crttn22.o%s} \
|
||||
%{mmcu=at90s2333:crts2333.o%s} \
|
||||
%{mmcu=at90s2343:crts2343.o%s} \
|
||||
%{mmcu=at90s4433:crts4433.o%s} \
|
||||
%{mmcu=at90s4414:crts4414.o%s} \
|
||||
%{mmcu=at90s4434:crts4434.o%s} \
|
||||
%{mmcu=at90c8534:crtc8534.o%s} \
|
||||
%{mmcu=at90s8535:crts8535.o%s} \
|
||||
%{mmcu=atmega103|mmcu=avr3:crtm103.o%s} \
|
||||
%{mmcu=atmega603:crtm603.o%s} \
|
||||
%{mmcu=atmega83|mmcu=avr4:crtm83.o%s} \
|
||||
%{mmcu=atmega85:crtm85.o%s} \
|
||||
%{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
|
||||
%{mmcu=atmega163:crtm163.o%s} \
|
||||
%{mmcu=atmega32:crtm32.o%s} \
|
||||
%{mmcu=at94k:crtat94k.o%s}"
|
||||
|
||||
#define EXTRA_SPECS \
|
||||
#define CPP_AVR1_SPEC "-D__AVR_ARCH__=1 -D__AVR_ASM_ONLY__ "
|
||||
#define CPP_AVR2_SPEC "-D__AVR_ARCH__=2 "
|
||||
#define CPP_AVR3_SPEC "-D__AVR_ARCH__=3 -D__AVR_MEGA__ "
|
||||
#define CPP_AVR4_SPEC "-D__AVR_ARCH__=4 -D__AVR_ENHANCED__ "
|
||||
#define CPP_AVR5_SPEC "-D__AVR_ARCH__=5 -D__AVR_ENHANCED__ -D__AVR_MEGA__ "
|
||||
|
||||
#define EXTRA_SPECS \
|
||||
{"cpp_avr1", CPP_AVR1_SPEC}, \
|
||||
{"cpp_avr2", CPP_AVR2_SPEC}, \
|
||||
{"cpp_avr3", CPP_AVR3_SPEC}, \
|
||||
{"cpp_avr4", CPP_AVR4_SPEC}, \
|
||||
{"cpp_avr5", CPP_AVR5_SPEC}, \
|
||||
{"crt_binutils", CRT_BINUTILS_SPECS},
|
||||
/* Define this macro to provide additional specifications to put in
|
||||
the `specs' file that can be used in various specifications like
|
||||
|
|
@ -3110,6 +3157,9 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
#undef CPP_SYSV_DEFAULT
|
||||
#define CPP_SYSV_DEFAULT "-D_CALL_AIX" */
|
||||
|
||||
/* This is the default without any -mmcu=* option (AT90S*). */
|
||||
#define MULTILIB_DEFAULTS { "mmcu=avr2" }
|
||||
|
||||
/* This is undefined macro for collect2 disabling */
|
||||
#define LINKER_NAME "ld"
|
||||
|
||||
|
|
@ -3141,50 +3191,50 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
#define INIT_TARGET_OPTABS \
|
||||
{ \
|
||||
smul_optab->handlers[(int) QImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_mulqi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__mulqi3"); \
|
||||
\
|
||||
sdiv_optab->handlers[(int) QImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_divqi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__divqi3"); \
|
||||
\
|
||||
smod_optab->handlers[(int) QImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_modqi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__modqi3"); \
|
||||
\
|
||||
udiv_optab->handlers[(int) QImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_udivqi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__udivqi3"); \
|
||||
\
|
||||
umod_optab->handlers[(int) QImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_umodqi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__umodqi3"); \
|
||||
\
|
||||
smul_optab->handlers[(int) HImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_mulhi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__mulhi3"); \
|
||||
\
|
||||
sdiv_optab->handlers[(int) HImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_divhi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__divhi3"); \
|
||||
\
|
||||
smod_optab->handlers[(int) HImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_modhi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__modhi3"); \
|
||||
\
|
||||
udiv_optab->handlers[(int) HImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_udivhi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__udivhi3"); \
|
||||
\
|
||||
umod_optab->handlers[(int) HImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_umodhi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__umodhi3"); \
|
||||
\
|
||||
smul_optab->handlers[(int) SImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_mulsi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__mulsi3"); \
|
||||
\
|
||||
sdiv_optab->handlers[(int) SImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_divsi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__divsi3"); \
|
||||
\
|
||||
smod_optab->handlers[(int) SImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_modsi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__modsi3"); \
|
||||
\
|
||||
udiv_optab->handlers[(int) SImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_udivsi3"); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__udivsi3"); \
|
||||
\
|
||||
umod_optab->handlers[(int) SImode].libfunc \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "_umodsi3"); \
|
||||
avr_init_once(); \
|
||||
= gen_rtx (SYMBOL_REF, Pmode, "__umodsi3"); \
|
||||
avr_init_once (); \
|
||||
}
|
||||
|
||||
/* Temporary register r0 */
|
||||
|
|
@ -3193,8 +3243,12 @@ valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
|
|||
/* zero register r1 */
|
||||
#define ZERO_REGNO 1
|
||||
|
||||
/* Temporary register which used for load immediate values to r0-r15 */
|
||||
#define LDI_REG_REGNO 31
|
||||
|
||||
extern struct rtx_def *tmp_reg_rtx;
|
||||
extern struct rtx_def *zero_reg_rtx;
|
||||
extern struct rtx_def *ldi_reg_rtx;
|
||||
|
||||
#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
|
||||
|
||||
|
|
|
|||
|
|
@ -136,91 +136,46 @@
|
|||
push %A0"
|
||||
[(set_attr "length" "4")])
|
||||
|
||||
(define_insn "*mov_r_sp"
|
||||
[(set (match_operand:HI 0 "register_operand" "=r")
|
||||
(reg:HI 32))]
|
||||
""
|
||||
"in %A0,__SP_L__
|
||||
in %B0,__SP_H__"
|
||||
[(set_attr "length" "2")])
|
||||
|
||||
(define_insn "*mov_sp_r"
|
||||
[(set (reg:HI 32)
|
||||
(match_operand:HI 0 "register_operand" "r"))]
|
||||
"(!TARGET_TINY_STACK && !TARGET_NO_INTERRUPTS)"
|
||||
"in __tmp_reg__,__SREG__
|
||||
cli
|
||||
out __SP_H__,%B0
|
||||
out __SREG__,__tmp_reg__
|
||||
out __SP_L__,%A0"
|
||||
[(set_attr "length" "5")])
|
||||
|
||||
(define_insn "*mov_sp_r_no_interrupts"
|
||||
[(set (reg:HI 32)
|
||||
(match_operand:HI 0 "register_operand" "r"))]
|
||||
"(!TARGET_TINY_STACK && TARGET_NO_INTERRUPTS)"
|
||||
"out __SP_H__,%B0
|
||||
out __SP_L__,%A0"
|
||||
[(set_attr "length" "2")])
|
||||
|
||||
(define_insn "*mov_sp_r_tiny"
|
||||
[(set (reg:HI 32)
|
||||
(match_operand:HI 0 "register_operand" "r"))]
|
||||
"TARGET_TINY_STACK"
|
||||
"out __SP_L__,%A0"
|
||||
[(set_attr "length" "1")])
|
||||
|
||||
;;========================================================================
|
||||
;; move byte
|
||||
;; The last alternative (any immediate constant to any register) is
|
||||
;; very expensive. It should be optimized by peephole2 if a scratch
|
||||
;; register is available, but then that register could just as well be
|
||||
;; allocated for the variable we are loading. But, most of NO_LD_REGS
|
||||
;; are call-saved registers, and most of LD_REGS are call-used registers,
|
||||
;; so this may still be a win for registers live across function calls.
|
||||
|
||||
(define_expand "movqi"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "")
|
||||
(match_operand:QI 1 "general_operand" ""))]
|
||||
""
|
||||
"
|
||||
{
|
||||
/* One of the ops has to be in a register */
|
||||
if (!register_operand(operand0, QImode)
|
||||
&& ! (register_operand(operand1, QImode) || const0_rtx == operand1))
|
||||
{
|
||||
operands[1] = copy_to_mode_reg(QImode, operand1);
|
||||
}
|
||||
}");
|
||||
"/* One of the ops has to be in a register */
|
||||
if (!register_operand(operand0, QImode)
|
||||
&& ! (register_operand(operand1, QImode) || const0_rtx == operand1))
|
||||
operands[1] = copy_to_mode_reg(QImode, operand1);
|
||||
")
|
||||
|
||||
(define_insn "*movqi"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,d,Qm,r,q")
|
||||
(match_operand:QI 1 "general_operand" "r,L,i,rL,Qm,r"))]
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,d,Qm,r,q,r,*r")
|
||||
(match_operand:QI 1 "general_operand" "r,i,rL,Qm,r,q,i"))]
|
||||
"(register_operand (operands[0],QImode)
|
||||
|| register_operand (operands[1], QImode) || const0_rtx == operands[1])"
|
||||
"*{
|
||||
switch (which_alternative)
|
||||
{
|
||||
case 0:
|
||||
return AS2 (mov, %0,%1);
|
||||
case 1:
|
||||
return AS1 (clr, %0);
|
||||
case 2:
|
||||
return AS2 (ldi, %0,lo8(%1));
|
||||
case 3:
|
||||
{
|
||||
rtx save1=NULL;
|
||||
if (operands[1] == const0_rtx)
|
||||
{
|
||||
save1 = operands[1];
|
||||
operands[1] = zero_reg_rtx;
|
||||
}
|
||||
output_asm_insn (out_movqi_mr_r (insn,operands,NULL), operands);
|
||||
if (save1)
|
||||
operands[1] = save1;
|
||||
}
|
||||
return \"\";
|
||||
case 4:
|
||||
return out_movqi_r_mr (insn,operands,NULL);
|
||||
case 5:
|
||||
return (AS2 (out,%0,%1));
|
||||
}
|
||||
}"
|
||||
[(set_attr "length" "1,1,1,5,5,1")
|
||||
(set_attr "cc" "none,clobber,none,clobber,clobber,none")])
|
||||
"* return output_movqi (insn, operands, NULL);"
|
||||
[(set_attr "length" "1,1,5,5,1,1,4")
|
||||
(set_attr "cc" "none,none,clobber,clobber,none,none,clobber")])
|
||||
|
||||
;; This is used in peephole2 to optimize loading immediate constants
|
||||
;; if a scratch register from LD_REGS happens to be available.
|
||||
|
||||
(define_insn "*reload_inqi"
|
||||
[(set (match_operand:QI 0 "register_operand" "=l")
|
||||
(match_operand:QI 1 "immediate_operand" "i"))
|
||||
(clobber (match_operand:QI 2 "register_operand" "=&d"))]
|
||||
""
|
||||
"ldi %2,lo8(%1)
|
||||
mov %0,%2"
|
||||
[(set_attr "length" "2")
|
||||
(set_attr "cc" "none")])
|
||||
|
||||
;;============================================================================
|
||||
;; move word (16 bit)
|
||||
|
|
@ -239,61 +194,35 @@
|
|||
}
|
||||
}")
|
||||
|
||||
|
||||
(define_peephole2
|
||||
[(match_scratch:QI 2 "d")
|
||||
(set (match_operand:HI 0 "register_operand" "")
|
||||
(match_operand:HI 1 "immediate_operand" ""))]
|
||||
"(operands[1] != const0_rtx
|
||||
&& test_hard_reg_class (NO_LD_REGS, operands[0]))"
|
||||
[(parallel [(set (match_dup 0) (match_dup 1))
|
||||
(clobber (match_dup 2))])]
|
||||
"")
|
||||
|
||||
;; '*' because it is not used in rtl generation, only in above peephole
|
||||
(define_insn "*reload_inhi"
|
||||
[(set (match_operand:HI 0 "register_operand" "=r")
|
||||
(match_operand:HI 1 "immediate_operand" "i"))
|
||||
(clobber (match_operand:QI 2 "register_operand" "=&d"))]
|
||||
""
|
||||
"* return output_reload_inhi (insn, operands, NULL);"
|
||||
[(set_attr "length" "4")
|
||||
(set_attr "cc" "none")])
|
||||
|
||||
(define_insn "*movhi"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,d,r,m")
|
||||
(match_operand:HI 1 "general_operand" "r,L,i,m,rL"))]
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,d,*r,q,r")
|
||||
(match_operand:HI 1 "general_operand" "r,m,rL,i,i,r,q"))]
|
||||
"(register_operand (operands[0],HImode)
|
||||
|| register_operand (operands[1],HImode) || const0_rtx == operands[1])"
|
||||
"*{
|
||||
rtx link;
|
||||
switch (which_alternative)
|
||||
{
|
||||
case 0: /* mov r,r */
|
||||
if (TARGET_ENHANCED)
|
||||
return (AS2 (movw,%0,%1)); /* FIXME: length = 2 -> 1 */
|
||||
|
||||
if (true_regnum (operands[0]) > true_regnum (operands[1]))
|
||||
return (AS2 (mov,%B0,%B1) CR_TAB
|
||||
AS2 (mov,%A0,%A1));
|
||||
else
|
||||
return (AS2 (mov,%A0,%A1) CR_TAB
|
||||
AS2 (mov,%B0,%B1));
|
||||
case 1: /* mov r,L */
|
||||
return (AS1 (clr,%A0) CR_TAB
|
||||
AS1 (clr,%B0));
|
||||
case 2: /* ld d,i */
|
||||
if (operands[1] == const1_rtx
|
||||
&& (link = find_reg_note (insn, REG_WAS_0, 0))
|
||||
/* Make sure the insn that stored the 0 is still present. */
|
||||
&& ! INSN_DELETED_P (XEXP (link, 0))
|
||||
&& GET_CODE (XEXP (link, 0)) != NOTE
|
||||
/* Make sure cross jumping didn't happen here. */
|
||||
&& no_labels_between_p (XEXP (link, 0), insn)
|
||||
/* Make sure the reg hasn't been clobbered. */
|
||||
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
|
||||
/* Fastest way to change a 0 to a 1. */
|
||||
return AS1 (inc,%A0 ; reg_was_0);
|
||||
return (AS2 (ldi,%A0,lo8(%1)) CR_TAB
|
||||
AS2 (ldi,%B0,hi8(%1)));
|
||||
case 3: /* mov r,m*/
|
||||
return out_movhi_r_mr (insn, operands, NULL);
|
||||
case 4: /* mov m,r*/
|
||||
{
|
||||
rtx save1 = NULL;
|
||||
if (operands[1] == const0_rtx)
|
||||
{
|
||||
save1 = operands[1];
|
||||
operands[1] = zero_reg_rtx;
|
||||
}
|
||||
output_asm_insn (out_movhi_mr_r (insn,operands,NULL), operands);
|
||||
if (save1)
|
||||
operands[1] = save1;
|
||||
}
|
||||
return \"\";
|
||||
}
|
||||
}"
|
||||
[(set_attr "length" "2,2,2,4,4")
|
||||
(set_attr "cc" "none,set_zn,none,clobber,clobber")])
|
||||
"* return output_movhi (insn, operands, NULL);"
|
||||
[(set_attr "length" "2,4,4,2,6,5,2")
|
||||
(set_attr "cc" "none,clobber,clobber,none,clobber,none,none")])
|
||||
|
||||
;;==========================================================================
|
||||
;; move double word (32 bit)
|
||||
|
|
@ -312,14 +241,37 @@
|
|||
}
|
||||
}")
|
||||
|
||||
|
||||
|
||||
(define_peephole2
|
||||
[(match_scratch:QI 2 "d")
|
||||
(set (match_operand:SI 0 "register_operand" "")
|
||||
(match_operand:SI 1 "immediate_operand" ""))]
|
||||
"(operands[1] != const0_rtx
|
||||
&& test_hard_reg_class (NO_LD_REGS, operands[0]))"
|
||||
[(parallel [(set (match_dup 0) (match_dup 1))
|
||||
(clobber (match_dup 2))])]
|
||||
"")
|
||||
|
||||
;; '*' because it is not used in rtl generation.
|
||||
(define_insn "*reload_insi"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r")
|
||||
(match_operand:SI 1 "immediate_operand" "i"))
|
||||
(clobber (match_operand:QI 2 "register_operand" "=&d"))]
|
||||
""
|
||||
"* return output_reload_insisf (insn, operands, NULL);"
|
||||
[(set_attr "length" "8")
|
||||
(set_attr "cc" "none")])
|
||||
|
||||
|
||||
(define_insn "*movsi"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,d,r,Qm")
|
||||
(match_operand:SI 1 "general_operand" "r,L,i,Qm,rL"))]
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
|
||||
(match_operand:SI 1 "general_operand" "r,L,Qm,rL,i,i"))]
|
||||
"(register_operand (operands[0],SImode)
|
||||
|| register_operand (operands[1],SImode) || const0_rtx == operands[1])"
|
||||
"* return output_movsisf (insn, operands, which_alternative);"
|
||||
[(set_attr "length" "4,4,4,8,8")
|
||||
(set_attr "cc" "none,set_zn,none,clobber,clobber")])
|
||||
[(set_attr "length" "4,4,8,8,4,10")
|
||||
(set_attr "cc" "none,set_zn,clobber,clobber,clobber,clobber")])
|
||||
|
||||
;; fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
|
||||
;; move floating point numbers (32 bit)
|
||||
|
|
@ -339,13 +291,13 @@
|
|||
}")
|
||||
|
||||
(define_insn "*movsf"
|
||||
[(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,d,r,Qm")
|
||||
(match_operand:SF 1 "general_operand" "r,G,F,Qm,r"))]
|
||||
[(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
|
||||
(match_operand:SF 1 "general_operand" "r,G,Qm,r,F,F"))]
|
||||
"register_operand (operands[0], SFmode)
|
||||
|| register_operand (operands[1], SFmode)"
|
||||
"* return output_movsisf (insn, operands, which_alternative);"
|
||||
[(set_attr "length" "4,4,4,8,8")
|
||||
(set_attr "cc" "none,set_zn,none,clobber,clobber")])
|
||||
[(set_attr "length" "4,4,8,8,4,10")
|
||||
(set_attr "cc" "none,set_zn,clobber,clobber,clobber,clobber")])
|
||||
|
||||
;;=========================================================================
|
||||
;; move string (like memcpy)
|
||||
|
|
@ -663,7 +615,7 @@
|
|||
[(set (match_operand:QI 0 "register_operand" "=r")
|
||||
(mult:QI (match_operand:QI 1 "register_operand" "r")
|
||||
(match_operand:QI 2 "register_operand" "r")))]
|
||||
"TARGET_ENHANCED"
|
||||
"AVR_ENHANCED"
|
||||
"mul %1,%2
|
||||
mov %0,r0
|
||||
clr r1"
|
||||
|
|
@ -674,7 +626,7 @@
|
|||
[(set (match_operand:HI 0 "register_operand" "=r")
|
||||
(mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "d"))
|
||||
(sign_extend:HI (match_operand:QI 2 "register_operand" "d"))))]
|
||||
"TARGET_ENHANCED"
|
||||
"AVR_ENHANCED"
|
||||
"muls %1,%2
|
||||
movw %0,r0
|
||||
clr r1"
|
||||
|
|
@ -685,7 +637,7 @@
|
|||
[(set (match_operand:HI 0 "register_operand" "=r")
|
||||
(mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
|
||||
(zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
|
||||
"TARGET_ENHANCED"
|
||||
"AVR_ENHANCED"
|
||||
"mul %1,%2
|
||||
movw %0,r0
|
||||
clr r1"
|
||||
|
|
@ -696,7 +648,7 @@
|
|||
[(set (match_operand:HI 0 "register_operand" "=&r")
|
||||
(mult:HI (match_operand:HI 1 "register_operand" "r")
|
||||
(match_operand:HI 2 "register_operand" "r")))]
|
||||
"TARGET_ENHANCED"
|
||||
"AVR_ENHANCED"
|
||||
"mul %A1,%A2
|
||||
movw %0,r0
|
||||
mul %A1,%B2
|
||||
|
|
@ -1053,15 +1005,26 @@
|
|||
[(set_attr "length" "3,4")
|
||||
(set_attr "cc" "set_czn,set_n")])
|
||||
|
||||
(define_insn "negsi2"
|
||||
[(set (match_operand:SI 0 "register_operand" "=!d,r")
|
||||
(neg:SI (match_operand:SI 1 "register_operand" "0,0")))]
|
||||
(define_insn "*negsi2"
|
||||
[(set (match_operand:SI 0 "register_operand" "=!d,r,&r")
|
||||
(neg:SI (match_operand:SI 1 "register_operand" "0,0,r")))]
|
||||
""
|
||||
"@
|
||||
com %D0\;com %C0\;com %B0\;neg %A0\;sbci %B0,lo8(-1)\;sbci %C0,lo8(-1)\;sbci %D0,lo8(-1)
|
||||
com %D0\;com %C0\;com %B0\;neg %A0\;brcs _PC_+8\;sec\;adc %B0,__zero_reg__\;adc %C0,__zero_reg__\;adc %D0,__zero_reg__"
|
||||
[(set_attr "length" "7,9")
|
||||
(set_attr "cc" "set_czn,clobber")])
|
||||
com %D0\;com %C0\;com %B0\;com %A0\;adc %A0,%@\;adc %B0,%@\;adc %C0,%@\;adc %D0,%@
|
||||
clr %A0\;clr %B0\;clr %C0\;clr %D0\;sub %A0,%A1\;sbc %B0,%B1\;sbc %C0,%C1\;sbc %D0,%D1"
|
||||
[(set_attr "length" "7,8,8")
|
||||
(set_attr "cc" "set_czn,set_n,set_czn")])
|
||||
|
||||
(define_insn "negsf2"
|
||||
[(set (match_operand:SF 0 "register_operand" "=d,r")
|
||||
(neg:SF (match_operand:SF 1 "register_operand" "0,0")))]
|
||||
""
|
||||
"@
|
||||
subi %D0,0x80
|
||||
bst %D0,7\;com %D0\;bld %D0,7\;com %D0"
|
||||
[(set_attr "length" "1,4")
|
||||
(set_attr "cc" "set_n,set_n")])
|
||||
|
||||
;; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
|
||||
;; not
|
||||
|
|
@ -1659,7 +1622,7 @@
|
|||
return \"icall\";
|
||||
else if (which_alternative==1)
|
||||
{
|
||||
if (TARGET_ENHANCED)
|
||||
if (AVR_ENHANCED)
|
||||
return (AS2 (movw, r30, %0) CR_TAB
|
||||
\"icall\");
|
||||
else
|
||||
|
|
@ -1695,7 +1658,7 @@
|
|||
return \"icall\";
|
||||
else if (which_alternative==1)
|
||||
{
|
||||
if (TARGET_ENHANCED)
|
||||
if (AVR_ENHANCED)
|
||||
return (AS2 (movw, r30, %1) CR_TAB
|
||||
\"icall\");
|
||||
else
|
||||
|
|
@ -1747,7 +1710,7 @@
|
|||
(plus:HI (match_operand:HI 0 "register_operand" "=&z")
|
||||
(label_ref (match_operand 2 "" "")))))
|
||||
(use (label_ref (match_operand 1 "" "")))]
|
||||
"TARGET_ENHANCED"
|
||||
"AVR_ENHANCED"
|
||||
"subi r30,lo8(-(%2))
|
||||
sbci r31,hi8(-(%2))
|
||||
lpm __tmp_reg__,Z+
|
||||
|
|
@ -1970,3 +1933,23 @@
|
|||
(pc)))]
|
||||
"jump_over_one_insn_p (insn, operands[1])"
|
||||
"sbrc %D0,7")
|
||||
|
||||
(define_peephole
|
||||
[(set (cc0) (match_operand:QI 0 "register_operand" ""))
|
||||
(set (pc)
|
||||
(if_then_else (eq (cc0) (const_int 0))
|
||||
(label_ref (match_operand 1 "" ""))
|
||||
(pc)))]
|
||||
"jump_over_one_insn_p (insn, operands[1])"
|
||||
"cpse %0,__zero_reg__")
|
||||
|
||||
(define_peephole
|
||||
[(set (cc0)
|
||||
(compare (match_operand:QI 0 "register_operand" "")
|
||||
(match_operand:QI 1 "register_operand" "")))
|
||||
(set (pc)
|
||||
(if_then_else (eq (cc0) (const_int 0))
|
||||
(label_ref (match_operand 2 "" ""))
|
||||
(pc)))]
|
||||
"jump_over_one_insn_p (insn, operands[2])"
|
||||
"cpse %0,%1")
|
||||
|
|
|
|||
|
|
@ -621,18 +621,48 @@ __epilogue_restores__:
|
|||
out __SP_H__,r29
|
||||
out __SREG__,__tmp_reg__
|
||||
out __SP_L__,r28
|
||||
#if defined (__AVR_ENHANCED__)
|
||||
movw r28, r26
|
||||
#else
|
||||
mov r28,r26
|
||||
mov r29,r27
|
||||
#endif
|
||||
ret
|
||||
#endif /* defined (Lepilogue) */
|
||||
.endfunc
|
||||
#endif /* defined (L_epilogue) */
|
||||
|
||||
#ifdef L__exit
|
||||
#ifdef L_exit
|
||||
.weak _exit
|
||||
.func _exit
|
||||
_exit:
|
||||
rjmp _exit
|
||||
.endfunc
|
||||
#endif /* defined (L_exit) */
|
||||
|
||||
#ifdef L_cleanup
|
||||
.weak _cleanup
|
||||
.func _cleanup
|
||||
_cleanup:
|
||||
ret
|
||||
.endfunc
|
||||
#endif /* defined (L_cleanup) */
|
||||
|
||||
#ifdef L_tablejump
|
||||
.global __tablejump__
|
||||
.func __tablejump__
|
||||
__tablejump__:
|
||||
#if defined (__AVR_ENHANCED__)
|
||||
lpm __tmp_reg__, Z+
|
||||
lpm r31, Z
|
||||
mov r30, __tmp_reg__
|
||||
ijmp
|
||||
#else
|
||||
lpm
|
||||
push r0
|
||||
adiw r30, 1
|
||||
lpm
|
||||
push r0
|
||||
ret
|
||||
.endfunc
|
||||
#endif
|
||||
#endif /* defined (L_tablejump) */
|
||||
|
|
|
|||
|
|
@ -5,31 +5,34 @@ RANLIB_FOR_TARGET = avr-ranlib
|
|||
CROSS_LIBGCC1 = libgcc1-asm.a
|
||||
LIB1ASMSRC = avr/libgcc.S
|
||||
LIB1ASMFUNCS = \
|
||||
mulqi3 \
|
||||
mulhi3 \
|
||||
mulsi3 \
|
||||
umodqi3 \
|
||||
udivqi3 \
|
||||
modqi3 \
|
||||
divqi3 \
|
||||
umodhi3 \
|
||||
udivhi3 \
|
||||
modhi3 \
|
||||
divhi3 \
|
||||
umodsi3 \
|
||||
udivsi3 \
|
||||
modsi3 \
|
||||
divsi3 \
|
||||
prologue \
|
||||
epilogue \
|
||||
__exit
|
||||
_mulqi3 \
|
||||
_mulhi3 \
|
||||
_mulsi3 \
|
||||
_umodqi3 \
|
||||
_udivqi3 \
|
||||
_modqi3 \
|
||||
_divqi3 \
|
||||
_umodhi3 \
|
||||
_udivhi3 \
|
||||
_modhi3 \
|
||||
_divhi3 \
|
||||
_umodsi3 \
|
||||
_udivsi3 \
|
||||
_modsi3 \
|
||||
_divsi3 \
|
||||
_prologue \
|
||||
_epilogue \
|
||||
_exit \
|
||||
_cleanup \
|
||||
_tablejump
|
||||
|
||||
# libgcc...
|
||||
LIBGCC1_TEST =
|
||||
|
||||
# We do not have DF type
|
||||
TARGET_LIBGCC2_CFLAGS = -DDF=SF -Dinhibit_libc
|
||||
#LIBGCC2 = $(LIBGCC1)
|
||||
# We do not have the DF type.
|
||||
# Most of the C functions in libgcc2 use almost all registers,
|
||||
# so use -mcall-prologues for smaller code size.
|
||||
TARGET_LIBGCC2_CFLAGS = -DDF=SF -Dinhibit_libc -mcall-prologues
|
||||
|
||||
fp-bit.c: $(srcdir)/config/fp-bit.c $(srcdir)/config/avr/t-avr
|
||||
echo '#define FLOAT' > fp-bit.c
|
||||
|
|
@ -44,5 +47,17 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(srcdir)/config/avr/t-avr
|
|||
|
||||
FPBIT = fp-bit.c
|
||||
|
||||
MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr3/mmcu=avr4/mmcu=avr5
|
||||
MULTILIB_DIRNAMES = avr2 avr3 avr4 avr5
|
||||
|
||||
# The many avr2 matches are not listed here - this is the default.
|
||||
MULTILIB_MATCHES = \
|
||||
mmcu?avr3=mmcu?atmega103 mmcu?avr3=mmcu?atmega603 \
|
||||
mmcu?avr4=mmcu?atmega83 mmcu?avr4=mmcu?atmega85 \
|
||||
mmcu?avr5=mmcu?atmega161 mmcu?avr5=mmcu?atmega163 \
|
||||
mmcu?avr5=mmcu?atmega32 mmcu?avr5=mmcu?at94k
|
||||
|
||||
MULTILIB_EXCEPTIONS =
|
||||
|
||||
LIBGCC = stmp-multilib
|
||||
INSTALL_LIBGCC = install-multilib
|
||||
|
|
|
|||
Loading…
Reference in New Issue