final.c (final_scan_insn): Remove extra extract_insn call; Use caching for constrain_operands.
* final.c (final_scan_insn): Remove extra extract_insn call; Use caching for constrain_operands. (cleanup_subreg_operands): Use caching for extract_insn. * recog.c (constrain_operands_cached): New. * recog.h (constrain_operands_cached): Declare. * i386.c (ix86_attr_length_immediate_default, ix86_attr_length_address_default, ix86_agi_dependant): Cache extract_insn call. * recog.c (asm_noperands): Tweak. (extract_insn): Do not call asm_noperads for non-asm instructions. From-SVN: r36665
This commit is contained in:
Jan Hubicka
Jan Hubicka
parent
b1cdafbb6c
commit
6c698a6d9b
@ -1,3 +1,48 @@
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Fri Sep 29 13:37:59 MET DST 2000 Jan Hubicka <jh@suse.cz>
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* final.c (final_scan_insn): Remove extra extract_insn call;
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Use caching for constrain_operands.
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(cleanup_subreg_operands): Use caching for extract_insn.
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* recog.c (constrain_operands_cached): New.
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* recog.h (constrain_operands_cached): Declare.
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* i386.c (ix86_attr_length_immediate_default,
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ix86_attr_length_address_default, ix86_agi_dependant): Cache
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extract_insn call.
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* recog.c (asm_noperands): Tweak.
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(extract_insn): Do not call asm_noperads for non-asm instructions.
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Fri Sep 29 13:20:42 MET DST 2000 Jan Hubicka <jh@suse.cz>
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* recog.c (recog_memoized): Rename to recog_memoized_1.
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* recog.h (recog_memoized): Rename to recog_memoized_1.
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(recog_memoized): New macro.
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* rtl.h (single_set): Rename to single_set_1
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(single_set): New macro.
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* rtlanal.c (single_set): Rename to single_set_1; expect clobbers
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to be last.
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* i386.md (strmovsi_1, strmovhi_1 strmovqi_1):
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Do not use match_dup of input operands at outputs.
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Use register_operand for memory expression.
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(rep_movsi): Put use last, canonicalize.
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Use register_operand for memory expression.
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(rep_movqi): Put use last.
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Use register_operand for memory expression.
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(strsetsi_1, strset_hi_1, strsetqi_1): Do not use match_dup
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of input operands at outputs. Use register_operand for memory
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expression.
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(rep_stossi): Put use last; canonicalize; fix match_dup in
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the address expression
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(rep_stosqi): Likewise.
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(memcmp expander): Update calls.
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(cmpstrsi_nz_1, cmpstrsi_1, strlensi_1): Avoid match_dups in
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the clobbers.
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* i386.md (fp_jcc_3, fp_jcc_4, jp_fcc_5): if_then_else operand is
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VOIDmode.
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(fp_jcc_4, fp_jcc_3): Refuse unordered comparisons.
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2000-09-28 David O'Brien <obrien@FreeBSD.org>
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* config/i386/freebsd-aout.h: New, FreeBSD a.out config file.
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@ -6272,7 +6272,7 @@ ix86_attr_length_immediate_default (insn, shortform)
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{
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int len = 0;
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int i;
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extract_insn (insn);
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extract_insn_cached (insn);
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for (i = recog_data.n_operands - 1; i >= 0; --i)
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if (CONSTANT_P (recog_data.operand[i]))
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{
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@ -6308,7 +6308,7 @@ ix86_attr_length_address_default (insn)
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rtx insn;
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{
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int i;
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extract_insn (insn);
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extract_insn_cached (insn);
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for (i = recog_data.n_operands - 1; i >= 0; --i)
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if (GET_CODE (recog_data.operand[i]) == MEM)
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{
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@ -6409,7 +6409,7 @@ ix86_agi_dependant (insn, dep_insn, insn_type)
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else
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{
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int i;
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extract_insn (insn);
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extract_insn_cached (insn);
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for (i = recog_data.n_operands - 1; i >= 0; --i)
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if (GET_CODE (recog_data.operand[i]) == MEM)
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{
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@ -2919,7 +2919,6 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes)
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since `reload' should have changed them so that they do. */
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insn_code_number = recog_memoized (insn);
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extract_insn (insn);
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cleanup_subreg_operands (insn);
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/* Dump the insn in the assembly for debugging. */
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@ -2930,7 +2929,7 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes)
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print_rtx_head = "";
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}
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if (! constrain_operands (1))
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if (! constrain_operands_cached (1))
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fatal_insn_not_found (insn);
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/* Some target machines need to prescan each insn before
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@ -3138,8 +3137,7 @@ cleanup_subreg_operands (insn)
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rtx insn;
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{
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int i;
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extract_insn (insn);
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extract_insn_cached (insn);
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for (i = 0; i < recog_data.n_operands; i++)
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{
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if (GET_CODE (recog_data.operand[i]) == SUBREG)
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144
gcc/recog.c
144
gcc/recog.c
@ -1401,68 +1401,75 @@ int
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asm_noperands (body)
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rtx body;
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{
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if (GET_CODE (body) == ASM_OPERANDS)
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/* No output operands: return number of input operands. */
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return ASM_OPERANDS_INPUT_LENGTH (body);
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if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
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/* Single output operand: BODY is (set OUTPUT (asm_operands ...)). */
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return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)) + 1;
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else if (GET_CODE (body) == PARALLEL
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&& GET_CODE (XVECEXP (body, 0, 0)) == SET
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&& GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) == ASM_OPERANDS)
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switch (GET_CODE (body))
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{
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/* Multiple output operands, or 1 output plus some clobbers:
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body is [(set OUTPUT (asm_operands ...))... (clobber (reg ...))...]. */
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int i;
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int n_sets;
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/* Count backwards through CLOBBERs to determine number of SETs. */
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for (i = XVECLEN (body, 0); i > 0; i--)
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case ASM_OPERANDS:
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/* No output operands: return number of input operands. */
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return ASM_OPERANDS_INPUT_LENGTH (body);
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case SET:
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if (GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
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/* Single output operand: BODY is (set OUTPUT (asm_operands ...)). */
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return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)) + 1;
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else
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return -1;
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case PARALLEL:
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if (GET_CODE (XVECEXP (body, 0, 0)) == SET
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&& GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) == ASM_OPERANDS)
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{
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if (GET_CODE (XVECEXP (body, 0, i - 1)) == SET)
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break;
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if (GET_CODE (XVECEXP (body, 0, i - 1)) != CLOBBER)
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return -1;
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/* Multiple output operands, or 1 output plus some clobbers:
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body is [(set OUTPUT (asm_operands ...))... (clobber (reg ...))...]. */
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int i;
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int n_sets;
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/* Count backwards through CLOBBERs to determine number of SETs. */
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for (i = XVECLEN (body, 0); i > 0; i--)
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{
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if (GET_CODE (XVECEXP (body, 0, i - 1)) == SET)
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break;
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if (GET_CODE (XVECEXP (body, 0, i - 1)) != CLOBBER)
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return -1;
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}
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/* N_SETS is now number of output operands. */
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n_sets = i;
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/* Verify that all the SETs we have
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came from a single original asm_operands insn
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(so that invalid combinations are blocked). */
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for (i = 0; i < n_sets; i++)
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{
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rtx elt = XVECEXP (body, 0, i);
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if (GET_CODE (elt) != SET)
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return -1;
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if (GET_CODE (SET_SRC (elt)) != ASM_OPERANDS)
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return -1;
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/* If these ASM_OPERANDS rtx's came from different original insns
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then they aren't allowed together. */
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if (ASM_OPERANDS_INPUT_VEC (SET_SRC (elt))
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!= ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (body, 0, 0))))
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return -1;
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}
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return (ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)))
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+ n_sets);
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}
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/* N_SETS is now number of output operands. */
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n_sets = i;
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/* Verify that all the SETs we have
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came from a single original asm_operands insn
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(so that invalid combinations are blocked). */
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for (i = 0; i < n_sets; i++)
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else if (GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
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{
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rtx elt = XVECEXP (body, 0, i);
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if (GET_CODE (elt) != SET)
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return -1;
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if (GET_CODE (SET_SRC (elt)) != ASM_OPERANDS)
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return -1;
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/* If these ASM_OPERANDS rtx's came from different original insns
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then they aren't allowed together. */
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if (ASM_OPERANDS_INPUT_VEC (SET_SRC (elt))
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!= ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (body, 0, 0))))
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return -1;
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/* 0 outputs, but some clobbers:
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body is [(asm_operands ...) (clobber (reg ...))...]. */
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int i;
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/* Make sure all the other parallel things really are clobbers. */
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for (i = XVECLEN (body, 0) - 1; i > 0; i--)
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if (GET_CODE (XVECEXP (body, 0, i)) != CLOBBER)
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return -1;
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return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
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}
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return (ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)))
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+ n_sets);
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else
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return -1;
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default:
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return -1;
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}
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else if (GET_CODE (body) == PARALLEL
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&& GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
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{
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/* 0 outputs, but some clobbers:
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body is [(asm_operands ...) (clobber (reg ...))...]. */
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int i;
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/* Make sure all the other parallel things really are clobbers. */
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for (i = XVECLEN (body, 0) - 1; i > 0; i--)
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if (GET_CODE (XVECEXP (body, 0, i)) != CLOBBER)
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return -1;
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return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
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}
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else
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return -1;
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}
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/* Assuming BODY is an insn body that uses ASM_OPERANDS,
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@ -2069,6 +2076,16 @@ extract_constrain_insn_cached (insn)
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&& !constrain_operands (reload_completed))
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fatal_insn_not_found (insn);
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}
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/* Do cached constrain_operand and complain about failures. */
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int
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constrain_operands_cached (strict)
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int strict;
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{
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if (which_alternative == -1)
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return constrain_operands (strict);
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else
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return 1;
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}
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/* Analyze INSN and fill in recog_data. */
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@ -2097,8 +2114,19 @@ extract_insn (insn)
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return;
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case SET:
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if (GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
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goto asm_insn;
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else
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goto normal_insn;
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case PARALLEL:
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if ((GET_CODE (XVECEXP (body, 0, 0)) == SET
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&& GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) == ASM_OPERANDS)
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|| GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
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goto asm_insn;
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else
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goto normal_insn;
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case ASM_OPERANDS:
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asm_insn:
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recog_data.n_operands = noperands = asm_noperands (body);
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if (noperands >= 0)
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{
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@ -2122,10 +2150,10 @@ extract_insn (insn)
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}
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break;
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}
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/* FALLTHROUGH */
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fatal_insn_not_found (insn);
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default:
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normal_insn:
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/* Ordinary insn: recognize it, get the operands via insn_extract
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and get the constraints. */
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@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */
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/* Random number that should be large enough for all purposes. */
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#define MAX_RECOG_ALTERNATIVES 30
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#define recog_memoized(I) (INSN_CODE (I) >= 0 \
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? INSN_CODE (I) : recog_memoized_1 (I))
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/* Types of operands. */
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enum op_type {
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@ -69,7 +71,7 @@ struct operand_alternative
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extern void init_recog PARAMS ((void));
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extern void init_recog_no_volatile PARAMS ((void));
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extern int recog_memoized PARAMS ((rtx));
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extern int recog_memoized_1 PARAMS ((rtx));
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extern int check_asm_operands PARAMS ((rtx));
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extern int asm_operand_ok PARAMS ((rtx, const char *));
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extern int validate_change PARAMS ((rtx, rtx *, rtx, int));
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@ -77,6 +79,7 @@ extern int apply_change_group PARAMS ((void));
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extern int num_validated_changes PARAMS ((void));
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extern void cancel_changes PARAMS ((int));
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extern int constrain_operands PARAMS ((int));
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extern int constrain_operands_cached PARAMS ((int));
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extern int memory_address_p PARAMS ((enum machine_mode, rtx));
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extern int strict_memory_address_p PARAMS ((enum machine_mode, rtx));
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extern int validate_replace_rtx_subexp PARAMS ((rtx, rtx, rtx, rtx *));
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