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rs6000.c (rs6000_dwarf_register_span): Fix debug output for other floating point modes.

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* config/rs6000/rs6000.c (rs6000_dwarf_register_span): Fix debug
	output for other floating point modes.

From-SVN: r146060
This commit is contained in:
Daniel Jacobowitz 2009-04-14 20:19:54 +00:00 committed by Nathan Froyd
parent 68a607d814
commit 6cd1d2e205
2 changed files with 29 additions and 12 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2009-04-14 Daniel Jacobowitz <dan@codesourcery.com>
* config/rs6000/rs6000.c (rs6000_dwarf_register_span): Fix debug
output for other floating point modes.
2009-04-14 Diego Novillo <dnovillo@google.com>
Le-Chun Wu <lcwu@google.com>

36
gcc/config/rs6000/rs6000.c
View File

@ -22689,12 +22689,16 @@ rs6000_is_opaque_type (const_tree type)
static rtx
rs6000_dwarf_register_span (rtx reg)
{
unsigned regno;
rtx parts[8];
int i, words;
unsigned regno = REGNO (reg);
enum machine_mode mode = GET_MODE (reg);
if (TARGET_SPE
&& regno < 32
&& (SPE_VECTOR_MODE (GET_MODE (reg))
|| (TARGET_E500_DOUBLE
&& (GET_MODE (reg) == DFmode || GET_MODE (reg) == DDmode))))
|| (TARGET_E500_DOUBLE && FLOAT_MODE_P (mode)
&& mode != SFmode && mode != SDmode && mode != SCmode)))
;
else
return NULL_RTX;
@ -22704,15 +22708,23 @@ rs6000_dwarf_register_span (rtx reg)
/* The duality of the SPE register size wreaks all kinds of havoc.
This is a way of distinguishing r0 in 32-bits from r0 in
64-bits. */
return
gen_rtx_PARALLEL (VOIDmode,
BYTES_BIG_ENDIAN
? gen_rtvec (2,
gen_rtx_REG (SImode, regno + 1200),
gen_rtx_REG (SImode, regno))
: gen_rtvec (2,
gen_rtx_REG (SImode, regno),
gen_rtx_REG (SImode, regno + 1200)));
words = (GET_MODE_SIZE (mode) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD;
gcc_assert (words <= 4);
for (i = 0; i < words; i++, regno++)
{
if (BYTES_BIG_ENDIAN)
{
parts[2 * i] = gen_rtx_REG (SImode, regno + 1200);
parts[2 * i + 1] = gen_rtx_REG (SImode, regno);
}
else
{
parts[2 * i] = gen_rtx_REG (SImode, regno);
parts[2 * i + 1] = gen_rtx_REG (SImode, regno + 1200);
}
}
return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (words * 2, parts));
}
/* Fill in sizes for SPE register high parts in table used by unwinder. */