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From-SVN: r532
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@ -47,7 +47,7 @@ extern char *ctime ();
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extern int flag_traditional;
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extern FILE *asm_out_file;
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static char out_sccs_id[] = "@(#)m88k.c 2.0.2.2 02 Mar 1992 13:30:28";
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static char out_sccs_id[] = "@(#)m88k.c 2.0.3.4 19 Mar 1992 11:11:58";
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static char tm_sccs_id [] = TM_SCCS_ID;
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char *m88k_pound_sign = ""; /* Either # for SVR4 or empty for SVR3 */
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@ -811,7 +811,7 @@ output_short_branch_defs (stream)
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ASM_GENERATE_INTERNAL_LABEL
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(low, "L", CODE_LABEL_NUMBER (XEXP (sb_low, 0)));
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/* This will change as the assembler requirements become known. */
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fprintf (stream, "%s\t %s,%s-%s\n",
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fprintf (stream, "\t%s\t %s,%s-%s\n",
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DEF_ASM_OP, &name[1], &high[1], &low[1]);
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}
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if (sb_name || sb_high || sb_low)
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@ -1311,7 +1311,7 @@ output_file_start (file, f_options, f_len, W_options, W_len)
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char indent[256];
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time_t now = time ((time_t *)0);
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sprintf (indent, "]\"\n%s\t \"@(#)%s [", IDENT_ASM_OP, main_input_filename);
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sprintf (indent, "]\"\n\t%s\t \"@(#)%s [", IDENT_ASM_OP, main_input_filename);
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fprintf (file, indent+3);
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pos = fprintf (file, "gcc %s, %.24s,", VERSION_STRING, ctime (&now));
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output_options (file, f_options, f_len, W_options, W_len,
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@ -1331,14 +1331,14 @@ output_ascii (file, p, size)
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register int num = 0;
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fprintf (file, "%s\t \"", ASCII_DATA_ASM_OP);
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fprintf (file, "\t%s\t \"", ASCII_DATA_ASM_OP);
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for (i = 0; i < size; i++)
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{
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register int c = p[i];
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if (num > 48)
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{
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fprintf (file, "\"\n%s\t \"", ASCII_DATA_ASM_OP);
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fprintf (file, "\"\n\t%s\t \"", ASCII_DATA_ASM_OP);
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num = 0;
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}
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@ -1406,12 +1406,12 @@ m88k_handle_pragma_token (string, token)
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{
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if (state == ps_name || state == ps_value)
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{
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fprintf (asm_out_file, "%s\t ", WEAK_ASM_OP);
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fprintf (asm_out_file, "\t%s\t ", WEAK_ASM_OP);
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ASM_OUTPUT_LABELREF (asm_out_file, name);
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fputc ('\n', asm_out_file);
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if (state == ps_value)
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{
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fprintf (asm_out_file, "%s\t ", DEF_ASM_OP);
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fprintf (asm_out_file, "\t%s\t ", DEF_ASM_OP);
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ASM_OUTPUT_LABELREF (asm_out_file, name);
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fputc (',', asm_out_file);
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ASM_OUTPUT_LABELREF (asm_out_file, value);
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@ -2196,7 +2196,7 @@ output_tdesc (file, offset)
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tdesc_section ();
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fprintf (file, "%s\t %d", INT_ASM_OP, (16 << 2) | 2 /* 8:0,22:16,2:2 */);
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fprintf (file, "\t%s\t %d", INT_ASM_OP, (16 << 2) | 2 /* 8:0,22:16,2:2 */);
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fprintf (file, ",%d", flag_pic ? 2 : 1);
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ASM_GENERATE_INTERNAL_LABEL (buf, OCS_START_PREFIX, m88k_function_number);
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@ -2444,7 +2444,7 @@ m88k_builtin_saveregs (arglist)
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}
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/* Allocate the va_list constructor */
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block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_UNIT);
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block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD);
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RTX_UNCHANGING_P (block) = 1;
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RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
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@ -204,9 +204,9 @@ extern char * reg_names[];
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/* Print subsidiary information on the compiler version in use.
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Redefined in m88kv4.h, and m88kluna.h. */
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#define VERSION_INFO1 "88open OCS/BCS, "
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#define VERSION_INFO2 "09 Mar 1992"
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#define VERSION_INFO2 "19 Mar 1992"
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#define VERSION_STRING version_string
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#define TM_SCCS_ID "@(#)m88k.h 2.0.2.3 09 Mar 1992 14:20:23"
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#define TM_SCCS_ID "@(#)m88k.h 2.0.3.5 19 Mar 1992 12:40:46"
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/* Run-time compilation parameters selecting different hardware subsets. */
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@ -1773,7 +1773,7 @@ enum reg_class { NO_REGS, AP_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES };
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/* The singl-byte pseudo-op is the default. Override svr[34].h. */
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#undef ASM_BYTE_OP
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#define ASM_BYTE_OP "byte"
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#define ASM_BYTE_OP "\tbyte"
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#undef ASM_OUTPUT_ASCII
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#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
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output_ascii ((FILE), (P), (SIZE))
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@ -28,14 +28,14 @@
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(define_expand "m88k_sccs_id"
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[(match_operand:SI 0 "" "")]
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""
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"{ static char sccs_id[] = \"@(#)m88k.md 2.0.2.1 28 Feb 1992 12:38:31\";
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"{ static char sccs_id[] = \"@(#)m88k.md 2.0.3.3 18 Mar 1992 15:40:12\";
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FAIL; }")
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;; Attribute specifications
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; Target CPU.
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(define_attr "cpu" "m88000,m88100,m88110"
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(symbol_ref "m88k_cpu"))
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(const (symbol_ref "m88k_cpu")))
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; Type of each instruction. Default is arithmetic.
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; I'd like to write the list as this, but genattrtab won't accept it.
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@ -167,7 +167,7 @@
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; Describing stores is currently not useful. The suggestion here is that the
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; function unit ordering has already been established (writeback is last) and
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; that store insns use the units in an unusal order.
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; that store insns use the units in an unusual order.
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;(define_function_unit "writeback" 1 1 (eq_attr "type" "store,mstore") 0 1)
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;(define_function_unit "memory" 1 3 (eq_attr "type" "store,mstore") 1 2)
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@ -189,7 +189,12 @@
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(match_operand:SI 2 "int5_operand" ""))
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(match_operand:SI 3 "int5_operand" "")))]
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"INTVAL (operands [2]) <= INTVAL (operands [3])"
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"ext %0,%1,%w3<(%3-%2)>")
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"*
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{
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operands[4] = gen_rtx (CONST_INT, SImode,
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INTVAL (operands[3]) - INTVAL (operands[2]));
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return \"ext %0,%1,%w3<%4>\"; /* <(%3-%2)> */
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}")
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=r")
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@ -197,7 +202,12 @@
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(match_operand:SI 2 "int5_operand" ""))
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(match_operand:SI 3 "int5_operand" "")))]
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"INTVAL (operands [2]) <= INTVAL (operands [3])"
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"extu %0,%1,%w3<(%3-%2)>")
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"*
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{
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operands[4] = gen_rtx (CONST_INT, SImode,
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INTVAL (operands[3]) - INTVAL (operands[2]));
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return \"extu %0,%1,%w3<%4>\"; /* <(%3-%2)> */
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}")
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;; Optimize possible cases of the set instruction.
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@ -2653,7 +2663,12 @@
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(match_operand:SI 2 "int5_operand" "")
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(match_operand:SI 3 "int5_operand" "")))]
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""
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"ext %0,%1,%2<(32-%2-%3)>")
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"*
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{
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operands[4] = gen_rtx (CONST_INT, SImode,
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(32 - INTVAL (operands[2])) - INTVAL (operands[3]));
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return \"ext %0,%1,%2<%4>\"; /* <(32-%2-%3)> */
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}")
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=r")
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@ -2669,7 +2684,12 @@
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(match_operand:SI 2 "int5_operand" "")
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(match_operand:SI 3 "int5_operand" "")))]
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""
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"extu %0,%1,%2<(32-%2-%3)>")
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"*
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{
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operands[4] = gen_rtx (CONST_INT, SImode,
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(32 - INTVAL (operands[2])) - INTVAL (operands[3]));
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return \"extu %0,%1,%2<%4>\"; /* <(32-%2-%3)> */
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}")
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(define_insn ""
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[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
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@ -2677,7 +2697,12 @@
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(match_operand:SI 2 "int5_operand" ""))
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(const_int 0))]
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""
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"clr %0,%0,%1<(32-%1-%2)>")
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"*
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{
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operands[3] = gen_rtx (CONST_INT, SImode,
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(32 - INTVAL (operands[1])) - INTVAL (operands[2]));
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return \"clr %0,%0,%1<%3>\"; /* <(32-%1-%2)> */
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}")
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(define_insn ""
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[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
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@ -2685,7 +2710,12 @@
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(match_operand:SI 2 "int5_operand" ""))
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(const_int -1))]
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""
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"set %0,%0,%1<(32-%1-%2)>")
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"*
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{
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operands[3] = gen_rtx (CONST_INT, SImode,
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(32 - INTVAL (operands[1])) - INTVAL (operands[2]));
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return \"set %0,%0,%1<%3>\"; /* <(32-%1-%2)> */
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}")
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(define_insn ""
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[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "=r")
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