sse.md (vec_extract_hi_<mode>, [...]): Use vextracti128 instead of vextractf128 for -mavx2 and integer vectors.
* config/i386/sse.md (vec_extract_hi_<mode>, vec_extract_hi_v16hi, vec_extract_hi_v32qi): Use vextracti128 instead of vextractf128 for -mavx2 and integer vectors. For V4DFmode fix up mode attribute. (VEC_EXTRACT_MODE): For TARGET_AVX add 32-byte vectors. (vec_set_lo_<mode>, vec_set_hi_<mode>): For VI8F_256 modes use V4DF instead of V8SF mode attribute. (avx2_extracti128): Change into define_expand. * config/i386/i386.c (ix86_expand_vector_extract): Handle 32-byte vector modes if TARGET_AVX. * gcc.target/i386/sse2-extract-1.c: New test. * gcc.target/i386/avx-extract-1.c: New test. From-SVN: r178915
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
6deb519753
commit
6e2cb39139
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@ -1,3 +1,16 @@
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2011-09-16 Jakub Jelinek <jakub@redhat.com>
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* config/i386/sse.md (vec_extract_hi_<mode>,
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vec_extract_hi_v16hi, vec_extract_hi_v32qi): Use
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vextracti128 instead of vextractf128 for -mavx2 and
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integer vectors. For V4DFmode fix up mode attribute.
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(VEC_EXTRACT_MODE): For TARGET_AVX add 32-byte vectors.
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(vec_set_lo_<mode>, vec_set_hi_<mode>): For VI8F_256 modes use V4DF
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instead of V8SF mode attribute.
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(avx2_extracti128): Change into define_expand.
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* config/i386/i386.c (ix86_expand_vector_extract): Handle
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32-byte vector modes if TARGET_AVX.
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2011-09-16 Georg-Johann Lay <avr@gjlay.de>
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* config/avr/avr.md: (umulqihi3, mulqihi3): Write as one pattern.
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@ -32587,6 +32587,84 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt)
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use_vec_extr = TARGET_SSE4_1;
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break;
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case V8SFmode:
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if (TARGET_AVX)
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{
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tmp = gen_reg_rtx (V4SFmode);
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if (elt < 4)
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emit_insn (gen_vec_extract_lo_v8sf (tmp, vec));
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else
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emit_insn (gen_vec_extract_hi_v8sf (tmp, vec));
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ix86_expand_vector_extract (false, target, tmp, elt & 3);
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return;
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}
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break;
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case V4DFmode:
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if (TARGET_AVX)
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{
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tmp = gen_reg_rtx (V2DFmode);
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if (elt < 2)
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emit_insn (gen_vec_extract_lo_v4df (tmp, vec));
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else
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emit_insn (gen_vec_extract_hi_v4df (tmp, vec));
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ix86_expand_vector_extract (false, target, tmp, elt & 1);
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return;
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}
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break;
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case V32QImode:
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if (TARGET_AVX)
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{
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tmp = gen_reg_rtx (V16QImode);
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if (elt < 16)
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emit_insn (gen_vec_extract_lo_v32qi (tmp, vec));
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else
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emit_insn (gen_vec_extract_hi_v32qi (tmp, vec));
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ix86_expand_vector_extract (false, target, tmp, elt & 15);
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return;
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}
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break;
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case V16HImode:
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if (TARGET_AVX)
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{
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tmp = gen_reg_rtx (V8HImode);
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if (elt < 8)
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emit_insn (gen_vec_extract_lo_v16hi (tmp, vec));
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else
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emit_insn (gen_vec_extract_hi_v16hi (tmp, vec));
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ix86_expand_vector_extract (false, target, tmp, elt & 7);
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return;
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}
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break;
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case V8SImode:
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if (TARGET_AVX)
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{
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tmp = gen_reg_rtx (V4SImode);
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if (elt < 4)
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emit_insn (gen_vec_extract_lo_v8si (tmp, vec));
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else
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emit_insn (gen_vec_extract_hi_v8si (tmp, vec));
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ix86_expand_vector_extract (false, target, tmp, elt & 3);
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return;
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}
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break;
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case V4DImode:
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if (TARGET_AVX)
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{
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tmp = gen_reg_rtx (V2DImode);
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if (elt < 2)
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emit_insn (gen_vec_extract_lo_v4di (tmp, vec));
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else
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emit_insn (gen_vec_extract_hi_v4di (tmp, vec));
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ix86_expand_vector_extract (false, target, tmp, elt & 1);
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return;
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}
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break;
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case V8QImode:
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/* ??? Could extract the appropriate HImode element and shift. */
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default:
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@ -3827,13 +3827,23 @@
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(match_operand:VI8F_256 1 "register_operand" "x,x")
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(parallel [(const_int 2) (const_int 3)])))]
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"TARGET_AVX"
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"vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set (attr "mode")
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(if_then_else
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(and (match_test "TARGET_AVX2")
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(eq (const_string "<MODE>mode") (const_string "V4DImode")))
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(const_string "OI")
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(const_string "V4DF")))])
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(define_insn_and_split "vec_extract_lo_<mode>"
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[(set (match_operand:<ssehalfvecmode> 0 "nonimmediate_operand" "=x,m")
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@ -3862,13 +3872,23 @@
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(parallel [(const_int 4) (const_int 5)
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(const_int 6) (const_int 7)])))]
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"TARGET_AVX"
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"vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set (attr "mode")
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(if_then_else
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(and (match_test "TARGET_AVX2")
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(eq (const_string "<MODE>mode") (const_string "V8SImode")))
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(const_string "OI")
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(const_string "V8SF")))])
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(define_insn_and_split "vec_extract_lo_v16hi"
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[(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,m")
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@ -3901,13 +3921,21 @@
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(const_int 12) (const_int 13)
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(const_int 14) (const_int 15)])))]
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"TARGET_AVX"
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"vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set (attr "mode")
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(if_then_else (match_test "TARGET_AVX2")
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(const_string "OI")
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(const_string "V8SF")))])
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(define_insn_and_split "vec_extract_lo_v32qi"
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[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
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@ -3948,13 +3976,21 @@
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(const_int 28) (const_int 29)
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(const_int 30) (const_int 31)])))]
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"TARGET_AVX"
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"vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set (attr "mode")
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(if_then_else (match_test "TARGET_AVX2")
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(const_string "OI")
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(const_string "V8SF")))])
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(define_insn "*sse4_1_extractps"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=rm")
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@ -3988,7 +4024,10 @@
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;; Modes handled by vec_extract patterns.
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(define_mode_iterator VEC_EXTRACT_MODE
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[V16QI V8HI V4SI V2DI
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[(V32QI "TARGET_AVX") V16QI
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(V16HI "TARGET_AVX") V8HI
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(V8SI "TARGET_AVX") V4SI
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(V4DI "TARGET_AVX") V2DI
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(V8SF "TARGET_AVX") V4SF
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(V4DF "TARGET_AVX") V2DF])
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@ -11916,7 +11955,7 @@
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "V4DF")])
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(define_insn "vec_set_hi_<mode>"
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[(set (match_operand:VI8F_256 0 "register_operand" "=x")
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@ -11931,7 +11970,7 @@
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "V4DF")])
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(define_insn "vec_set_lo_<mode>"
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[(set (match_operand:VI4F_256 0 "register_operand" "=x")
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@ -12122,17 +12161,29 @@
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DONE;
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})
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(define_insn "avx2_extracti128"
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[(set (match_operand:V2DI 0 "register_operand" "=x")
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(vec_select:V2DI
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(match_operand:V4DI 1 "nonimmediate_operand" "xm")
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(parallel [(match_operand:SI 2 "const_0_to_1_operand" "n")])))]
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(define_expand "avx2_extracti128"
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[(match_operand:V2DI 0 "nonimmediate_operand" "")
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(match_operand:V4DI 1 "register_operand" "")
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(match_operand:SI 2 "const_0_to_1_operand" "")]
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"TARGET_AVX2"
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"vextracti128\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix_extra" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "OI")])
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{
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rtx (*insn)(rtx, rtx);
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switch (INTVAL (operands[2]))
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{
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case 0:
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insn = gen_vec_extract_lo_v4di;
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break;
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case 1:
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insn = gen_vec_extract_hi_v4di;
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break;
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default:
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gcc_unreachable ();
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}
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emit_insn (insn (operands[0], operands[1]));
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DONE;
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})
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(define_expand "avx2_inserti128"
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[(match_operand:V4DI 0 "register_operand" "")
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@ -1,3 +1,8 @@
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2011-09-16 Jakub Jelinek <jakub@redhat.com>
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* gcc.target/i386/sse2-extract-1.c: New test.
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* gcc.target/i386/avx-extract-1.c: New test.
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2011-09-16 Terry Guo <terry.guo@arm.com>
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* gcc.dg/tree-ssa/foldconst-3.c: Don't use short enums.
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@ -0,0 +1,5 @@
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/* { dg-do run } */
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/* { dg-options "-O2 -mavx" } */
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/* { dg-require-effective-target avx_runtime } */
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#include "sse2-extract-1.c"
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@ -0,0 +1,102 @@
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/* { dg-do run } */
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/* { dg-options "-O2 -msse2" } */
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/* { dg-require-effective-target sse2_runtime } */
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extern void abort (void);
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typedef unsigned long long uint64_t;
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#define vector(elcount, type) \
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__attribute__((vector_size((elcount)*sizeof(type)))) type
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#define FN(elcount, type, idx) \
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__attribute__((noinline, noclone)) \
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type f##type##elcount##_##idx (vector (elcount, type) x) { return x[idx] + 1; }
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#define T2(elcount, type) \
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H (elcount, type) \
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F (elcount, type, 0) \
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F (elcount, type, 1)
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#define T4(elcount, type) \
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T2 (elcount, type) \
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F (elcount, type, 2) \
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F (elcount, type, 3)
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#define T8(elcount, type) \
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T4 (elcount, type) \
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F (elcount, type, 4) \
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F (elcount, type, 5) \
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F (elcount, type, 6) \
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F (elcount, type, 7)
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#define T16(elcount, type) \
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T8 (elcount, type) \
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F (elcount, type, 8) \
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F (elcount, type, 9) \
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F (elcount, type, 10) \
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F (elcount, type, 11) \
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F (elcount, type, 12) \
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F (elcount, type, 13) \
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F (elcount, type, 14) \
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F (elcount, type, 15)
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#define T32(elcount, type) \
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T16 (elcount, type) \
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F (elcount, type, 16) \
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F (elcount, type, 17) \
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F (elcount, type, 18) \
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F (elcount, type, 19) \
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F (elcount, type, 20) \
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F (elcount, type, 21) \
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F (elcount, type, 22) \
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F (elcount, type, 23) \
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F (elcount, type, 24) \
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F (elcount, type, 25) \
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F (elcount, type, 26) \
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F (elcount, type, 27) \
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F (elcount, type, 28) \
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F (elcount, type, 29) \
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F (elcount, type, 30) \
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F (elcount, type, 31)
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#define TESTS_SSE2 \
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T2 (2, double) E \
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T2 (2, uint64_t) E \
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T4 (4, float) E \
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T4 (4, int) E \
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T8 (8, short) E \
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T16 (16, char) E
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#define TESTS_AVX \
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T4 (4, double) E \
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T4 (4, uint64_t) E \
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T8 (8, float) E \
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T8 (8, int) E \
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T16 (16, short) E \
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T32 (32, char) E
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#ifdef __AVX__
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#define TESTS TESTS_SSE2 TESTS_AVX
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#else
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#define TESTS TESTS_SSE2
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#endif
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#define F FN
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#define H(elcount, type)
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#define E
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TESTS
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int
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main ()
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{
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#undef F
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#undef H
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#undef E
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#define H(elcount, type) \
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vector (elcount, type) v##type##elcount = {
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#define E };
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#define F(elcount, type, idx) idx + 1,
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TESTS
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#undef F
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#undef H
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#undef E
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#define H(elcount, type)
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#define E
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#define F(elcount, type, idx) \
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if (f##type##elcount##_##idx (v##type##elcount) != idx + 2) \
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abort ();
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TESTS
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return 0;
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}
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