S/390: Further bswap enhancements.
gcc/ChangeLog: 2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390.md ("bswap<mode>2"): Add support for strv and strvg. ("bswaphi2"): New pattern. New splitter for HI reg-reg bswap. gcc/testsuite/ChangeLog: 2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/bswap-1.c (foo64c, foo32a, foo32c): New functions. * gcc.target/s390/bswaphi-1.c: New test. From-SVN: r231152
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* config/s390/s390.md ("bswap<mode>2"): Add support for strv and
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strvg.
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("bswaphi2"): New pattern.
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New splitter for HI reg-reg bswap.
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2015-11-27 Jiri Engelthaler <engycz@gmail.com>
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PR driver/68029
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@ -10451,25 +10451,43 @@
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; FIXME: There is also mvcin but we cannot use it since src and target
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; may overlap.
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(define_insn "bswap<mode>2"
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[(set (match_operand:GPR 0 "register_operand" "=d, d")
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(bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT")))]
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[(set (match_operand:GPR 0 "nonimmediate_operand" "=d, d,RT")
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(bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT, d")))]
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"TARGET_CPU_ZARCH"
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"@
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lrv<g>r\t%0,%1
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lrv<g>\t%0,%1"
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[(set_attr "type" "*,load")
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(set_attr "op_type" "RRE,RXY")
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lrv<g>\t%0,%1
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strv<g>\t%1,%0"
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[(set_attr "type" "*,load,store")
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(set_attr "op_type" "RRE,RXY,RXY")
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(set_attr "z10prop" "z10_super")])
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(define_insn "bswaphi2"
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[(set (match_operand:HI 0 "register_operand" "=d")
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(bswap:HI (match_operand:HI 1 "memory_operand" "RT")))]
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[(set (match_operand:HI 0 "nonimmediate_operand" "=d, d,RT")
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(bswap:HI (match_operand:HI 1 "nonimmediate_operand" " d,RT, d")))]
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"TARGET_CPU_ZARCH"
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"lrvh\t%0,%1"
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[(set_attr "type" "load")
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(set_attr "op_type" "RXY")
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"@
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#
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lrvh\t%0,%1
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strvh\t%1,%0"
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[(set_attr "type" "*,load,store")
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(set_attr "op_type" "RRE,RXY,RXY")
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(set_attr "z10prop" "z10_super")])
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(define_split
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[(set (match_operand:HI 0 "register_operand" "")
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(bswap:HI (match_operand:HI 1 "register_operand" "")))]
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"TARGET_CPU_ZARCH"
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[(set (match_dup 2) (bswap:SI (match_dup 3)))
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(set (match_dup 2) (lshiftrt:SI (match_dup 2)
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(const_int 16)))
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(set (match_dup 0) (subreg:HI (match_dup 2) 2))]
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{
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operands[2] = gen_reg_rtx (SImode);
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operands[3] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
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})
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;
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; Population count instruction
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;
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@ -1,3 +1,8 @@
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* gcc.target/s390/bswap-1.c (foo64c, foo32a, foo32c): New functions.
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* gcc.target/s390/bswaphi-1.c: New test.
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* lib/target-supports.exp: Add s390 and s390x to the list of long
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@ -21,16 +21,32 @@ foo64b ()
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}
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/* { dg-final { scan-assembler-times "lrvg\t%r2,0\\(%r\[0-9\]*\\)" 1 { target lp64 } } } */
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void
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foo64c (uint64_t a)
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{
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u64 = __builtin_bswap64 (a);
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}
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/* { dg-final { scan-assembler-times "strvg\t%r2,0\\(%r\[0-9\]*\\)" 1 { target lp64 } } } */
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uint32_t
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foo32 ()
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foo32a (uint32_t a)
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{
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return __builtin_bswap32 (a);
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}
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/* { dg-final { scan-assembler-times "lrvr\t%r2,%r2" 1 } } */
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uint32_t
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foo32b ()
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{
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return __builtin_bswap32 (u32);
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}
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/* { dg-final { scan-assembler-times "lrv\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */
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uint16_t
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foo16 ()
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void
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foo32c (uint32_t a)
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{
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return __builtin_bswap16 (u16);
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u32 = __builtin_bswap32 (a);
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}
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/* { dg-final { scan-assembler-times "lrvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */
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/* { dg-final { scan-assembler-times "strv\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */
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gcc/testsuite/gcc.target/s390/bswaphi-1.c
Normal file
27
gcc/testsuite/gcc.target/s390/bswaphi-1.c
Normal file
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/* { dg-do compile } */
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/* { dg-options "-O3 -march=z900 -mzarch" } */
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#include <stdint.h>
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uint16_t u16;
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uint16_t
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foo16a (uint16_t a)
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{
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return __builtin_bswap16 (a);
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}
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/* { dg-final { scan-assembler-times "lrvr\t%r2,%r\[0-9\]*" 1 } } */
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uint16_t
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foo16b ()
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{
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return __builtin_bswap16 (u16);
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}
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/* { dg-final { scan-assembler-times "lrvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */
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void
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foo16c (uint16_t a)
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{
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u16 = __builtin_bswap16 (a);
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}
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/* { dg-final { scan-assembler-times "strvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */
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