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rx: Split cstoresi4 post-reload.

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This will allow elimination of the compare.

From-SVN: r168920
This commit is contained in:
Richard Henderson 2011-01-17 09:55:33 -08:00 committed by Richard Henderson
parent e963cb1a8a
commit 6f7310f2b4
4 changed files with 34 additions and 16 deletions
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5
gcc/ChangeLog
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@ -1,5 +1,10 @@
2011-01-17 Richard Henderson <rth@redhat.com>
* config/rx/rx.c (rx_float_compare_mode): Remove.
* config/rx/rx.h (rx_float_compare_mode): Remove.
* config/rx/rx.md (cstoresi4): Split after reload.
(*sccc): New pattern.
* config/rx/predicates.md (label_ref_operand): New.
(rx_z_comparison_operator): New.
(rx_zs_comparison_operator): New.

2
gcc/config/rx/rx.c
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@ -363,8 +363,6 @@ rx_assemble_integer (rtx x, unsigned int size, int is_aligned)
}
int rx_float_compare_mode;
/* Handles the insertion of a single operand into the assembler output.
The %<letter> directives supported are:

2
gcc/config/rx/rx.h
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@ -595,8 +595,6 @@ typedef unsigned int CUMULATIVE_ARGS;
they contain are always computed between two same-section symbols. */
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
extern int rx_float_compare_mode;
/* This is a version of REG_P that also returns TRUE for SUBREGs. */
#define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)

41
gcc/config/rx/rx.md
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@ -706,20 +706,37 @@
(set_attr "timings" "45")] ;; The timing is a guesstimate average timing.
)
;; FIXME: Add memory destination options ?
(define_insn "cstoresi4"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r")
(define_insn_and_split "cstoresi4"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operator:SI 1 "comparison_operator"
[(match_operand:SI 2 "register_operand" "r,r,r,r,r,r,r")
(match_operand:SI 3 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")]))
(clobber (reg:CC CC_REG))] ;; Because the cc flags are set based on comparing ops 2 & 3 not the value in op 0.
[(match_operand:SI 2 "register_operand" "r")
(match_operand:SI 3 "rx_source_operand" "riQ")]))
(clobber (reg:CC CC_REG))]
""
{
rx_float_compare_mode = false;
return "cmp\t%Q3, %Q2\n\tsc%B1.L\t%0";
}
[(set_attr "timings" "22,22,22,22,22,22,44")
(set_attr "length" "5,5,6,7,8,9,8")]
"#"
"reload_completed"
[(const_int 0)]
{
rtx flags, x;
flags = gen_rtx_REG (CCmode, CC_REG);
x = gen_rtx_COMPARE (CCmode, operands[2], operands[3]);
x = gen_rtx_SET (VOIDmode, flags, x);
emit_insn (x);
x = gen_rtx_fmt_ee (GET_CODE (operands[1]), SImode, flags, const0_rtx);
x = gen_rtx_SET (VOIDmode, operands[0], x);
emit_insn (x);
DONE;
})
(define_insn "*sccc"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operator:SI 1 "comparison_operator"
[(reg CC_REG) (const_int 0)]))]
"reload_completed"
"sc%B1.L\t%0"
[(set_attr "length" "3")]
)
(define_expand "movsicc"