re PR target/80376 (Some vec_xxpermdi usage lead to ICE)

2017-04-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/80376
	PR target/80315
	* config/rs6000/rs6000.c (rs6000_expand_unop_builtin): Return
	CONST0_RTX (mode) rather than const0_rtx where appropriate.
	(rs6000_expand_binop_builtin): Likewise.
	(rs6000_expand_ternop_builtin): Likewise; also add missing
	vsx_xxpermdi_* variants; also fix typo (arg1 => arg2) for
	vshasigma built-ins.
	* doc/extend.texi: Document that vec_xxpermdi's third argument
	must be a constant.

From-SVN: r246859
This commit is contained in:
Bill Schmidt 2017-04-11 21:37:16 +00:00 committed by William Schmidt
parent 125db6a1c6
commit 6f78039049
3 changed files with 40 additions and 21 deletions

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@ -1,3 +1,16 @@
2017-04-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/80376
PR target/80315
* config/rs6000/rs6000.c (rs6000_expand_unop_builtin): Return
CONST0_RTX (mode) rather than const0_rtx where appropriate.
(rs6000_expand_binop_builtin): Likewise.
(rs6000_expand_ternop_builtin): Likewise; also add missing
vsx_xxpermdi_* variants; also fix typo (arg1 => arg2) for
vshasigma built-ins.
* doc/extend.texi: Document that vec_xxpermdi's third argument
must be a constant.
2017-04-11 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (dimode_scalar_chain::compute_convert_gain):

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@ -14582,7 +14582,7 @@ rs6000_expand_unop_builtin (enum insn_code icode, tree exp, rtx target)
|| INTVAL (op0) < -16)
{
error ("argument 1 must be a 5-bit signed literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
@ -14685,7 +14685,7 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg1) & ~0x1f)
{
error ("argument 2 must be a 5-bit unsigned literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_dfptstsfi_eq_dd
@ -15611,13 +15611,18 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg2) & ~0xf)
{
error ("argument 3 must be a 4-bit unsigned literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_vsx_xxpermdi_v2df
|| icode == CODE_FOR_vsx_xxpermdi_v2di
|| icode == CODE_FOR_vsx_xxpermdi_v2df_be
|| icode == CODE_FOR_vsx_xxpermdi_v2di_be
|| icode == CODE_FOR_vsx_xxpermdi_v1ti
|| icode == CODE_FOR_vsx_xxpermdi_v4sf
|| icode == CODE_FOR_vsx_xxpermdi_v4si
|| icode == CODE_FOR_vsx_xxpermdi_v8hi
|| icode == CODE_FOR_vsx_xxpermdi_v16qi
|| icode == CODE_FOR_vsx_xxsldwi_v16qi
|| icode == CODE_FOR_vsx_xxsldwi_v8hi
|| icode == CODE_FOR_vsx_xxsldwi_v4si
@ -15631,7 +15636,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg2) & ~0x3)
{
error ("argument 3 must be a 2-bit unsigned literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_vsx_set_v2df
@ -15651,7 +15656,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg2) & ~0x1)
{
error ("argument 3 must be a 1-bit unsigned literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_dfp_ddedpd_dd
@ -15663,7 +15668,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg2) & ~0x3)
{
error ("argument 1 must be 0 or 2");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_dfp_denbcd_dd
@ -15675,7 +15680,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg0) & ~0x1)
{
error ("argument 1 must be a 1-bit unsigned literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_dfp_dscli_dd
@ -15689,7 +15694,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
|| TREE_INT_CST_LOW (arg1) & ~0x3f)
{
error ("argument 2 must be a 6-bit unsigned literal");
return const0_rtx;
return CONST0_RTX (tmode);
}
}
else if (icode == CODE_FOR_crypto_vshasigmaw
@ -15701,14 +15706,14 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
if (TREE_CODE (arg1) != INTEGER_CST || wi::geu_p (arg1, 2))
{
error ("argument 2 must be 0 or 1");
return const0_rtx;
return CONST0_RTX (tmode);
}
STRIP_NOPS (arg2);
if (TREE_CODE (arg2) != INTEGER_CST || wi::geu_p (arg1, 16))
if (TREE_CODE (arg2) != INTEGER_CST || wi::geu_p (arg2, 16))
{
error ("argument 3 must be in the range 0..15");
return const0_rtx;
return CONST0_RTX (tmode);
}
}

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@ -17623,20 +17623,21 @@ void vec_vsx_st (vector bool char, int, vector bool char *);
void vec_vsx_st (vector bool char, int, unsigned char *);
void vec_vsx_st (vector bool char, int, signed char *);
vector double vec_xxpermdi (vector double, vector double, int);
vector float vec_xxpermdi (vector float, vector float, int);
vector long long vec_xxpermdi (vector long long, vector long long, int);
vector double vec_xxpermdi (vector double, vector double, const int);
vector float vec_xxpermdi (vector float, vector float, const int);
vector long long vec_xxpermdi (vector long long, vector long long, const int);
vector unsigned long long vec_xxpermdi (vector unsigned long long,
vector unsigned long long, int);
vector int vec_xxpermdi (vector int, vector int, int);
vector unsigned long long, const int);
vector int vec_xxpermdi (vector int, vector int, const int);
vector unsigned int vec_xxpermdi (vector unsigned int,
vector unsigned int, int);
vector short vec_xxpermdi (vector short, vector short, int);
vector unsigned int, const int);
vector short vec_xxpermdi (vector short, vector short, const int);
vector unsigned short vec_xxpermdi (vector unsigned short,
vector unsigned short, int);
vector signed char vec_xxpermdi (vector signed char, vector signed char, int);
vector unsigned short, const int);
vector signed char vec_xxpermdi (vector signed char, vector signed char,
const int);
vector unsigned char vec_xxpermdi (vector unsigned char,
vector unsigned char, int);
vector unsigned char, const int);
vector double vec_xxsldi (vector double, vector double, int);
vector float vec_xxsldi (vector float, vector float, int);