backport: re PR target/55195 (shorten_branches generates incorrect forward branch distances)
Backport from mainline: 2012-11-12 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> PR target/55195 * config/pa/pa.md (type): Add sibcall and sh_func_adrs insn types. (in_branch_delay): Don't allow sibcall or sh_func_adrs insns. (in_nullified_branch_delay): Likewise. (in_call_delay): Likewise. Define delay for sibcall insns. Adjust Z3 and Z4 insn reservations for new types. Add opaque cond to mark all calls, sibcalls, dyncalls and the $$sh_func_adrs call as variable. Update type of sibcalls and $$sh_func_adrs call. * config/pa/pa.c (pa_adjust_insn_length): Revise to return updated length instead of adjustment. Handle negative and undefined call adjustments for insn_default_length. Remove adjustment for millicode insn with unfilled delay slot. (pa_output_millicode_call): Update for revised millicode length. * config/pa/pa.h (ADJUST_INSN_LENGTH): Revise to set LENGTH. From-SVN: r194027
This commit is contained in:
John David Anglin
John David Anglin
parent
21d35db347
commit
6f7a6b458f
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@ -1,3 +1,24 @@
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2012-12-01 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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Backport from mainline:
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2012-11-12 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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PR target/55195
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* config/pa/pa.md (type): Add sibcall and sh_func_adrs insn types.
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(in_branch_delay): Don't allow sibcall or sh_func_adrs insns.
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(in_nullified_branch_delay): Likewise.
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(in_call_delay): Likewise.
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Define delay for sibcall insns. Adjust Z3 and Z4 insn reservations for
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new types. Add opaque cond to mark all calls, sibcalls, dyncalls and
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the $$sh_func_adrs call as variable. Update type of sibcalls and
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$$sh_func_adrs call.
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* config/pa/pa.c (pa_adjust_insn_length): Revise to return updated
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length instead of adjustment. Handle negative and undefined call
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adjustments for insn_default_length. Remove adjustment for millicode
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insn with unfilled delay slot.
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(pa_output_millicode_call): Update for revised millicode length.
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* config/pa/pa.h (ADJUST_INSN_LENGTH): Revise to set LENGTH.
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2012-11-29 Kai Tietz <ktietz@redhat.com>
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PR target/55171
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@ -4851,12 +4851,9 @@ pa_issue_rate (void)
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/* Return any length adjustment needed by INSN which already has its length
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computed as LENGTH. Return zero if no adjustment is necessary.
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For the PA: function calls, millicode calls, and backwards short
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conditional branches with unfilled delay slots need an adjustment by +1
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(to account for the NOP which will be inserted into the instruction stream).
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/* Return any length plus adjustment needed by INSN which already has
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its length computed as LENGTH. Return LENGTH if no adjustment is
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necessary.
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Also compute the length of an inline block move here as it is too
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complicated to express as a length attribute in pa.md. */
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@ -4865,19 +4862,40 @@ pa_adjust_insn_length (rtx insn, int length)
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{
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rtx pat = PATTERN (insn);
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/* If length is negative or undefined, provide initial length. */
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if ((unsigned int) length >= INT_MAX)
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{
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if (GET_CODE (pat) == SEQUENCE)
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insn = XVECEXP (pat, 0, 0);
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switch (get_attr_type (insn))
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{
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case TYPE_MILLI:
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length = pa_attr_length_millicode_call (insn);
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break;
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case TYPE_CALL:
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length = pa_attr_length_call (insn, 0);
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break;
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case TYPE_SIBCALL:
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length = pa_attr_length_call (insn, 1);
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break;
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case TYPE_DYNCALL:
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length = pa_attr_length_indirect_call (insn);
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break;
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case TYPE_SH_FUNC_ADRS:
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length = pa_attr_length_millicode_call (insn) + 20;
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break;
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default:
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gcc_unreachable ();
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}
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}
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/* Jumps inside switch tables which have unfilled delay slots need
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adjustment. */
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if (GET_CODE (insn) == JUMP_INSN
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&& GET_CODE (pat) == PARALLEL
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&& get_attr_type (insn) == TYPE_BTABLE_BRANCH)
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return 4;
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/* Millicode insn with an unfilled delay slot. */
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else if (GET_CODE (insn) == INSN
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&& GET_CODE (pat) != SEQUENCE
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&& GET_CODE (pat) != USE
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&& GET_CODE (pat) != CLOBBER
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&& get_attr_type (insn) == TYPE_MILLI)
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return 4;
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length += 4;
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/* Block move pattern. */
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else if (GET_CODE (insn) == INSN
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&& GET_CODE (pat) == PARALLEL
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@ -4886,7 +4904,7 @@ pa_adjust_insn_length (rtx insn, int length)
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&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 1)) == MEM
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&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode
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&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 1)) == BLKmode)
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return compute_movmem_length (insn) - 4;
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length += compute_movmem_length (insn) - 4;
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/* Block clear pattern. */
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else if (GET_CODE (insn) == INSN
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&& GET_CODE (pat) == PARALLEL
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@ -4894,7 +4912,7 @@ pa_adjust_insn_length (rtx insn, int length)
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&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 0)) == MEM
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&& XEXP (XVECEXP (pat, 0, 0), 1) == const0_rtx
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&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode)
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return compute_clrmem_length (insn) - 4;
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length += compute_clrmem_length (insn) - 4;
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/* Conditional branch with an unfilled delay slot. */
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else if (GET_CODE (insn) == JUMP_INSN && ! simplejump_p (insn))
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{
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@ -4903,11 +4921,11 @@ pa_adjust_insn_length (rtx insn, int length)
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&& length == 4
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&& JUMP_LABEL (insn) != NULL_RTX
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&& ! forward_branch_p (insn))
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return 4;
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length += 4;
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else if (GET_CODE (pat) == PARALLEL
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&& get_attr_type (insn) == TYPE_PARALLEL_BRANCH
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&& length == 4)
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return 4;
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length += 4;
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/* Adjust dbra insn with short backwards conditional branch with
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unfilled delay slot -- only for case where counter is in a
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general register register. */
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@ -4917,11 +4935,9 @@ pa_adjust_insn_length (rtx insn, int length)
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&& ! FP_REG_P (XEXP (XVECEXP (pat, 0, 1), 0))
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&& length == 4
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&& ! forward_branch_p (insn))
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return 4;
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else
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return 0;
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length += 4;
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}
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return 0;
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return length;
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}
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/* Implement the TARGET_PRINT_OPERAND_PUNCT_VALID_P hook. */
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@ -7481,15 +7497,13 @@ pa_output_millicode_call (rtx insn, rtx call_dest)
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/* Handle the common case where we are sure that the branch will
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reach the beginning of the $CODE$ subspace. The within reach
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form of the $$sh_func_adrs call has a length of 28. Because
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it has an attribute type of multi, it never has a nonzero
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sequence length. The length of the $$sh_func_adrs is the same
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as certain out of reach PIC calls to other routines. */
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form of the $$sh_func_adrs call has a length of 28. Because it
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has an attribute type of sh_func_adrs, it never has a nonzero
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sequence length (i.e., the delay slot is never filled). */
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if (!TARGET_LONG_CALLS
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&& ((seq_length == 0
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&& (attr_length == 12
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|| (attr_length == 28 && get_attr_type (insn) == TYPE_MULTI)))
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|| (seq_length != 0 && attr_length == 8)))
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&& (attr_length == 8
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|| (attr_length == 28
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&& get_attr_type (insn) == TYPE_SH_FUNC_ADRS)))
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{
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output_asm_insn ("{bl|b,l} %0,%2", xoperands);
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}
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@ -1273,8 +1273,8 @@ do { \
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/* Handling the special cases is going to get too complicated for a macro,
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just call `pa_adjust_insn_length' to do the real work. */
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#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
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LENGTH += pa_adjust_insn_length (INSN, LENGTH);
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#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
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((LENGTH) = pa_adjust_insn_length ((INSN), (LENGTH)))
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/* Millicode insns are actually function calls with some special
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constraints on arguments and register usage.
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@ -81,7 +81,7 @@
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;; type "binary" insns have two input operands (1,2) and one output (0)
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(define_attr "type"
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"move,unary,binary,shift,nullshift,compare,load,store,uncond_branch,btable_branch,branch,cbranch,fbranch,call,dyncall,fpload,fpstore,fpalu,fpcc,fpmulsgl,fpmuldbl,fpdivsgl,fpdivdbl,fpsqrtsgl,fpsqrtdbl,multi,milli,parallel_branch,fpstore_load,store_fpload"
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"move,unary,binary,shift,nullshift,compare,load,store,uncond_branch,btable_branch,branch,cbranch,fbranch,call,sibcall,dyncall,fpload,fpstore,fpalu,fpcc,fpmulsgl,fpmuldbl,fpdivsgl,fpdivdbl,fpsqrtsgl,fpsqrtdbl,multi,milli,sh_func_adrs,parallel_branch,fpstore_load,store_fpload"
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(const_string "binary"))
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(define_attr "pa_combine_type"
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@ -124,7 +124,7 @@
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;; For conditional branches. Frame related instructions are not allowed
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;; because they confuse the unwind support.
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(define_attr "in_branch_delay" "false,true"
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(if_then_else (and (eq_attr "type" "!uncond_branch,btable_branch,branch,cbranch,fbranch,call,dyncall,multi,milli,parallel_branch")
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(if_then_else (and (eq_attr "type" "!uncond_branch,btable_branch,branch,cbranch,fbranch,call,sibcall,dyncall,multi,milli,sh_func_adrs,parallel_branch")
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(eq_attr "length" "4")
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(not (match_test "RTX_FRAME_RELATED_P (insn)")))
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(const_string "true")
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@ -133,7 +133,7 @@
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;; Disallow instructions which use the FPU since they will tie up the FPU
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;; even if the instruction is nullified.
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(define_attr "in_nullified_branch_delay" "false,true"
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(if_then_else (and (eq_attr "type" "!uncond_branch,btable_branch,branch,cbranch,fbranch,call,dyncall,multi,milli,fpcc,fpalu,fpmulsgl,fpmuldbl,fpdivsgl,fpdivdbl,fpsqrtsgl,fpsqrtdbl,parallel_branch")
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(if_then_else (and (eq_attr "type" "!uncond_branch,btable_branch,branch,cbranch,fbranch,call,sibcall,dyncall,multi,milli,sh_func_adrs,fpcc,fpalu,fpmulsgl,fpmuldbl,fpdivsgl,fpdivdbl,fpsqrtsgl,fpsqrtdbl,parallel_branch")
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(eq_attr "length" "4")
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(not (match_test "RTX_FRAME_RELATED_P (insn)")))
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(const_string "true")
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@ -142,7 +142,7 @@
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;; For calls and millicode calls. Allow unconditional branches in the
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;; delay slot.
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(define_attr "in_call_delay" "false,true"
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(cond [(and (eq_attr "type" "!uncond_branch,btable_branch,branch,cbranch,fbranch,call,dyncall,multi,milli,parallel_branch")
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(cond [(and (eq_attr "type" "!uncond_branch,btable_branch,branch,cbranch,fbranch,call,sibcall,dyncall,multi,milli,sh_func_adrs,parallel_branch")
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(eq_attr "length" "4")
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(not (match_test "RTX_FRAME_RELATED_P (insn)")))
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(const_string "true")
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@ -157,6 +157,10 @@
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(define_delay (eq_attr "type" "call")
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[(eq_attr "in_call_delay" "true") (nil) (nil)])
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;; Sibcall delay slot description.
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(define_delay (eq_attr "type" "sibcall")
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[(eq_attr "in_call_delay" "true") (nil) (nil)])
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;; Millicode call delay slot description.
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(define_delay (eq_attr "type" "milli")
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[(eq_attr "in_call_delay" "true") (nil) (nil)])
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@ -611,7 +615,7 @@
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;; to assume have zero latency.
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(define_insn_reservation "Z3" 0
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(and
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(eq_attr "type" "!load,fpload,store,fpstore,uncond_branch,btable_branch,branch,cbranch,fbranch,call,dyncall,multi,milli,parallel_branch,fpcc,fpalu,fpmulsgl,fpmuldbl,fpsqrtsgl,fpsqrtdbl,fpdivsgl,fpdivdbl,fpstore_load,store_fpload")
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(eq_attr "type" "!load,fpload,store,fpstore,uncond_branch,btable_branch,branch,cbranch,fbranch,call,sibcall,dyncall,multi,milli,sh_func_adrs,parallel_branch,fpcc,fpalu,fpmulsgl,fpmuldbl,fpsqrtsgl,fpsqrtdbl,fpdivsgl,fpdivdbl,fpstore_load,store_fpload")
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(eq_attr "cpu" "8000"))
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"inm_8000,rnm_8000")
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@ -619,7 +623,7 @@
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;; retirement unit.
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(define_insn_reservation "Z4" 0
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(and
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(eq_attr "type" "uncond_branch,btable_branch,branch,cbranch,fbranch,call,dyncall,multi,milli,parallel_branch")
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(eq_attr "type" "uncond_branch,btable_branch,branch,cbranch,fbranch,call,sibcall,dyncall,multi,milli,sh_func_adrs,parallel_branch")
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(eq_attr "cpu" "8000"))
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"inm0_8000+inm1_8000,rnm0_8000+rnm1_8000")
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@ -5336,7 +5340,9 @@
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"!TARGET_64BIT"
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"* return pa_output_mul_insn (0, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_insn ""
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[(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25)))
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@ -5347,7 +5353,9 @@
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"TARGET_64BIT"
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"* return pa_output_mul_insn (0, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_expand "muldi3"
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[(set (match_operand:DI 0 "register_operand" "")
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@ -5438,7 +5446,9 @@
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"*
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return pa_output_div_insn (operands, 0, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_insn ""
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[(set (reg:SI 29)
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@ -5452,7 +5462,9 @@
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"*
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return pa_output_div_insn (operands, 0, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_expand "udivsi3"
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[(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" ""))
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@ -5495,7 +5507,9 @@
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"*
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return pa_output_div_insn (operands, 1, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_insn ""
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[(set (reg:SI 29)
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@ -5509,7 +5523,9 @@
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"*
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return pa_output_div_insn (operands, 1, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_expand "modsi3"
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[(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" ""))
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@ -5548,7 +5564,9 @@
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"*
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return pa_output_mod_insn (0, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_insn ""
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[(set (reg:SI 29) (mod:SI (reg:SI 26) (reg:SI 25)))
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@ -5561,7 +5579,9 @@
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"*
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return pa_output_mod_insn (0, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
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(symbol_ref "pa_attr_length_millicode_call (insn)")))])
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(define_expand "umodsi3"
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[(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" ""))
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@ -5600,7 +5620,9 @@
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"*
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return pa_output_mod_insn (1, insn);"
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[(set_attr "type" "milli")
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(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
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(set (attr "length")
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(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_millicode_call (insn)")))])
|
||||
|
||||
(define_insn ""
|
||||
[(set (reg:SI 29) (umod:SI (reg:SI 26) (reg:SI 25)))
|
||||
|
|
@ -5613,7 +5635,9 @@
|
|||
"*
|
||||
return pa_output_mod_insn (1, insn);"
|
||||
[(set_attr "type" "milli")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_millicode_call (insn)")))])
|
||||
|
||||
;;- and instructions
|
||||
;; We define DImode `and` so with DImode `not` we can get
|
||||
|
|
@ -7189,7 +7213,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_call (insn, operands[0], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 0)")))])
|
||||
|
||||
(define_insn "call_symref_pic"
|
||||
[(set (match_operand:SI 2 "register_operand" "=&r") (reg:SI 19))
|
||||
|
|
@ -7266,7 +7292,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_call (insn, operands[0], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 0)")))])
|
||||
|
||||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
|
|
@ -7351,7 +7379,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_call (insn, operands[0], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 0)")))])
|
||||
|
||||
(define_insn "call_reg"
|
||||
[(call (mem:SI (reg:SI 22))
|
||||
|
|
@ -7365,7 +7395,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_indirect_call (insn)")))])
|
||||
|
||||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
|
|
@ -7443,7 +7475,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_indirect_call (insn)")))])
|
||||
|
||||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
|
|
@ -7527,7 +7561,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_indirect_call (insn, operands[0]);
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 12)]
|
||||
(symbol_ref "pa_attr_length_indirect_call (insn)")))])
|
||||
|
||||
(define_expand "call_value"
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
|
|
@ -7653,7 +7689,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_call (insn, operands[1], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 0)")))])
|
||||
|
||||
(define_insn "call_val_symref_pic"
|
||||
[(set (match_operand:SI 3 "register_operand" "=&r") (reg:SI 19))
|
||||
|
|
@ -7736,7 +7774,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_call (insn, operands[1], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 0)")))])
|
||||
|
||||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
|
|
@ -7827,7 +7867,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_call (insn, operands[1], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 0)")))])
|
||||
|
||||
(define_insn "call_val_reg"
|
||||
[(set (match_operand 0 "" "")
|
||||
|
|
@ -7842,7 +7884,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_indirect_call (insn)")))])
|
||||
|
||||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
|
|
@ -7926,7 +7970,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_indirect_call (insn)")))])
|
||||
|
||||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
|
|
@ -8016,7 +8062,9 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
return pa_output_indirect_call (insn, operands[1]);
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 12)]
|
||||
(symbol_ref "pa_attr_length_indirect_call (insn)")))])
|
||||
|
||||
;; Call subroutine returning any type.
|
||||
|
||||
|
|
@ -8109,8 +8157,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
pa_output_arg_descriptor (insn);
|
||||
return pa_output_call (insn, operands[0], 1);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
|
||||
[(set_attr "type" "sibcall")
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 1)")))])
|
||||
|
||||
(define_insn "sibcall_internal_symref_64bit"
|
||||
[(call (mem:SI (match_operand 0 "call_operand_address" ""))
|
||||
|
|
@ -8124,8 +8174,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
pa_output_arg_descriptor (insn);
|
||||
return pa_output_call (insn, operands[0], 1);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
|
||||
[(set_attr "type" "sibcall")
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 1)")))])
|
||||
|
||||
(define_expand "sibcall_value"
|
||||
[(set (match_operand 0 "" "")
|
||||
|
|
@ -8193,8 +8245,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
pa_output_arg_descriptor (insn);
|
||||
return pa_output_call (insn, operands[1], 1);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
|
||||
[(set_attr "type" "sibcall")
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 1)")))])
|
||||
|
||||
(define_insn "sibcall_value_internal_symref_64bit"
|
||||
[(set (match_operand 0 "" "")
|
||||
|
|
@ -8209,8 +8263,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
pa_output_arg_descriptor (insn);
|
||||
return pa_output_call (insn, operands[1], 1);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
|
||||
[(set_attr "type" "sibcall")
|
||||
(set (attr "length")
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 8)]
|
||||
(symbol_ref "pa_attr_length_call (insn, 1)")))])
|
||||
|
||||
(define_insn "nop"
|
||||
[(const_int 0)]
|
||||
|
|
@ -9246,10 +9302,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
gen_rtx_SYMBOL_REF (SImode,
|
||||
\"$$sh_func_adrs\"));
|
||||
}"
|
||||
[(set_attr "type" "multi")
|
||||
[(set_attr "type" "sh_func_adrs")
|
||||
(set (attr "length")
|
||||
(plus (symbol_ref "pa_attr_length_millicode_call (insn)")
|
||||
(const_int 20)))])
|
||||
(cond [(and (match_test "0") (eq (const_int 0) (pc))) (const_int 28)]
|
||||
(plus (symbol_ref "pa_attr_length_millicode_call (insn)")
|
||||
(const_int 20))))])
|
||||
|
||||
;; On the PA, the PIC register is call clobbered, so it must
|
||||
;; be saved & restored around calls by the caller. If the call
|
||||
|
|
|
|||
Loading…
Reference in New Issue