recog.c (split_all_insns_noflow): New.

* recog.c (split_all_insns_noflow): New.
	* rtl.h (split_all_insns_noflow): Declare.
	* ia64.c (ia64_reorg): Use split_all_insns_noflow.
	* m68hc11.c (m68hc11_reorg): Likewise.
	* sh.c (machine_dependent_reorg): Likewise.
	* toplev.c (rest_of_compilation): Likewise for last split_all_insns
	call.

From-SVN: r44312
This commit is contained in:
Jan Hubicka 2001-07-24 20:34:07 +02:00 committed by Jan Hubicka
parent 615cd49b9a
commit 6f862f2fa9
7 changed files with 37 additions and 6 deletions

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@ -1,3 +1,13 @@
Tue Jul 24 20:32:44 CEST 2001 Jan Hubicka <jh@suse.cz>
* recog.c (split_all_insns_noflow): New.
* rtl.h (split_all_insns_noflow): Declare.
* ia64.c (ia64_reorg): Use split_all_insns_noflow.
* m68hc11.c (m68hc11_reorg): Likewise.
* sh.c (machine_dependent_reorg): Likewise.
* toplev.c (rest_of_compilation): Likewise for last split_all_insns
call.
2001-07-18 Andrew Haley <aph@cambridge.redhat.com> 2001-07-18 Andrew Haley <aph@cambridge.redhat.com>
* config/sh/sh.md (ashlsi3_std splitter): Split only after reload. * config/sh/sh.md (ashlsi3_std splitter): Split only after reload.

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@ -6457,7 +6457,7 @@ ia64_reorg (insns)
{ {
/* If optimizing, we'll have split before scheduling. */ /* If optimizing, we'll have split before scheduling. */
if (optimize == 0) if (optimize == 0)
split_all_insns (0); split_all_insns_noflow ();
/* Make sure the CFG and global_live_at_start are correct /* Make sure the CFG and global_live_at_start are correct
for emit_predicate_relation_info. */ for emit_predicate_relation_info. */

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@ -4803,7 +4803,7 @@ m68hc11_reorg (first)
/* Force a split of all splitable insn. This is necessary for the /* Force a split of all splitable insn. This is necessary for the
Z register replacement mechanism because we end up with basic insns. */ Z register replacement mechanism because we end up with basic insns. */
split_all_insns (0); split_all_insns_noflow ();
split_done = 1; split_done = 1;
z_replacement_completed = 1; z_replacement_completed = 1;
@ -4850,7 +4850,7 @@ m68hc11_reorg (first)
split after Z register replacement. This gives more opportunities split after Z register replacement. This gives more opportunities
for peephole (in particular for consecutives xgdx/xgdy). */ for peephole (in particular for consecutives xgdx/xgdy). */
if (optimize > 0) if (optimize > 0)
split_all_insns (0); split_all_insns_noflow ();
/* Once insns are split after the z_replacement_completed == 2, /* Once insns are split after the z_replacement_completed == 2,
we must not re-run the life_analysis. The xgdx/xgdy patterns we must not re-run the life_analysis. The xgdx/xgdy patterns

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@ -3027,7 +3027,7 @@ machine_dependent_reorg (first)
optimizing, they'll have already been split. Otherwise, make optimizing, they'll have already been split. Otherwise, make
sure we don't split them too late. */ sure we don't split them too late. */
if (! optimize) if (! optimize)
split_all_insns (0); split_all_insns_noflow ();
/* If relaxing, generate pseudo-ops to associate function calls with /* If relaxing, generate pseudo-ops to associate function calls with
the symbols they call. It does no harm to not generate these the symbols they call. It does no harm to not generate these

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@ -2777,6 +2777,22 @@ split_all_insns (upd_life)
sbitmap_free (blocks); sbitmap_free (blocks);
} }
/* Same as split_all_insns, but do not expect CFG to be available.
Used by machine depedent reorg passes. */
void
split_all_insns_noflow ()
{
rtx next, insn;
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
split_insn (insn);
}
return;
}
#ifdef HAVE_peephole2 #ifdef HAVE_peephole2
struct peep2_insn_data struct peep2_insn_data

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@ -1462,6 +1462,7 @@ extern enum reg_class reg_alternate_class PARAMS ((int));
extern rtx get_first_nonparm_insn PARAMS ((void)); extern rtx get_first_nonparm_insn PARAMS ((void));
extern void split_all_insns PARAMS ((int)); extern void split_all_insns PARAMS ((int));
extern void split_all_insns_noflow PARAMS ((void));
#define MAX_SAVED_CONST_INT 64 #define MAX_SAVED_CONST_INT 64
extern rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; extern rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];

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@ -3459,7 +3459,9 @@ rest_of_compilation (decl)
timevar_push (TV_FLOW2); timevar_push (TV_FLOW2);
open_dump_file (DFI_flow2, decl); open_dump_file (DFI_flow2, decl);
find_basic_blocks (insns, max_reg_num (), rtl_dump_file); #ifdef ENABLE_CHECKING
verify_flow_info ();
#endif
/* If optimizing, then go ahead and split insns now. */ /* If optimizing, then go ahead and split insns now. */
if (optimize > 0) if (optimize > 0)
@ -3473,6 +3475,8 @@ rest_of_compilation (decl)
scheduling to operate in the epilogue. */ scheduling to operate in the epilogue. */
thread_prologue_and_epilogue_insns (insns); thread_prologue_and_epilogue_insns (insns);
compute_bb_for_insn (get_max_uid ());
if (optimize) if (optimize)
{ {
cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_CROSSJUMP); cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_CROSSJUMP);
@ -3624,7 +3628,7 @@ rest_of_compilation (decl)
#if defined (HAVE_ATTR_length) && !defined (STACK_REGS) #if defined (HAVE_ATTR_length) && !defined (STACK_REGS)
timevar_push (TV_SHORTEN_BRANCH); timevar_push (TV_SHORTEN_BRANCH);
split_all_insns (0); split_all_insns_noflow ();
timevar_pop (TV_SHORTEN_BRANCH); timevar_pop (TV_SHORTEN_BRANCH);
#endif #endif