pdp11.md: Add define_constants for register numbers, branch offset limits.
* config/pdp11/pdp11.md: Add define_constants for register numbers, branch offset limits. * config/pdp11/pdp11.c: Use named constants instead of numbers. * config/pdp11.pdp11.h: Ditto. From-SVN: r165933
This commit is contained in:
parent
97021017c5
commit
7021d5df0a
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@ -1,3 +1,10 @@
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2010-10-25 Paul Koning <ni1d@arrl.net>
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* config/pdp11/pdp11.md: Add define_constants for register
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numbers, branch offset limits.
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* config/pdp11/pdp11.c: Use named constants instead of numbers.
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* config/pdp11.pdp11.h: Ditto.
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2010-10-25 Changpeng Fang <changpeng.fang@amd.com>
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* Changelog (2010-10-22 Changpeng Fang): Correct the Changelog entries.
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@ -42,11 +42,6 @@ along with GCC; see the file COPYING3. If not see
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#include "target-def.h"
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#include "df.h"
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/*
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#define FPU_REG_P(X) ((X)>=8 && (X)<14)
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#define CPU_REG_P(X) ((X)>=0 && (X)<8)
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*/
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/* this is the current value returned by the macro FIRST_PARM_OFFSET
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defined in tm.h */
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int current_first_parm_offset;
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@ -295,7 +290,7 @@ pdp11_output_function_prologue (FILE *stream, HOST_WIDE_INT size)
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asm_fprintf (stream, "\tsub $%#wo, sp\n", fsize);
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/* save CPU registers */
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for (regno = 0; regno < 8; regno++)
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for (regno = 0; regno <= PC_REGNUM; regno++)
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if (df_regs_ever_live_p (regno) && ! call_used_regs[regno])
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if (! ((regno == FRAME_POINTER_REGNUM)
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&& frame_pointer_needed))
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@ -305,7 +300,7 @@ pdp11_output_function_prologue (FILE *stream, HOST_WIDE_INT size)
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/* via_ac specifies the ac to use for saving ac4, ac5 */
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via_ac = -1;
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for (regno = 8; regno < FIRST_PSEUDO_REGISTER ; regno++)
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for (regno = AC0_REGNUM; regno <= AC5_REGNUM ; regno++)
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{
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/* ac0 - ac3 */
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if (LOAD_FPU_REG_P(regno)
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@ -366,7 +361,7 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size)
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/* hope this is safe - m68k does it also .... */
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df_set_regs_ever_live (FRAME_POINTER_REGNUM, false);
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for (i =7, j = 0 ; i >= 0 ; i--)
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for (i = PC_REGNUM, j = 0 ; i >= 0 ; i--)
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if (df_regs_ever_live_p (i) && ! call_used_regs[i])
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j++;
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@ -374,22 +369,22 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size)
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k = 2*j;
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/* change fp -> r5 due to the compile error on libgcc2.c */
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for (i =7 ; i >= 0 ; i--)
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for (i = PC_REGNUM ; i >= 0 ; i--)
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if (df_regs_ever_live_p (i) && ! call_used_regs[i])
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fprintf(stream, "\tmov %#" HOST_WIDE_INT_PRINT "o(r5), %s\n",
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(-fsize-2*j--)&0xffff, reg_names[i]);
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/* get ACs */
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via_ac = FIRST_PSEUDO_REGISTER -1;
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via_ac = AC5_REGNUM;
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for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
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for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
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if (df_regs_ever_live_p (i) && ! call_used_regs[i])
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{
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via_ac = i;
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k += 8;
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}
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for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
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for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
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{
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if (LOAD_FPU_REG_P(i)
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&& df_regs_ever_live_p (i)
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@ -418,14 +413,14 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size)
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}
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else
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{
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via_ac = FIRST_PSEUDO_REGISTER -1;
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via_ac = AC5_REGNUM;
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/* get ACs */
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for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
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for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
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if (df_regs_ever_live_p (i) && call_used_regs[i])
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via_ac = i;
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for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
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for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
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{
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if (LOAD_FPU_REG_P(i)
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&& df_regs_ever_live_p (i)
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@ -443,7 +438,7 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size)
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}
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}
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for (i=7; i >= 0; i--)
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for (i = PC_REGNUM; i >= 0; i--)
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if (df_regs_ever_live_p (i) && !call_used_regs[i])
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fprintf(stream, "\tmov (sp)+, %s\n", reg_names[i]);
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@ -22,10 +22,10 @@ along with GCC; see the file COPYING3. If not see
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#define CONSTANT_POOL_BEFORE_FUNCTION 0
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/* check whether load_fpu_reg or not */
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#define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
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#define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
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#define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM)
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#define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM)
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#define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
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#define CPU_REG_P(x) ((x)<8)
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#define CPU_REG_P(x) ((x) <= PC_REGNUM)
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/* Names to predefine in the preprocessor for this target machine. */
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@ -140,8 +140,6 @@ extern const struct real_format pdp11_d_format;
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we have 8 integer registers, plus 6 float
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(don't use scratch float !) */
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#define FIRST_PSEUDO_REGISTER 14
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/* 1 for registers that have pervasive standard uses
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and are not available for the register allocator.
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@ -191,7 +189,7 @@ extern const struct real_format pdp11_d_format;
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} \
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\
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if (TARGET_AC0) \
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call_used_regs[8] = 1; \
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call_used_regs[AC0_REGNUM] = 1; \
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if (TARGET_UNIX_ASM) \
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{ \
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/* Change names of FPU registers for the UNIX assembler. */ \
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@ -211,7 +209,7 @@ extern const struct real_format pdp11_d_format;
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*/
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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((REGNO < 8)? \
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((REGNO <= PC_REGNUM)? \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
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:1)
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@ -222,7 +220,7 @@ extern const struct real_format pdp11_d_format;
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FPU can only hold DF - simplifies life!
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*/
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(((REGNO) < 8)? \
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(((REGNO) <= PC_REGNUM)? \
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((GET_MODE_BITSIZE(MODE) <= 16) \
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|| (GET_MODE_BITSIZE(MODE) >= 32 && !((REGNO) & 1))) \
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:(MODE) == DFmode)
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@ -237,17 +235,8 @@ extern const struct real_format pdp11_d_format;
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/* Specify the registers used for certain standard purposes.
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The values of these macros are register numbers. */
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/* the pdp11 pc overloaded on a register that the compiler knows about. */
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#define PC_REGNUM 7
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/* Register to use for pushing function arguments. */
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#define STACK_POINTER_REGNUM 6
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/* Base register for access to local variables of the function. */
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#define FRAME_POINTER_REGNUM 5
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/* Base register for access to arguments of the function. */
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#define ARG_POINTER_REGNUM 5
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#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
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/* Register in which static-chain is passed to a function. */
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/* ??? - i don't want to give up a reg for this! */
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@ -313,7 +302,10 @@ enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REG
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or could index an array. */
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#define REGNO_REG_CLASS(REGNO) \
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((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
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((REGNO) >= AC0_REGNUM ? \
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((REGNO) <= AC3_REGNUM ? LOAD_FPU_REGS : \
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NO_LOAD_FPU_REGS) : \
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(((REGNO) & 1) ? MUL_REGS : GENERAL_REGS))
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/* The class value for index registers, and the one for base regs. */
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{ \
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int offset, regno; \
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offset = get_frame_size(); \
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for (regno = 0; regno < 8; regno++) \
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for (regno = 0; regno <= PC_REGNUM; regno++) \
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if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
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offset += 2; \
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for (regno = 8; regno < 14; regno++) \
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for (regno = AC0_REGNUM; regno <= AC5_REGNUM; regno++) \
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if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
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offset += 8; \
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/* offset -= 2; no fp on stack frame */ \
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has been allocated, which happens in local-alloc.c. */
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#define REGNO_OK_FOR_INDEX_P(REGNO) \
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((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
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((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM)
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#define REGNO_OK_FOR_BASE_P(REGNO) \
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((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
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((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM)
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/* Now macros that check whether X is a register and also,
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strictly, whether it is in a specified class.
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@ -560,10 +552,10 @@ extern int may_call_alloca;
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/* accept -(SP) -- which uses PRE_MODIFY for byte mode */ \
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if (GET_CODE (operand) == PRE_MODIFY \
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&& GET_CODE (XEXP (operand, 0)) == REG \
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&& REGNO (XEXP (operand, 0)) == 6 \
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&& REGNO (XEXP (operand, 0)) == STACK_POINTER_REGNUM \
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&& GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
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&& GET_CODE (XEXP (xfoob, 0)) == REG \
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&& REGNO (XEXP (xfoob, 0)) == 6 \
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&& REGNO (XEXP (xfoob, 0)) == STACK_POINTER_REGNUM \
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&& CONSTANT_P (XEXP (xfoob, 1)) \
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&& INTVAL (XEXP (xfoob,1)) == -2) \
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goto ADDR; \
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/* accept (SP)+ -- which uses POST_MODIFY for byte mode */ \
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if (GET_CODE (operand) == POST_MODIFY \
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&& GET_CODE (XEXP (operand, 0)) == REG \
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&& REGNO (XEXP (operand, 0)) == 6 \
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&& REGNO (XEXP (operand, 0)) == STACK_POINTER_REGNUM \
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&& GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
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&& GET_CODE (XEXP (xfoob, 0)) == REG \
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&& REGNO (XEXP (xfoob, 0)) == 6 \
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&& REGNO (XEXP (xfoob, 0)) == STACK_POINTER_REGNUM \
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&& CONSTANT_P (XEXP (xfoob, 1)) \
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&& INTVAL (XEXP (xfoob,1)) == 2) \
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goto ADDR; \
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@ -22,6 +22,22 @@
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(include "predicates.md")
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(include "constraints.md")
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(define_constants
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[
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;; Register numbers
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(FRAME_POINTER_REGNUM 5)
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(STACK_POINTER_REGNUM 6)
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(PC_REGNUM 7)
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(AC0_REGNUM 8)
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(AC3_REGNUM 11)
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(AC4_REGNUM 12)
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(AC5_REGNUM 13)
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(FIRST_PSEUDO_REGISTER 14)
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;; Branch offset limits, as byte offsets from instruction address
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(MIN_BRANCH -254)
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(MAX_BRANCH 256)
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(MIN_SOB -126)
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(MAX_SOB 0)])
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;; HI is 16 bit
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;; QI is 8 bit
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@ -165,12 +181,12 @@
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return \"\";
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}"
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[(set (attr "length") (if_then_else (ior (le (minus (match_dup 0)
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[(set (attr "length") (if_then_else (ior (lt (minus (match_dup 0)
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(pc))
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(const_int -256))
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(ge (minus (match_dup 0)
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(const_int MIN_SOB))
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(gt (minus (match_dup 0)
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(pc))
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(const_int 0)))
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(const_int MAX_SOB)))
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(const_int 8)
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(const_int 2)))])
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@ -228,12 +244,12 @@
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(pc)))]
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""
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"* return output_jump(GET_CODE (operands[0]), 0, get_attr_length(insn));"
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[(set (attr "length") (if_then_else (ior (le (minus (match_dup 1)
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[(set (attr "length") (if_then_else (ior (lt (minus (match_dup 1)
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(pc))
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(const_int -256))
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(ge (minus (match_dup 1)
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(const_int MIN_BRANCH))
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(gt (minus (match_dup 1)
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(pc))
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(const_int 256)))
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(const_int MAX_BRANCH)))
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(const_int 6)
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(const_int 2)))])
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@ -248,12 +264,12 @@
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(label_ref (match_operand 1 "" ""))))]
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""
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"* return output_jump(GET_CODE (operands[0]), 1, get_attr_length(insn));"
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[(set (attr "length") (if_then_else (ior (le (minus (match_dup 1)
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[(set (attr "length") (if_then_else (ior (lt (minus (match_dup 1)
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(pc))
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(const_int -256))
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(ge (minus (match_dup 1)
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(const_int MIN_BRANCH))
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(gt (minus (match_dup 1)
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(pc))
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(const_int 256)))
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(const_int MAX_BRANCH)))
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(const_int 6)
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(const_int 2)))])
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@ -1296,12 +1312,12 @@
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return \"br %l0\";
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return \"jmp %l0\";
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}"
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[(set (attr "length") (if_then_else (ior (le (minus (match_dup 0)
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[(set (attr "length") (if_then_else (ior (lt (minus (match_dup 0)
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(pc))
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(const_int -256))
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(ge (minus (match_dup 0)
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(const_int MIN_BRANCH))
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(gt (minus (match_dup 0)
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(pc))
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(const_int 256)))
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(const_int MAX_BRANCH)))
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(const_int 4)
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(const_int 2)))])
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