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Add missing REG_INC notes. 

From-SVN: r44646
This commit is contained in:
Bernd Schmidt 2001-08-05 16:36:05 +00:00 committed by Bernd Schmidt
parent ab59db3c80
commit 703cf2116b
3 changed files with 40 additions and 10 deletions
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6
gcc/ChangeLog
View File

@ -6,6 +6,12 @@
* alias.c (rtx_equal_for_memref_p): VALUEs are only identical
if their CSELIB_VAL_PTRs are.
* config/ia64/ia64.c (struct spill_fill_data): New member prev_insn.
(setup_spill_pointers): Initialize it.
(spill_restore_mem): Set it.
(do_spill, do_restore): Use it to add REG_INC note.
* config/ia64/ia64.md (movti_internal): Add REG_INC notes as needed.
2001-08-04 Hans-Peter Nilsson <hp@bitrange.com>
* config/sh/sh.c (sh_asm_named_section): Fix typo in align

28
gcc/config/ia64/ia64.c
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@ -1621,6 +1621,7 @@ struct spill_fill_data
rtx init_reg[2]; /* initial base register */
rtx iter_reg[2]; /* the iterator registers */
rtx *prev_addr[2]; /* address of last memory use */
rtx prev_insn[2]; /* the insn corresponding to prev_addr */
HOST_WIDE_INT prev_off[2]; /* last offset */
int n_iter; /* number of iterators in use */
int next_iter; /* next iterator to use */
@ -1642,6 +1643,8 @@ setup_spill_pointers (n_spills, init_reg, cfa_off)
spill_fill_data.init_reg[1] = init_reg;
spill_fill_data.prev_addr[0] = NULL;
spill_fill_data.prev_addr[1] = NULL;
spill_fill_data.prev_insn[0] = NULL;
spill_fill_data.prev_insn[1] = NULL;
spill_fill_data.prev_off[0] = cfa_off;
spill_fill_data.prev_off[1] = cfa_off;
spill_fill_data.next_iter = 0;
@ -1675,11 +1678,16 @@ spill_restore_mem (reg, cfa_off)
if (spill_fill_data.prev_addr[iter])
{
if (CONST_OK_FOR_N (disp))
*spill_fill_data.prev_addr[iter]
= gen_rtx_POST_MODIFY (DImode, spill_fill_data.iter_reg[iter],
gen_rtx_PLUS (DImode,
spill_fill_data.iter_reg[iter],
disp_rtx));
{
*spill_fill_data.prev_addr[iter]
= gen_rtx_POST_MODIFY (DImode, spill_fill_data.iter_reg[iter],
gen_rtx_PLUS (DImode,
spill_fill_data.iter_reg[iter],
disp_rtx));
REG_NOTES (spill_fill_data.prev_insn[iter])
= gen_rtx_EXPR_LIST (REG_INC, spill_fill_data.iter_reg[iter],
REG_NOTES (spill_fill_data.prev_insn[iter]));
}
else
{
/* ??? Could use register post_modify for loads. */
@ -1769,10 +1777,12 @@ do_spill (move_fn, reg, cfa_off, frame_reg)
rtx reg, frame_reg;
HOST_WIDE_INT cfa_off;
{
int iter = spill_fill_data.next_iter;
rtx mem, insn;
mem = spill_restore_mem (reg, cfa_off);
insn = emit_insn ((*move_fn) (mem, reg, GEN_INT (cfa_off)));
spill_fill_data.prev_insn[iter] = insn;
if (frame_reg)
{
@ -1812,8 +1822,12 @@ do_restore (move_fn, reg, cfa_off)
rtx reg;
HOST_WIDE_INT cfa_off;
{
emit_insn ((*move_fn) (reg, spill_restore_mem (reg, cfa_off),
GEN_INT (cfa_off)));
int iter = spill_fill_data.next_iter;
rtx insn;
insn = emit_insn ((*move_fn) (reg, spill_restore_mem (reg, cfa_off),
GEN_INT (cfa_off)));
spill_fill_data.prev_insn[iter] = insn;
}
/* Wrapper functions that discards the CONST_INT spill offset. These

16
gcc/config/ia64/ia64.md
View File

@ -532,7 +532,7 @@
[(const_int 0)]
"
{
rtx adj1, adj2, in[2], out[2];
rtx adj1, adj2, in[2], out[2], insn;
int first;
adj1 = ia64_split_timode (in, operands[1], operands[2]);
@ -552,8 +552,18 @@
emit_insn (adj1);
if (adj2)
emit_insn (adj2);
emit_insn (gen_rtx_SET (VOIDmode, out[first], in[first]));
emit_insn (gen_rtx_SET (VOIDmode, out[!first], in[!first]));
insn = emit_insn (gen_rtx_SET (VOIDmode, out[first], in[first]));
if (GET_CODE (out[first]) == MEM
&& GET_CODE (XEXP (out[first], 0)) == POST_MODIFY)
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
XEXP (XEXP (out[first], 0), 0),
REG_NOTES (insn));
insn = emit_insn (gen_rtx_SET (VOIDmode, out[!first], in[!first]));
if (GET_CODE (out[!first]) == MEM
&& GET_CODE (XEXP (out[!first], 0)) == POST_MODIFY)
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
XEXP (XEXP (out[!first], 0), 0),
REG_NOTES (insn));
DONE;
}"
[(set_attr "itanium_class" "unknown")