libsanitizer: Use SSE to save and restore XMM registers
Use SSE, instead of AVX, to save and restore XMM registers to support processors without AVX. The affected codes are unused in upstream since https://github.com/llvm/llvm-project/commit/66d4ce7e26a5 and will be removed in https://reviews.llvm.org/D112604 This fixed FAIL: g++.dg/tsan/pthread_cond_clockwait.C -O0 execution test FAIL: g++.dg/tsan/pthread_cond_clockwait.C -O2 execution test on machines without AVX. PR sanitizer/103466 * tsan/tsan_rtl_amd64.S (__tsan_trace_switch_thunk): Replace vmovdqu with movdqu. (__tsan_report_race_thunk): Likewise.
This commit is contained in:
H.J. Lu
parent
0dc77a0c49
commit
70b043845d
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@ -45,22 +45,22 @@ ASM_SYMBOL(__tsan_trace_switch_thunk):
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# All XMM registers are caller-saved.
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sub $0x100, %rsp
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CFI_ADJUST_CFA_OFFSET(0x100)
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vmovdqu %xmm0, 0x0(%rsp)
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vmovdqu %xmm1, 0x10(%rsp)
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vmovdqu %xmm2, 0x20(%rsp)
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vmovdqu %xmm3, 0x30(%rsp)
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vmovdqu %xmm4, 0x40(%rsp)
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vmovdqu %xmm5, 0x50(%rsp)
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vmovdqu %xmm6, 0x60(%rsp)
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vmovdqu %xmm7, 0x70(%rsp)
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vmovdqu %xmm8, 0x80(%rsp)
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vmovdqu %xmm9, 0x90(%rsp)
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vmovdqu %xmm10, 0xa0(%rsp)
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vmovdqu %xmm11, 0xb0(%rsp)
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vmovdqu %xmm12, 0xc0(%rsp)
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vmovdqu %xmm13, 0xd0(%rsp)
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vmovdqu %xmm14, 0xe0(%rsp)
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vmovdqu %xmm15, 0xf0(%rsp)
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movdqu %xmm0, 0x0(%rsp)
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movdqu %xmm1, 0x10(%rsp)
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movdqu %xmm2, 0x20(%rsp)
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movdqu %xmm3, 0x30(%rsp)
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movdqu %xmm4, 0x40(%rsp)
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movdqu %xmm5, 0x50(%rsp)
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movdqu %xmm6, 0x60(%rsp)
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movdqu %xmm7, 0x70(%rsp)
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movdqu %xmm8, 0x80(%rsp)
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movdqu %xmm9, 0x90(%rsp)
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movdqu %xmm10, 0xa0(%rsp)
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movdqu %xmm11, 0xb0(%rsp)
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movdqu %xmm12, 0xc0(%rsp)
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movdqu %xmm13, 0xd0(%rsp)
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movdqu %xmm14, 0xe0(%rsp)
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movdqu %xmm15, 0xf0(%rsp)
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# Align stack frame.
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push %rbx # non-scratch
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CFI_ADJUST_CFA_OFFSET(8)
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@ -78,22 +78,22 @@ ASM_SYMBOL(__tsan_trace_switch_thunk):
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pop %rbx
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CFI_ADJUST_CFA_OFFSET(-8)
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# Restore scratch registers.
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vmovdqu 0x0(%rsp), %xmm0
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vmovdqu 0x10(%rsp), %xmm1
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vmovdqu 0x20(%rsp), %xmm2
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vmovdqu 0x30(%rsp), %xmm3
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vmovdqu 0x40(%rsp), %xmm4
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vmovdqu 0x50(%rsp), %xmm5
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vmovdqu 0x60(%rsp), %xmm6
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vmovdqu 0x70(%rsp), %xmm7
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vmovdqu 0x80(%rsp), %xmm8
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vmovdqu 0x90(%rsp), %xmm9
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vmovdqu 0xa0(%rsp), %xmm10
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vmovdqu 0xb0(%rsp), %xmm11
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vmovdqu 0xc0(%rsp), %xmm12
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vmovdqu 0xd0(%rsp), %xmm13
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vmovdqu 0xe0(%rsp), %xmm14
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vmovdqu 0xf0(%rsp), %xmm15
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movdqu 0x0(%rsp), %xmm0
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movdqu 0x10(%rsp), %xmm1
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movdqu 0x20(%rsp), %xmm2
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movdqu 0x30(%rsp), %xmm3
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movdqu 0x40(%rsp), %xmm4
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movdqu 0x50(%rsp), %xmm5
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movdqu 0x60(%rsp), %xmm6
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movdqu 0x70(%rsp), %xmm7
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movdqu 0x80(%rsp), %xmm8
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movdqu 0x90(%rsp), %xmm9
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movdqu 0xa0(%rsp), %xmm10
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movdqu 0xb0(%rsp), %xmm11
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movdqu 0xc0(%rsp), %xmm12
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movdqu 0xd0(%rsp), %xmm13
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movdqu 0xe0(%rsp), %xmm14
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movdqu 0xf0(%rsp), %xmm15
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add $0x100, %rsp
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CFI_ADJUST_CFA_OFFSET(-0x100)
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pop %r11
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@ -163,22 +163,22 @@ ASM_SYMBOL(__tsan_report_race_thunk):
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# All XMM registers are caller-saved.
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sub $0x100, %rsp
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CFI_ADJUST_CFA_OFFSET(0x100)
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vmovdqu %xmm0, 0x0(%rsp)
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vmovdqu %xmm1, 0x10(%rsp)
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vmovdqu %xmm2, 0x20(%rsp)
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vmovdqu %xmm3, 0x30(%rsp)
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vmovdqu %xmm4, 0x40(%rsp)
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vmovdqu %xmm5, 0x50(%rsp)
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vmovdqu %xmm6, 0x60(%rsp)
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vmovdqu %xmm7, 0x70(%rsp)
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vmovdqu %xmm8, 0x80(%rsp)
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vmovdqu %xmm9, 0x90(%rsp)
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vmovdqu %xmm10, 0xa0(%rsp)
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vmovdqu %xmm11, 0xb0(%rsp)
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vmovdqu %xmm12, 0xc0(%rsp)
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vmovdqu %xmm13, 0xd0(%rsp)
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vmovdqu %xmm14, 0xe0(%rsp)
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vmovdqu %xmm15, 0xf0(%rsp)
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movdqu %xmm0, 0x0(%rsp)
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movdqu %xmm1, 0x10(%rsp)
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movdqu %xmm2, 0x20(%rsp)
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movdqu %xmm3, 0x30(%rsp)
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movdqu %xmm4, 0x40(%rsp)
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movdqu %xmm5, 0x50(%rsp)
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movdqu %xmm6, 0x60(%rsp)
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movdqu %xmm7, 0x70(%rsp)
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movdqu %xmm8, 0x80(%rsp)
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movdqu %xmm9, 0x90(%rsp)
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movdqu %xmm10, 0xa0(%rsp)
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movdqu %xmm11, 0xb0(%rsp)
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movdqu %xmm12, 0xc0(%rsp)
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movdqu %xmm13, 0xd0(%rsp)
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movdqu %xmm14, 0xe0(%rsp)
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movdqu %xmm15, 0xf0(%rsp)
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# Align stack frame.
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push %rbx # non-scratch
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CFI_ADJUST_CFA_OFFSET(8)
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@ -196,22 +196,22 @@ ASM_SYMBOL(__tsan_report_race_thunk):
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pop %rbx
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CFI_ADJUST_CFA_OFFSET(-8)
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# Restore scratch registers.
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vmovdqu 0x0(%rsp), %xmm0
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vmovdqu 0x10(%rsp), %xmm1
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vmovdqu 0x20(%rsp), %xmm2
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vmovdqu 0x30(%rsp), %xmm3
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vmovdqu 0x40(%rsp), %xmm4
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vmovdqu 0x50(%rsp), %xmm5
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vmovdqu 0x60(%rsp), %xmm6
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vmovdqu 0x70(%rsp), %xmm7
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vmovdqu 0x80(%rsp), %xmm8
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vmovdqu 0x90(%rsp), %xmm9
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vmovdqu 0xa0(%rsp), %xmm10
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vmovdqu 0xb0(%rsp), %xmm11
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vmovdqu 0xc0(%rsp), %xmm12
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vmovdqu 0xd0(%rsp), %xmm13
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vmovdqu 0xe0(%rsp), %xmm14
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vmovdqu 0xf0(%rsp), %xmm15
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movdqu 0x0(%rsp), %xmm0
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movdqu 0x10(%rsp), %xmm1
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movdqu 0x20(%rsp), %xmm2
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movdqu 0x30(%rsp), %xmm3
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movdqu 0x40(%rsp), %xmm4
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movdqu 0x50(%rsp), %xmm5
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movdqu 0x60(%rsp), %xmm6
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movdqu 0x70(%rsp), %xmm7
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movdqu 0x80(%rsp), %xmm8
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movdqu 0x90(%rsp), %xmm9
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movdqu 0xa0(%rsp), %xmm10
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movdqu 0xb0(%rsp), %xmm11
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movdqu 0xc0(%rsp), %xmm12
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movdqu 0xd0(%rsp), %xmm13
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movdqu 0xe0(%rsp), %xmm14
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movdqu 0xf0(%rsp), %xmm15
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add $0x100, %rsp
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CFI_ADJUST_CFA_OFFSET(-0x100)
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pop %r11
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