re PR target/49030 (ICE in get_arm_condition_code, at config/arm/arm.c:17180)

gcc/
	PR target/49030
	* config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare.
	* config/arm/arm.c (maybe_get_arm_condition_code): New function,
	reusing the old code from get_arm_condition_code.  Return ARM_NV
	for invalid comparison codes.
	(get_arm_condition_code): Redefine in terms of
	maybe_get_arm_condition_code.
	* config/arm/predicates.md (arm_comparison_operator): Use
	maybe_get_arm_condition_code.

gcc/testsuite/
	PR target/49030
	* gcc.dg/torture/pr49030.c: New test.

From-SVN: r178636
This commit is contained in:
Richard Sandiford 2011-09-07 13:48:03 +00:00 committed by Richard Sandiford
parent b7b1babae9
commit 723d95fe2b
6 changed files with 65 additions and 20 deletions

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@ -1,3 +1,15 @@
2011-09-07 Richard Sandiford <richard.sandiford@linaro.org>
PR target/49030
* config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare.
* config/arm/arm.c (maybe_get_arm_condition_code): New function,
reusing the old code from get_arm_condition_code. Return ARM_NV
for invalid comparison codes.
(get_arm_condition_code): Redefine in terms of
maybe_get_arm_condition_code.
* config/arm/predicates.md (arm_comparison_operator): Use
maybe_get_arm_condition_code.
2011-09-07 Richard Guenther <rguenther@suse.de> 2011-09-07 Richard Guenther <rguenther@suse.de>
* tree-ssa-forwprop.c (forward_propagate_into_gimple_cond): * tree-ssa-forwprop.c (forward_propagate_into_gimple_cond):

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@ -184,6 +184,7 @@ extern int is_called_in_ARM_mode (tree);
#endif #endif
extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
#ifdef RTX_CODE #ifdef RTX_CODE
extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
extern void thumb1_final_prescan_insn (rtx); extern void thumb1_final_prescan_insn (rtx);
extern void thumb2_final_prescan_insn (rtx); extern void thumb2_final_prescan_insn (rtx);
extern const char *thumb_load_double_from_address (rtx *); extern const char *thumb_load_double_from_address (rtx *);

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@ -17595,10 +17595,10 @@ arm_elf_asm_destructor (rtx symbol, int priority)
decremented/zeroed by arm_asm_output_opcode as the insns are output. */ decremented/zeroed by arm_asm_output_opcode as the insns are output. */
/* Returns the index of the ARM condition code string in /* Returns the index of the ARM condition code string in
`arm_condition_codes'. COMPARISON should be an rtx like `arm_condition_codes', or ARM_NV if the comparison is invalid.
`(eq (...) (...))'. */ COMPARISON should be an rtx like `(eq (...) (...))'. */
static enum arm_cond_code enum arm_cond_code
get_arm_condition_code (rtx comparison) maybe_get_arm_condition_code (rtx comparison)
{ {
enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); enum machine_mode mode = GET_MODE (XEXP (comparison, 0));
enum arm_cond_code code; enum arm_cond_code code;
@ -17622,11 +17622,11 @@ get_arm_condition_code (rtx comparison)
case CC_DLTUmode: code = ARM_CC; case CC_DLTUmode: code = ARM_CC;
dominance: dominance:
gcc_assert (comp_code == EQ || comp_code == NE);
if (comp_code == EQ) if (comp_code == EQ)
return ARM_INVERSE_CONDITION_CODE (code); return ARM_INVERSE_CONDITION_CODE (code);
return code; if (comp_code == NE)
return code;
return ARM_NV;
case CC_NOOVmode: case CC_NOOVmode:
switch (comp_code) switch (comp_code)
@ -17635,7 +17635,7 @@ get_arm_condition_code (rtx comparison)
case EQ: return ARM_EQ; case EQ: return ARM_EQ;
case GE: return ARM_PL; case GE: return ARM_PL;
case LT: return ARM_MI; case LT: return ARM_MI;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CC_Zmode: case CC_Zmode:
@ -17643,7 +17643,7 @@ get_arm_condition_code (rtx comparison)
{ {
case NE: return ARM_NE; case NE: return ARM_NE;
case EQ: return ARM_EQ; case EQ: return ARM_EQ;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CC_Nmode: case CC_Nmode:
@ -17651,7 +17651,7 @@ get_arm_condition_code (rtx comparison)
{ {
case NE: return ARM_MI; case NE: return ARM_MI;
case EQ: return ARM_PL; case EQ: return ARM_PL;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CCFPEmode: case CCFPEmode:
@ -17676,7 +17676,7 @@ get_arm_condition_code (rtx comparison)
/* UNEQ and LTGT do not have a representation. */ /* UNEQ and LTGT do not have a representation. */
case UNEQ: /* Fall through. */ case UNEQ: /* Fall through. */
case LTGT: /* Fall through. */ case LTGT: /* Fall through. */
default: gcc_unreachable (); default: return ARM_NV;
} }
case CC_SWPmode: case CC_SWPmode:
@ -17692,7 +17692,7 @@ get_arm_condition_code (rtx comparison)
case GTU: return ARM_CC; case GTU: return ARM_CC;
case LEU: return ARM_CS; case LEU: return ARM_CS;
case LTU: return ARM_HI; case LTU: return ARM_HI;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CC_Cmode: case CC_Cmode:
@ -17700,7 +17700,7 @@ get_arm_condition_code (rtx comparison)
{ {
case LTU: return ARM_CS; case LTU: return ARM_CS;
case GEU: return ARM_CC; case GEU: return ARM_CC;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CC_CZmode: case CC_CZmode:
@ -17712,7 +17712,7 @@ get_arm_condition_code (rtx comparison)
case GTU: return ARM_HI; case GTU: return ARM_HI;
case LEU: return ARM_LS; case LEU: return ARM_LS;
case LTU: return ARM_CC; case LTU: return ARM_CC;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CC_NCVmode: case CC_NCVmode:
@ -17722,7 +17722,7 @@ get_arm_condition_code (rtx comparison)
case LT: return ARM_LT; case LT: return ARM_LT;
case GEU: return ARM_CS; case GEU: return ARM_CS;
case LTU: return ARM_CC; case LTU: return ARM_CC;
default: gcc_unreachable (); default: return ARM_NV;
} }
case CCmode: case CCmode:
@ -17738,13 +17738,22 @@ get_arm_condition_code (rtx comparison)
case GTU: return ARM_HI; case GTU: return ARM_HI;
case LEU: return ARM_LS; case LEU: return ARM_LS;
case LTU: return ARM_CC; case LTU: return ARM_CC;
default: gcc_unreachable (); default: return ARM_NV;
} }
default: gcc_unreachable (); default: gcc_unreachable ();
} }
} }
/* Like maybe_get_arm_condition_code, but never return ARM_NV. */
static enum arm_cond_code
get_arm_condition_code (rtx comparison)
{
enum arm_cond_code code = maybe_get_arm_condition_code (comparison);
gcc_assert (code != ARM_NV);
return code;
}
/* Tell arm_asm_output_opcode to output IT blocks for conditionally executed /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed
instructions. */ instructions. */
void void

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@ -249,10 +249,9 @@
;; True for integer comparisons and, if FP is active, for comparisons ;; True for integer comparisons and, if FP is active, for comparisons
;; other than LTGT or UNEQ. ;; other than LTGT or UNEQ.
(define_special_predicate "arm_comparison_operator" (define_special_predicate "arm_comparison_operator"
(ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu") (and (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,
(and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT unordered,ordered,unlt,unle,unge,ungt")
&& (TARGET_FPA || TARGET_VFP)") (match_test "maybe_get_arm_condition_code (op) != ARM_NV")))
(match_code "unordered,ordered,unlt,unle,unge,ungt"))))
(define_special_predicate "lt_ge_comparison_operator" (define_special_predicate "lt_ge_comparison_operator"
(match_code "lt,ge")) (match_code "lt,ge"))

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@ -1,3 +1,8 @@
2011-09-07 Richard Sandiford <richard.sandiford@linaro.org>
PR target/49030
* gcc.dg/torture/pr49030.c: New test.
2011-09-07 Janus Weil <janus@gcc.gnu.org> 2011-09-07 Janus Weil <janus@gcc.gnu.org>
PR fortran/50288 PR fortran/50288

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@ -0,0 +1,19 @@
void
sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples,
unsigned long dst_skip)
{
long long y;
while (nsamples--)
{
y = (long long) (*src * 8388608.0f) << 8;
if (y > 2147483647) {
*(int *) dst = 2147483647;
} else if (y < -2147483647 - 1) {
*(int *) dst = -2147483647 - 1;
} else {
*(int *) dst = (int) y;
}
dst += dst_skip;
src++;
}
}