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rs6000: Make all logical instructions one type

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They are currently just "integer", but the dot version is fast_compare.
This makes them all "logical".

From-SVN: r210872
This commit is contained in:
Segher Boessenkool 2014-05-23 18:45:11 +02:00 committed by Segher Boessenkool
parent 0cbb4f5897
commit 73c076c8a2
25 changed files with 168 additions and 104 deletions
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46
gcc/ChangeLog
View File

@ -1,3 +1,49 @@
2014-05-23 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (type): Add "logical". Delete
"fast_compare".
(dot): Adjust comment.
(andsi3_mc, *andsi3_internal2_mc, *andsi3_internal3_mc,
*andsi3_internal4, *andsi3_internal5_mc, *boolsi3_internal2,
*boolsi3_internal3, *boolccsi3_internal2, *boolccsi3_internal3,
anddi3_mc, *anddi3_internal2_mc, *anddi3_internal3_mc,
*booldi3_internal2, *booldi3_internal3, *boolcdi3_internal2,
*boolcdi3_internal3, *boolccdi3_internal2, *boolccdi3_internal3,
*mov<mode>_internal2, and 10 anonymous define_insns): Use
"logical".
* config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
* config/rs6000/40x.md: (ppc403-integer, ppc403-compare): Adjust.
* config/rs6000/440.md: (ppc440-integer, ppc440-compare): Adjust.
* config/rs6000/476.md: (ppc476-simple-integer, ppc476-compare):
Adjust.
* config/rs6000/603.md: (ppc603-integer, ppc603-compare): Adjust.
* config/rs6000/6xx.md: (ppc604-integer, ppc604-compare): Adjust.
* config/rs6000/7450.md: (ppc7450-integer, ppc7450-compare):
Adjust.
* config/rs6000/7xx.md: (ppc750-integer, ppc750-compare): Adjust.
* config/rs6000/8540.md: (ppc8540_su): Adjust.
* config/rs6000/cell.md: (cell-integer, cell-fast-cmp,
cell-cmp-microcoded): Adjust.
* config/rs6000/e300c2c3.md: (ppce300c3_cmp, ppce300c3_iu):
Adjust.
* config/rs6000/e500mc.md: (e500mc_su): Adjust.
* config/rs6000/e500mc64.md: (e500mc64_su, e500mc64_su2): Adjust.
* config/rs6000/e5500.md: (e5500_sfx, e5500_sfx2): Adjust.
* config/rs6000/e6500.md: (e6500_sfx, e6500_sfx2): Adjust.
* config/rs6000/mpc.md: (mpccore-integer, mpccore-compare):
Adjust.
* config/rs6000/power4.md: (power4-integer, power4-cmp): Adjust.
* config/rs6000/power5.md: (power5-integer, power5-cmp): Adjust.
* config/rs6000/power6.md: (power6-integer, power6-fast-compare):
Adjust.
* config/rs6000/power7.md: (power7-integer, power7-cmp): Adjust.
* config/rs6000/power8.md: (power8-1cyc, power8-fast-compare):
Adjust. Adjust comment.
* config/rs6000/rs64.md: (rs64a-integer, rs64a-compare): Adjust.
* config/rs6000/titan.md: (titan_fxu_adder, titan_fxu_alu):
Adjust.
2014-05-23 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (type): Add "add".

6
gcc/config/rs6000/40x.md
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@ -37,7 +37,7 @@
(define_insn_reservation "ppc403-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x")
@ -53,8 +53,8 @@
"iu_40x,iu_40x,iu_40x")
(define_insn_reservation "ppc403-compare" 3
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x,nothing,bpu_40x")

6
gcc/config/rs6000/440.md
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@ -54,7 +54,7 @@
(define_insn_reservation "ppc440-integer" 1
(and (ior (eq_attr "type" "integer,insert,shift,trap,cntlz,exts,isel")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc440"))
"ppc440_issue,ppc440_i_pipe|ppc440_j_pipe")
@ -95,8 +95,8 @@
"ppc440_issue,ppc440_i_pipe")
(define_insn_reservation "ppc440-compare" 2
(and (ior (eq_attr "type" "cmp,fast_compare,compare,cr_logical,delayed_cr,mfcr")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp,compare,cr_logical,delayed_cr,mfcr")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc440"))
"ppc440_issue,ppc440_i_pipe")

7
gcc/config/rs6000/476.md
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@ -64,7 +64,7 @@
(define_insn_reservation "ppc476-simple-integer" 1
(and (ior (eq_attr "type" "integer,insert,exts")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc476"))
"ppc476_issue,\
@ -77,9 +77,8 @@
ppc476_i_pipe")
(define_insn_reservation "ppc476-compare" 4
(and (ior (eq_attr "type" "compare,fast_compare,mfcr,mfcrf,\
mtcr,mfjmpr,mtjmpr")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "compare,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc476"))
"ppc476_issue,\

6
gcc/config/rs6000/603.md
View File

@ -59,7 +59,7 @@
(define_insn_reservation "ppc603-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc603"))
"iu_603")
@ -93,8 +93,8 @@
"iu_603*37")
(define_insn_reservation "ppc603-compare" 3
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc603"))
"iu_603,nothing,bpu_603")

6
gcc/config/rs6000/6xx.md
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@ -74,7 +74,7 @@
(define_insn_reservation "ppc604-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
"iu1_6xx|iu2_6xx")
@ -147,8 +147,8 @@
"mciu_6xx*36")
(define_insn_reservation "ppc604-compare" 3
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
"(iu1_6xx|iu2_6xx)")

6
gcc/config/rs6000/7450.md
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@ -74,7 +74,7 @@
(define_insn_reservation "ppc7450-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc7450"))
"ppc7450_du,iu1_7450|iu2_7450|iu3_7450")
@ -108,8 +108,8 @@
"ppc7450_du,mciu_7450*23")
(define_insn_reservation "ppc7450-compare" 2
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc7450"))
"ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)")

6
gcc/config/rs6000/7xx.md
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@ -62,7 +62,7 @@
(define_insn_reservation "ppc750-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "ppc750,ppc7400"))
"ppc750_du,iu1_7xx|iu2_7xx")
@ -101,8 +101,8 @@
"ppc750_du,iu1_7xx*19")
(define_insn_reservation "ppc750-compare" 2
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppc750,ppc7400"))
"ppc750_du,(iu1_7xx|iu2_7xx)")

2
gcc/config/rs6000/8540.md
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@ -84,7 +84,7 @@
;; Simple SU insns
(define_insn_reservation "ppc8540_su" 1
(and (eq_attr "type" "integer,add,insert,cmp,compare,fast_compare,\
(and (eq_attr "type" "integer,add,logical,insert,cmp,compare,\
shift,trap,cntlz,exts,isel")
(eq_attr "cpu" "ppc8540,ppc8548"))
"ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")

10
gcc/config/rs6000/cell.md
View File

@ -167,7 +167,7 @@
;; Integer latency is 2 cycles
(define_insn_reservation "cell-integer" 2
(and (ior (eq_attr "type" "integer,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no"))
(and (eq_attr "type" "insert")
(eq_attr "size" "64")))
@ -201,16 +201,16 @@
;; add, addo, sub, subo, alter cr0, rldcli, rlwinm
(define_insn_reservation "cell-fast-cmp" 2
(and (ior (eq_attr "type" "fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "cell")
(eq_attr "cell_micro" "not"))
"slot01,fxu_cell")
(define_insn_reservation "cell-cmp-microcoded" 9
(and (ior (eq_attr "type" "fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "cell")
(eq_attr "cell_micro" "always"))

6
gcc/config/rs6000/e300c2c3.md
View File

@ -83,8 +83,8 @@
;; Compares can be executed either one of the IU or SRU
(define_insn_reservation "ppce300c3_cmp" 1
(and (ior (eq_attr "type" "cmp,compare,fast_compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
"ppce300c3_decode,ppce300c3_issue+(ppce300c3_iu_stage0|ppce300c3_sru_stage0) \
@ -93,7 +93,7 @@
;; Other one cycle IU insns
(define_insn_reservation "ppce300c3_iu" 1
(and (ior (eq_attr "type" "integer,insert,isel")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no")))
(ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
"ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_retire")

2
gcc/config/rs6000/e500mc.md
View File

@ -70,7 +70,7 @@
;; Simple SU insns.
(define_insn_reservation "e500mc_su" 1
(and (eq_attr "type" "integer,add,insert,cmp,compare,fast_compare,\
(and (eq_attr "type" "integer,add,logical,insert,cmp,compare,\
shift,trap,cntlz,exts,isel")
(eq_attr "cpu" "ppce500mc"))
"e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")

6
gcc/config/rs6000/e500mc64.md
View File

@ -70,7 +70,7 @@
;; Simple SU insns.
(define_insn_reservation "e500mc64_su" 1
(and (ior (eq_attr "type" "integer,insert,cntlz,exts")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no"))
(and (eq_attr "type" "shift")
(eq_attr "dot" "no")
@ -79,8 +79,8 @@
"e500mc64_decode,e500mc64_issue+e500mc64_su_stage0+e500mc64_retire")
(define_insn_reservation "e500mc64_su2" 2
(and (ior (eq_attr "type" "cmp,compare,fast_compare,trap")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp,compare,trap")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes"))
(and (eq_attr "type" "shift")
(eq_attr "dot" "yes")

6
gcc/config/rs6000/e5500.md
View File

@ -57,7 +57,7 @@
;; SFX.
(define_insn_reservation "e5500_sfx" 1
(and (ior (eq_attr "type" "integer,insert,cntlz,exts")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no"))
(and (eq_attr "type" "shift")
(eq_attr "var_shift" "no")))
@ -65,8 +65,8 @@
"e5500_decode,e5500_sfx")
(define_insn_reservation "e5500_sfx2" 2
(and (ior (eq_attr "type" "cmp,compare,fast_compare,trap")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp,compare,trap")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppce5500"))
"e5500_decode,e5500_sfx")

6
gcc/config/rs6000/e6500.md
View File

@ -60,7 +60,7 @@
;; SFX.
(define_insn_reservation "e6500_sfx" 1
(and (ior (eq_attr "type" "integer,insert,cntlz,exts")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no"))
(and (eq_attr "type" "shift")
(eq_attr "var_shift" "no")))
@ -68,8 +68,8 @@
"e6500_decode,e6500_sfx")
(define_insn_reservation "e6500_sfx2" 2
(and (ior (eq_attr "type" "cmp,compare,fast_compare,trap")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp,compare,trap")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "ppce6500"))
"e6500_decode,e6500_sfx")

6
gcc/config/rs6000/mpc.md
View File

@ -42,7 +42,7 @@
(define_insn_reservation "mpccore-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "mpccore"))
"iu_mpc")
@ -69,8 +69,8 @@
"mciu_mpc*6")
(define_insn_reservation "mpccore-compare" 3
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "mpccore"))
"iu_mpc,nothing,bpu_mpc")

6
gcc/config/rs6000/power4.md
View File

@ -211,7 +211,7 @@
; Integer latency is 2 cycles
(define_insn_reservation "power4-integer" 2
(and (ior (eq_attr "type" "integer,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no"))
(and (eq_attr "type" "insert")
(eq_attr "size" "64")))
@ -250,8 +250,8 @@
|(iu2_power4,nothing,iu1_power4))")
(define_insn_reservation "power4-cmp" 3
(and (ior (eq_attr "type" "cmp,fast_compare")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "power4"))
"iq_power4")

6
gcc/config/rs6000/power5.md
View File

@ -167,7 +167,7 @@
; Integer latency is 2 cycles
(define_insn_reservation "power5-integer" 2
(and (ior (eq_attr "type" "integer,trap,cntlz,exts,isel,popcnt")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no"))
(and (eq_attr "type" "insert")
(eq_attr "size" "64")))
@ -203,8 +203,8 @@
"du1_power5+du2_power5,iu1_power5,nothing,iu2_power5")
(define_insn_reservation "power5-cmp" 3
(and (ior (eq_attr "type" "cmp,fast_compare")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "power5"))
"iq_power5")

7
gcc/config/rs6000/power6.md
View File

@ -223,7 +223,7 @@
(define_insn_reservation "power6-integer" 1
(and (ior (eq_attr "type" "integer")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no")))
(eq_attr "cpu" "power6"))
"FXU_power6")
@ -338,9 +338,8 @@
"FXU_power6")
(define_insn_reservation "power6-fast-compare" 1
(and (ior (eq_attr "type" "fast_compare")
(and (eq_attr "type" "add")
(eq_attr "dot" "yes")))
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")
(eq_attr "cpu" "power6"))
"FXU_power6")

6
gcc/config/rs6000/power7.md
View File

@ -175,7 +175,7 @@
; FX Unit
(define_insn_reservation "power7-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,exts,isel,popcnt")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "power7"))
"DU_power7,FXU_power7")
@ -196,8 +196,8 @@
"DU_power7+DU_power7+DU_power7,FXU_power7,FXU_power7,FXU_power7")
(define_insn_reservation "power7-cmp" 1
(and (ior (eq_attr "type" "cmp,fast_compare")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "power7"))
"DU_power7,FXU_power7")

9
gcc/config/rs6000/power8.md
View File

@ -169,7 +169,7 @@
; FX Unit
(define_insn_reservation "power8-1cyc" 1
(and (ior (eq_attr "type" "integer,insert,trap,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "power8"))
"DU_any_power8,FXU_power8")
@ -205,11 +205,10 @@
(eq_attr "cpu" "power8"))
"DU_any_power8,FXU_power8")
; fast_compare : add./and./nor./etc
; add/logical with dot : add./and./nor./etc
(define_insn_reservation "power8-fast-compare" 2
(and (ior (eq_attr "type" "fast_compare")
(and (eq_attr "type" "add")
(eq_attr "dot" "yes")))
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")
(eq_attr "cpu" "power8"))
"DU_any_power8,FXU_power8")

4
gcc/config/rs6000/rs6000.c
View File

@ -26242,8 +26242,8 @@ rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
}
case TYPE_INTEGER:
case TYPE_ADD:
case TYPE_LOGICAL:
case TYPE_COMPARE:
case TYPE_FAST_COMPARE:
case TYPE_EXTS:
case TYPE_INSERT:
{
@ -26306,8 +26306,8 @@ rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
}
case TYPE_INTEGER:
case TYPE_ADD:
case TYPE_LOGICAL:
case TYPE_COMPARE:
case TYPE_FAST_COMPARE:
case TYPE_EXTS:
case TYPE_INSERT:
{

89
gcc/config/rs6000/rs6000.md
View File

@ -159,13 +159,13 @@
;; computations.
(define_attr "type"
"integer,two,three,
add,shift,insert,
add,logical,shift,insert,
mul,halfmul,div,
exts,cntlz,popcnt,isel,
load,store,fpload,fpstore,vecload,vecstore,
cmp,
branch,jmpreg,mfjmpr,mtjmpr,trap,isync,sync,load_l,store_c,
compare,fast_compare,
compare,
cr_logical,delayed_cr,mfcr,mfcrf,mtcr,
fpcompare,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,
brinc,
@ -179,7 +179,7 @@
(define_attr "size" "8,16,32,64" (const_string "32"))
;; Is this instruction record form ("dot", signed compare to 0, writing CR0)?
;; This is used for mul.
;; This is used for add, logical, shift, mul.
(define_attr "dot" "no,yes" (const_string "no"))
;; Does this instruction sign-extend its result?
@ -877,7 +877,8 @@
"@
andi. %2,%1,0xff
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -903,7 +904,8 @@
"@
andi. %0,%1,0xff
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -997,7 +999,8 @@
"@
andi. %2,%1,0xff
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -1023,7 +1026,8 @@
"@
andi. %0,%1,0xff
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -1123,7 +1127,8 @@
"@
andi. %2,%1,0xffff
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -1149,7 +1154,8 @@
"@
andi. %0,%1,0xffff
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -1952,7 +1958,8 @@
"@
nor. %2,%1,%1
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -1978,7 +1985,8 @@
"@
nor. %0,%1,%1
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -2907,7 +2915,8 @@
rlwinm %0,%1,0,%m2,%M2
andi. %0,%1,%b2
andis. %0,%1,%u2"
[(set_attr "type" "*,*,fast_compare,fast_compare")])
[(set_attr "type" "*,*,logical,logical")
(set_attr "dot" "no,no,yes,yes")])
(define_insn "andsi3_nomc"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
@ -2950,7 +2959,7 @@
#
#
#"
[(set_attr "type" "fast_compare,fast_compare,fast_compare,shift,\
[(set_attr "type" "logical,logical,logical,shift,\
compare,compare,compare,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,4,4,4,8,8,8,8")])
@ -2972,7 +2981,7 @@
#
#
#"
[(set_attr "type" "compare,fast_compare,fast_compare,shift,compare,\
[(set_attr "type" "compare,logical,logical,shift,compare,\
compare,compare,compare")
(set_attr "dot" "yes")
(set_attr "length" "8,4,4,4,8,8,8,8")])
@ -3033,7 +3042,7 @@
#
#
#"
[(set_attr "type" "fast_compare,fast_compare,fast_compare,shift,\
[(set_attr "type" "logical,logical,logical,shift,\
compare,compare,compare,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,4,4,4,8,8,8,8")])
@ -3057,7 +3066,7 @@
#
#
#"
[(set_attr "type" "compare,fast_compare,fast_compare,shift,compare,\
[(set_attr "type" "compare,logical,logical,shift,compare,\
compare,compare,compare")
(set_attr "dot" "yes")
(set_attr "length" "8,4,4,4,8,8,8,8")])
@ -3190,7 +3199,8 @@
"@
%q4. %3,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -3219,7 +3229,8 @@
"@
%q4. %0,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -3344,7 +3355,8 @@
"@
%q4. %3,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -3373,7 +3385,8 @@
"@
%q4. %0,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -4550,7 +4563,7 @@
#
#
#"
[(set_attr "type" "fast_compare,shift,shift,shift,shift,shift")
[(set_attr "type" "logical,shift,shift,shift,shift,shift")
(set_attr "var_shift" "no,yes,no,no,yes,no")
(set_attr "dot" "yes")
(set_attr "length" "4,4,4,8,8,8")])
@ -4584,7 +4597,7 @@
#
#
#"
[(set_attr "type" "fast_compare,shift,shift,shift,shift,shift")
[(set_attr "type" "logical,shift,shift,shift,shift,shift")
(set_attr "var_shift" "no,yes,no,no,yes,no")
(set_attr "dot" "yes")
(set_attr "length" "4,4,4,8,8,8")])
@ -8071,7 +8084,8 @@
andi. %0,%1,%b2
andis. %0,%1,%u2
#"
[(set_attr "type" "*,*,*,fast_compare,fast_compare,*")
[(set_attr "type" "*,*,*,logical,logical,*")
(set_attr "dot" "no,no,no,yes,yes,no")
(set_attr "length" "4,4,4,4,4,8")])
(define_insn "anddi3_nomc"
@ -8129,8 +8143,8 @@
#
#
#"
[(set_attr "type" "fast_compare,compare,shift,fast_compare,\
fast_compare,compare,compare,compare,compare,compare,\
[(set_attr "type" "logical,compare,shift,logical,\
logical,compare,compare,compare,compare,compare,\
compare,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,4,4,4,4,8,8,8,8,8,8,12")])
@ -8183,8 +8197,8 @@
#
#
#"
[(set_attr "type" "fast_compare,compare,shift,fast_compare,\
fast_compare,compare,compare,compare,compare,compare,\
[(set_attr "type" "logical,compare,shift,logical,\
logical,compare,compare,compare,compare,compare,\
compare,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,4,4,4,4,8,8,8,8,8,8,12")])
@ -8316,7 +8330,8 @@
"@
%q4. %3,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -8345,7 +8360,8 @@
"@
%q4. %0,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -8405,7 +8421,8 @@
"@
%q4. %3,%2,%1
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -8434,7 +8451,8 @@
"@
%q4. %0,%2,%1
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -8471,7 +8489,8 @@
"@
%q4. %3,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -8500,7 +8519,8 @@
"@
%q4. %0,%1,%2
#"
[(set_attr "type" "fast_compare,compare")
[(set_attr "type" "logical,compare")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
@ -9039,7 +9059,8 @@
cmp<wd>i %2,%0,0
mr. %0,%1
#"
[(set_attr "type" "cmp,fast_compare,cmp")
[(set_attr "type" "cmp,logical,cmp")
(set_attr "dot" "yes")
(set_attr "length" "4,4,8")])
(define_split

6
gcc/config/rs6000/rs64.md
View File

@ -47,7 +47,7 @@
(define_insn_reservation "rs64a-integer" 1
(and (ior (eq_attr "type" "integer,insert,trap,cntlz,exts,isel")
(and (eq_attr "type" "add,shift")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "no")))
(eq_attr "cpu" "rs64a"))
"iu_rs64")
@ -99,8 +99,8 @@
"mciu_rs64*66")
(define_insn_reservation "rs64a-compare" 3
(and (ior (eq_attr "type" "cmp,fast_compare,compare")
(and (eq_attr "type" "add,shift")
(and (ior (eq_attr "type" "cmp,compare")
(and (eq_attr "type" "add,logical,shift")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "rs64a"))
"iu_rs64,nothing,bpu_rs64")

6
gcc/config/rs6000/titan.md
View File

@ -34,8 +34,8 @@
;; instructions. It provides its own, dedicated result-bus, so we
;; don't need the titan_fxu_wb reservation to complete.
(define_insn_reservation "titan_fxu_adder" 1
(and (ior (eq_attr "type" "cmp,fast_compare,trap")
(and (eq_attr "type" "add")
(and (ior (eq_attr "type" "cmp,trap")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "yes")))
(eq_attr "cpu" "titan"))
"titan_issue,titan_fxu_sh")
@ -75,7 +75,7 @@
(define_insn_reservation "titan_fxu_alu" 1
(and (ior (eq_attr "type" "integer,exts")
(and (eq_attr "type" "add")
(and (eq_attr "type" "add,logical")
(eq_attr "dot" "no")))
(eq_attr "cpu" "titan"))
"titan_issue,titan_fxu_sh,nothing,titan_fxu_wb")