h8300.md (logical<mode>3_sn, [...]): Merge into a single pattern.

* config/h8300/h8300.md (logical<mode>3_sn, logical<mode>3): Merge
        into a single pattern.

From-SVN: r262369
This commit is contained in:
Jeff Law 2018-07-03 20:22:35 -06:00 committed by Jeff Law
parent 7af7cb515f
commit 7422f0ff39
2 changed files with 4 additions and 22 deletions

View File

@ -13,6 +13,9 @@
2018-07-03 Jeff Law <law@redhat.com>
* config/h8300/h8300.md (logical<mode>3_sn, logical<mode>3): Merge
into a single pattern.
* config/h8300/h8300.md (ors code_iterator): New.
(bsetqi_msx, bnotqi_msx patterns and splitters): Consolidate into
a single pattern and single splitter.

View File

@ -1645,34 +1645,13 @@
;; {AND,IOR,XOR}{HI3,SI3} PATTERNS
;; ----------------------------------------------------------------------
;; We need a separate pattern here because machines other than the
;; original H8300 don't have to split the 16-bit operand into a pair
;; of high/low instructions, so we can accept literal addresses, that
;; have to be loaded into a register on H8300.
(define_insn "*logical<mode>3_sn"
[(set (match_operand:HSI 0 "h8300_dst_operand" "=rQ")
(match_operator:HSI 3 "bit_operator"
[(match_operand:HSI 1 "h8300_dst_operand" "%0")
(match_operand:HSI 2 "h8300_src_operand" "rQi")]))]
"(TARGET_H8300S || TARGET_H8300H) && h8300_operands_match_p (operands)"
{
return output_logical_op (<MODE>mode, operands);
}
[(set (attr "length")
(symbol_ref "compute_logical_op_length (<MODE>mode, operands)"))
(set (attr "cc")
(symbol_ref "compute_logical_op_cc (<MODE>mode, operands)"))])
(define_insn "*logical<mode>3"
[(set (match_operand:HSI 0 "h8300_dst_operand" "=rQ")
(match_operator:HSI 3 "bit_operator"
[(match_operand:HSI 1 "h8300_dst_operand" "%0")
(match_operand:HSI 2 "h8300_src_operand" "rQi")]))]
"h8300_operands_match_p (operands)"
{
return output_logical_op (<MODE>mode, operands);
}
{ return output_logical_op (<MODE>mode, operands); }
[(set (attr "length")
(symbol_ref "compute_logical_op_length (<MODE>mode, operands)"))
(set (attr "cc")