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i386.c (ix86_output_addr_diff_elt): Avoid x86_64 binutils bug workaround.

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* i386.c (ix86_output_addr_diff_elt): Avoid x86_64 binutils bug
	workaround.
	(ix86_expand_int_movcc): Avoid x86_64 compilation chrash.
	(ix86_expand_clrstr): Fix typo.
	* loop.c (gen_load_of_final_value): New.
	(loop_givs_rescan, strength_reduce, check_dbra_loop):
	Use it.

From-SVN: r52664
This commit is contained in:
Jan Hubicka 2002-04-23 14:29:43 +02:00 committed by Jan Hubicka
parent 1a887f860a
commit 7441103929
3 changed files with 42 additions and 10 deletions
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10
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
Tue Apr 23 14:24:25 CEST 2002 Jan Hubicka <jh@suse.cz>
* i386.c (ix86_output_addr_diff_elt): Avoid x86_64 binutils bug
workaround.
(ix86_expand_int_movcc): Avoid x86_64 compilation chrash.
(ix86_expand_clrstr): Fix typo.
* loop.c (gen_load_of_final_value): New.
(loop_givs_rescan, strength_reduce, check_dbra_loop):
Use it.
2002-04-23 Roger Sayle <roger@eyesopen.com>
* builtins.c (builtin_memset_gen_str): New function.

12
gcc/config/i386/i386.c
View File

@ -6686,7 +6686,7 @@ ix86_output_addr_diff_elt (file, value, rel)
int value, rel;
{
if (TARGET_64BIT)
fprintf (file, "%s%s%d-.+(.-%s%d)\n",
fprintf (file, "%s%s%d-%s%d\n",
ASM_LONG, LPREFIX, value, LPREFIX, rel);
else if (HAVE_AS_GOTOFF_IN_DATA)
fprintf (file, "%s%s%d@GOTOFF\n", ASM_LONG, LPREFIX, value);
@ -7983,6 +7983,10 @@ ix86_expand_int_movcc (operands)
&& GET_CODE (ix86_compare_op1) == CONST_INT
&& mode != HImode
&& (unsigned int) INTVAL (ix86_compare_op1) != 0xffffffff
/* The operand still must be representable as sign extended value. */
&& (!TARGET_64BIT
|| GET_MODE (ix86_compare_op0) != DImode
|| (unsigned int) INTVAL (ix86_compare_op1) != 0x7fffffff)
&& GET_CODE (operands[2]) == CONST_INT
&& GET_CODE (operands[3]) == CONST_INT)
{
@ -9528,7 +9532,7 @@ ix86_expand_clrstr (src, count_exp, align_exp)
gen_rtx_SUBREG (SImode, zeroreg, 0)));
if (TARGET_64BIT && (align <= 4 || count == 0))
{
rtx label = ix86_expand_aligntest (destreg, 2);
rtx label = ix86_expand_aligntest (countreg, 2);
emit_insn (gen_strsetsi (destreg,
gen_rtx_SUBREG (SImode, zeroreg, 0)));
emit_label (label);
@ -9539,7 +9543,7 @@ ix86_expand_clrstr (src, count_exp, align_exp)
gen_rtx_SUBREG (HImode, zeroreg, 0)));
if (align <= 2 || count == 0)
{
rtx label = ix86_expand_aligntest (destreg, 2);
rtx label = ix86_expand_aligntest (countreg, 2);
emit_insn (gen_strsethi (destreg,
gen_rtx_SUBREG (HImode, zeroreg, 0)));
emit_label (label);
@ -9550,7 +9554,7 @@ ix86_expand_clrstr (src, count_exp, align_exp)
gen_rtx_SUBREG (QImode, zeroreg, 0)));
if (align <= 1 || count == 0)
{
rtx label = ix86_expand_aligntest (destreg, 1);
rtx label = ix86_expand_aligntest (countreg, 1);
emit_insn (gen_strsetqi (destreg,
gen_rtx_SUBREG (QImode, zeroreg, 0)));
emit_label (label);

30
gcc/loop.c
View File

@ -354,6 +354,7 @@ static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
static void loop_delete_insns PARAMS ((rtx, rtx));
static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
static rtx gen_load_of_final_value PARAMS ((rtx, rtx));
void debug_ivs PARAMS ((const struct loop *));
void debug_iv_class PARAMS ((const struct iv_class *));
void debug_biv PARAMS ((const struct induction *));
@ -4798,7 +4799,8 @@ loop_givs_rescan (loop, bl, reg_map)
v->mult_val, v->add_val, v->dest_reg);
else if (v->final_value)
loop_insn_sink_or_swim (loop,
gen_move_insn (v->dest_reg, v->final_value));
gen_load_of_final_value (v->dest_reg,
v->final_value));
if (loop_dump_stream)
{
@ -5155,8 +5157,9 @@ strength_reduce (loop, flags)
value, so we don't need another one. We can't calculate the
proper final value for such a biv here anyways. */
if (bl->final_value && ! bl->reversed)
loop_insn_sink_or_swim (loop, gen_move_insn
(bl->biv->dest_reg, bl->final_value));
loop_insn_sink_or_swim (loop,
gen_load_of_final_value (bl->biv->dest_reg,
bl->final_value));
if (loop_dump_stream)
fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
@ -5165,8 +5168,8 @@ strength_reduce (loop, flags)
/* See above note wrt final_value. But since we couldn't eliminate
the biv, we must set the value after the loop instead of before. */
else if (bl->final_value && ! bl->reversed)
loop_insn_sink (loop, gen_move_insn (bl->biv->dest_reg,
bl->final_value));
loop_insn_sink (loop, gen_load_of_final_value (bl->biv->dest_reg,
bl->final_value));
}
/* Go through all the instructions in the loop, making all the
@ -8361,7 +8364,7 @@ check_dbra_loop (loop, insn_count)
if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
|| ! bl->init_insn
|| REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
loop_insn_sink (loop, gen_move_insn (reg, final_value));
loop_insn_sink (loop, gen_load_of_final_value (reg, final_value));
/* Delete compare/branch at end of loop. */
delete_related_insns (PREV_INSN (loop_end));
@ -10352,6 +10355,21 @@ loop_insn_sink (loop, pattern)
return loop_insn_emit_before (loop, 0, loop->sink, pattern);
}
/* bl->final_value can be eighter general_operand or PLUS of general_operand
and constant. Emit sequence of intructions to load it into REG */
static rtx
gen_load_of_final_value (reg, final_value)
rtx reg, final_value;
{
rtx seq;
start_sequence ();
final_value = force_operand (final_value, reg);
if (final_value != reg)
emit_move_insn (reg, final_value);
seq = gen_sequence ();
end_sequence ();
return seq;
}
/* If the loop has multiple exits, emit insn for PATTERN before the
loop to ensure that it will always be executed no matter how the