Implement x86 pause intrinsic.
gcc/ 2011-05-25 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_PAUSE. (bdesc_special_args): Add pause intrinsic. * config/i386/i386.md (UNSPEC_PAUSE): New. (pause): Likewise. (*pause): Likewise. * config/i386/ia32intrin.h (__pause): Likewise. * doc/extend.texi (X86 Built-in Functions): Add documentation for pause intrinsic. gcc/testsuite/ 2011-05-25 H.J. Lu <hongjiu.lu@intel.com> * gcc.target/i386/pause-1.c: New. From-SVN: r174197
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@ -1,3 +1,16 @@
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2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_PAUSE.
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(bdesc_special_args): Add pause intrinsic.
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* config/i386/i386.md (UNSPEC_PAUSE): New.
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(pause): Likewise.
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(*pause): Likewise.
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* config/i386/ia32intrin.h (__pause): Likewise.
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* doc/extend.texi (X86 Built-in Functions): Add documentation for
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pause intrinsic.
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2011-05-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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PR tree-optimization/46728
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@ -23912,6 +23912,7 @@ enum ix86_builtins
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IX86_BUILTIN_CLFLUSH,
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IX86_BUILTIN_MFENCE,
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IX86_BUILTIN_LFENCE,
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IX86_BUILTIN_PAUSE,
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IX86_BUILTIN_BSRSI,
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IX86_BUILTIN_BSRDI,
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@ -24664,6 +24665,7 @@ static const struct builtin_description bdesc_special_args[] =
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{
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{ ~OPTION_MASK_ISA_64BIT, CODE_FOR_rdtsc, "__builtin_ia32_rdtsc", IX86_BUILTIN_RDTSC, UNKNOWN, (int) UINT64_FTYPE_VOID },
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{ ~OPTION_MASK_ISA_64BIT, CODE_FOR_rdtscp, "__builtin_ia32_rdtscp", IX86_BUILTIN_RDTSCP, UNKNOWN, (int) UINT64_FTYPE_PUNSIGNED },
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{ ~OPTION_MASK_ISA_64BIT, CODE_FOR_pause, "__builtin_ia32_pause", IX86_BUILTIN_PAUSE, UNKNOWN, (int) VOID_FTYPE_VOID },
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/* MMX */
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{ OPTION_MASK_ISA_MMX, CODE_FOR_mmx_emms, "__builtin_ia32_emms", IX86_BUILTIN_EMMS, UNKNOWN, (int) VOID_FTYPE_VOID },
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@ -108,6 +108,7 @@
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UNSPEC_TRUNC_NOOP
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UNSPEC_DIV_ALREADY_SPLIT
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UNSPEC_CALL_NEEDS_VZEROUPPER
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UNSPEC_PAUSE
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;; For SSE/MMX support:
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UNSPEC_FIX_NOTRUNC
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@ -17716,6 +17717,25 @@
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[(set_attr "type" "other")
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(set_attr "prefix_extra" "1")])
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(define_expand "pause"
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[(set (match_dup 0)
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(unspec:BLK [(match_dup 0)] UNSPEC_PAUSE))]
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""
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{
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operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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MEM_VOLATILE_P (operands[0]) = 1;
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})
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;; Use "rep; nop", instead of "pause", to support older assemblers.
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;; They have the same encoding.
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(define_insn "*pause"
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[(set (match_operand:BLK 0 "" "")
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(unspec:BLK [(match_dup 0)] UNSPEC_PAUSE))]
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""
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"rep; nop"
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[(set_attr "length" "2")
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(set_attr "memory" "unknown")])
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(include "mmx.md")
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(include "sse.md")
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(include "sync.md")
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@ -153,6 +153,14 @@ __rord (unsigned int __X, int __C)
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return (__X >> __C) | (__X << (32 - __C));
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}
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/* Pause */
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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__pause (void)
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{
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__builtin_ia32_pause ();
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}
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#ifdef __x86_64__
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/* 64bit bsf */
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extern __inline int
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@ -8695,6 +8695,13 @@ __float128 __builtin_fabsq (__float128)
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__float128 __builtin_copysignq (__float128, __float128)
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@end smallexample
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The following built-in function is always available.
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@table @code
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@item void __builtin_ia32_pause (void)
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Generates the @code{pause} machine instruction with full memory barrier.
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@end table
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The following floating point built-in functions are made available in the
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64-bit mode.
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@ -1,3 +1,7 @@
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2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
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* gcc.target/i386/pause-1.c: New.
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2011-05-25 Eric Botcazou <ebotcazou@adacore.com>
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* gcc.dg/stack-usage-1.c: Adjust comment.
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11
gcc/testsuite/gcc.target/i386/pause-1.c
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11
gcc/testsuite/gcc.target/i386/pause-1.c
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/* Test that we generate pause instruction. */
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/* { dg-do compile } */
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/* { dg-options "-O2 -dp" } */
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/* { dg-final { scan-assembler-times "\\*pause" 1 } } */
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#include <x86intrin.h>
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void foo(void)
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{
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__pause();
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}
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