re PR target/59422 (Support more targets for function multi versioning)

gcc/

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59422
	* config/i386/i386.c (get_builtin_code_for_version): Handle
	PROCESSOR_HASWELL, PROCESSOR_SILVERMONT, PROCESSOR_BTVER1,
	PROCESSOR_BTVER2, PROCESSOR_BDVER3 and PROCESSOR_BDVER4.
	Change priority of PROCESSOR_BDVER1 to P_PROC_XOP.
	(fold_builtin_cpu): Add "ivybridge", "haswell", "bonnell",
	"silvermont", "bobcat" and "jaguar" CPU names.  Add "sse4a",
	"fma4", "xop" and "fma" ISA names.

libgcc/

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>
	    H.J. Lu  <hongjiu.lu@intel.com>

        PR target/59422
        * config/i386/cpuinfo.c (enum processor_types):  Add AMD_BOBCAT
	and AMD_JAGUAR.
	(enum processor_subtypes): Add AMDFAM15H_BDVER3, AMDFAM15H_BDVER4,
	INTEL_COREI7_IVYBRIDGE and INTEL_COREI7_HASWELL.
	(enum processor_features): Add  FEATURE_SSE4_A, FEATURE_FMA4,
	FEATURE_XOP and FEATURE_FMA.
	(get_amd_cpu): Handle AMD_BOBCAT, AMD_JAGUAR, AMDFAM15H_BDVER2 and
	AMDFAM15H_BDVER3.
	(get_intel_cpu): Handle INTEL_COREI7 and INTEL_COREI7_HASWELL.
        (get_available_features): Handle FEATURE_FMA, FEATURE_SSE4_A,
	FEATURE_FMA4 and FEATURE_XOP.

testsuite/

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>

	PR target/59422
	* gcc.target/i386/funcspec-5.c (test_fma, test_xop, test_no_fma,
	test_no_xop, test_arch_corei7, test_arch_corei7_avx,
	test_arch_core_avx2, test_arch_bdver1, test_arch_bdver2,
	test_arch_bdver3, test_tune_corei7, test_tune_corei7_avx,
	test_tune_core_avx2, test_tune_bdver1, test_tune_bdver2 and
	test_tune_bdver3): New function prototypes.

From-SVN: r206200
This commit is contained in:
Allan Sandfeld Jensen 2013-12-25 23:22:24 +01:00 committed by Uros Bizjak
parent 80d69d3a85
commit 74924838e8
7 changed files with 289 additions and 140 deletions

View File

@ -1,3 +1,15 @@
2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org>
H.J. Lu <hongjiu.lu@intel.com>
PR target/59422
* config/i386/i386.c (get_builtin_code_for_version): Handle
PROCESSOR_HASWELL, PROCESSOR_SILVERMONT, PROCESSOR_BTVER1,
PROCESSOR_BTVER2, PROCESSOR_BDVER3 and PROCESSOR_BDVER4.
Change priority of PROCESSOR_BDVER1 to P_PROC_XOP.
(fold_builtin_cpu): Add "ivybridge", "haswell", "bonnell",
"silvermont", "bobcat" and "jaguar" CPU names. Add "sse4a",
"fma4", "xop" and "fma" ISA names.
2013-12-24 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (ix86_option_override_internal): Check
@ -62,7 +74,7 @@
consant/external operand, and add a few missing \n.
2013-12-23 H.J. Lu <hongjiu.lu@intel.com>
Tocar Ilya <ilya.tocar@intel.com>
Tocar Ilya <ilya.tocar@intel.com>
* config/i386/core2.md: Replace corei7 with nehalem.
@ -189,8 +201,8 @@
2013-12-20 Vladimir Makarov <vmakarov@redhat.com>
* config/arm/arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return NO_REGS
for LRA.
* config/arm/arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return
NO_REGS for LRA.
2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
@ -200,7 +212,7 @@
PR tree-optimization/59544
* tree-vect-stmts.c (perm_mask_for_reverse): Move before
vectorizable_store.
vectorizable_store.
(vectorizable_store): Handle negative step.
2013-12-20 Tocar Ilya <ilya.tocar@intel.com>
@ -256,8 +268,8 @@
(attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter
to unsigned.
(attr_rtx_1): Change hashcode variable to unsigned.
(attr_string): Likewise. Perform first multiplication in unsigned
type.
(attr_string): Likewise. Perform first multiplication in
unsigned type.
* ifcvt.c (noce_try_store_flag_constants): Avoid signed integer
overflows.
* double-int.c (neg_double): Likewise.
@ -270,8 +282,7 @@
* ipa-split.c (find_split_points): Initialize first.can_split
and first.non_ssa_vars.
* gengtype-state.c (read_state_files_list): Fix up check.
* genautomata.c (reserv_sets_hash_value): Use portable rotation
idiom.
* genautomata.c (reserv_sets_hash_value): Use portable rotation idiom.
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
@ -284,44 +295,44 @@
2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (enum arm_builtins): Add crypto builtins.
(arm_init_neon_builtins): Handle crypto builtins.
(bdesc_2arg): Likewise.
(bdesc_1arg): Likewise.
(bdesc_3arg): New table.
(arm_expand_ternop_builtin): New function.
(arm_expand_unop_builtin): Handle sha1h explicitly.
(arm_expand_builtin): Handle ternary builtins.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS):
Define __ARM_FEATURE_CRYPTO.
* config/arm/arm.md: Include crypto.md.
(is_neon_type): Add crypto types.
* config/arm/arm_neon_builtins.def: Add TImode reinterprets.
* config/arm/crypto.def: New.
* config/arm/crypto.md: Likewise.
* config/arm/iterators.md (CRYPTO_UNARY): New int iterator.
(CRYPTO_BINARY): Likewise.
(CRYPTO_TERNARY): Likewise.
(CRYPTO_SELECTING): Likewise.
(crypto_pattern): New int attribute.
(crypto_size_sfx): Likewise.
(crypto_mode): Likewise.
(crypto_type): Likewise.
* config/arm/neon-gen.ml: Handle poly64_t and poly128_t types.
Handle crypto intrinsics.
* config/arm/neon.ml: Add support for poly64 and polt128 types
and intrinsics. Define crypto intrinsics.
* config/arm/neon.md (neon_vreinterpretti<mode>): New pattern.
(neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator.
(neon_vreinterpretv8hi<mode>): Likewise.
(neon_vreinterpretv4si<mode>): Likewise.
(neon_vreinterpretv4sf<mode>): Likewise.
(neon_vreinterpretv2di<mode>): Likewise.
* config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC,
UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H,
UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2,
UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define.
* config/arm/arm_neon.h: Regenerate.
* config/arm/arm.c (enum arm_builtins): Add crypto builtins.
(arm_init_neon_builtins): Handle crypto builtins.
(bdesc_2arg): Likewise.
(bdesc_1arg): Likewise.
(bdesc_3arg): New table.
(arm_expand_ternop_builtin): New function.
(arm_expand_unop_builtin): Handle sha1h explicitly.
(arm_expand_builtin): Handle ternary builtins.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS):
Define __ARM_FEATURE_CRYPTO.
* config/arm/arm.md: Include crypto.md.
(is_neon_type): Add crypto types.
* config/arm/arm_neon_builtins.def: Add TImode reinterprets.
* config/arm/crypto.def: New.
* config/arm/crypto.md: Likewise.
* config/arm/iterators.md (CRYPTO_UNARY): New int iterator.
(CRYPTO_BINARY): Likewise.
(CRYPTO_TERNARY): Likewise.
(CRYPTO_SELECTING): Likewise.
(crypto_pattern): New int attribute.
(crypto_size_sfx): Likewise.
(crypto_mode): Likewise.
(crypto_type): Likewise.
* config/arm/neon-gen.ml: Handle poly64_t and poly128_t types.
Handle crypto intrinsics.
* config/arm/neon.ml: Add support for poly64 and polt128 types
and intrinsics. Define crypto intrinsics.
* config/arm/neon.md (neon_vreinterpretti<mode>): New pattern.
(neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator.
(neon_vreinterpretv8hi<mode>): Likewise.
(neon_vreinterpretv4si<mode>): Likewise.
(neon_vreinterpretv4sf<mode>): Likewise.
(neon_vreinterpretv2di<mode>): Likewise.
* config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC)
(UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H)
(UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2)
(UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define.
* config/arm/arm_neon.h: Regenerate.
2013-12-19 H.J. Lu <hongjiu.lu@intel.com>
@ -347,8 +358,8 @@
(arm_init_crc32_builtins): New function.
(arm_init_builtins): Initialise CRC32 builtins.
(arm_file_start): Handle architecture extensions.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32.
Define __ARM_32BIT_STATE.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
__ARM_FEATURE_CRC32. Define __ARM_32BIT_STATE.
(TARGET_CRC32): Define.
* config/arm/arm-arches.def: Add armv8-a+crc.
* config/arm/arm-tables.opt: Regenerate.
@ -403,8 +414,9 @@
2013-12-19 Tejas Belagod <tejas.belagod@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
* config/aarch64/aarch64-simd.md (aarch64_crypto_sha256h<sha256_op>v4si,
aarch64_crypto_sha256su0v4si, aarch64_crypto_sha256su1v4si): New.
* config/aarch64/aarch64-simd.md
(aarch64_crypto_sha256h<sha256_op>v4si, aarch64_crypto_sha256su0v4si,
aarch64_crypto_sha256su1v4si): New.
* config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32,
vsha256su0q_u32, vsha256su1q_u32): New.
* config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>):
@ -456,32 +468,33 @@
Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New
constant
(s390_hotpatch_trampoline_halfwords_max): New constant
(s390_hotpatch_trampoline_halfwords): New static variable
(get_hotpatch_attribute): New function
(s390_handle_hotpatch_attribute): New function
(s390_attribute_table): New target specific attribute table to implement
the hotpatch attribute
(s390_option_override): Parse hotpatch options
(s390_function_num_hotpatch_trampoline_halfwords): New function
constant.
(s390_hotpatch_trampoline_halfwords_max): New constant.
(s390_hotpatch_trampoline_halfwords): New static variable.
(get_hotpatch_attribute): New function.
(s390_handle_hotpatch_attribute): New function.
(s390_attribute_table): New target specific attribute table to
implement the hotpatch attribute.
(s390_option_override): Parse hotpatch options.
(s390_function_num_hotpatch_trampoline_halfwords): New function.
(s390_can_inline_p): Implement target hook to
suppress hotpatching for explicitly inlined functions
(s390_asm_output_function_label): Generate hotpatch prologue
(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table
(TARGET_CAN_INLINE_P): Define to implement target hook
* config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=
suppress hotpatching for explicitly inlined functions.
(s390_asm_output_function_label): Generate hotpatch prologue.
(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table.
(TARGET_CAN_INLINE_P): Define to implement target hook.
* config/s390/s390.opt (mhotpatch): New options -mhotpatch,
-mhotpatch=.
* config/s390/s390-protos.h (s390_asm_output_function_label): Add
prototype
prototype.
* config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific
function label generation for hotpatching
(FUNCTION_BOUNDARY): Align functions to eight bytes
* doc/extend.texi: Document hotpatch attribute
* doc/invoke.texi: Document -mhotpatch option
function label generation for hotpatching.
(FUNCTION_BOUNDARY): Align functions to eight bytes.
* doc/extend.texi: Document hotpatch attribute.
* doc/invoke.texi: Document -mhotpatch option.
2013-12-19 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
* config/i386/i386.c: Include cfgloop.h.
* config/i386/i386.c: Include cfgloop.h.
(ix86_loop_memcount): New function.
(ix86_loop_unroll_adjust): New function.
(TARGET_LOOP_UNROLL_ADJUST): Define.
@ -514,15 +527,11 @@
2013-12-18 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-cores.def: Add new column for
SCHEDULER_IDENT.
* config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle
SCHEDULER_IDENT.
* config/aarch64/aarch64.c (AARCH64_CORE): Handle
SCHEDULER_IDENT.
* config/aarch64/aarch64-cores.def: Add new column for SCHEDULER_IDENT.
* config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle SCHEDULER_IDENT.
* config/aarch64/aarch64.c (AARCH64_CORE): Handle SCHEDULER_IDENT.
(aarch64_parse_cpu): mcpu implies a default value for mtune.
* config/aarch64/aarch64.h (AARCH64_CORE): Handle
SCHEDULER_IDENT.
* config/aarch64/aarch64.h (AARCH64_CORE): Handle SCHEDULER_IDENT.
2013-12-18 James Greenhalgh <james.greenhalgh@arm.com>
@ -544,9 +553,9 @@
* omp-low.c (simd_clone_clauses_extract): Replaced the string
"cilk simd elemental" with "cilk simd function."
* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
Removed a carriage-return from a warning string.
2013-12-18 Aldy Hernandez <aldyh@redhat.com>
* passes.c (execute_function_dump): Set graph_dump_initialized
@ -576,7 +585,7 @@
* config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko.
2013-12-18 James Greenhalgh <james.greenhalgh@arm.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/t-aprofile: Add cortex-a15.cortex-a7, cortex-a12,
cortex-a57, cortex-a57.cortex-a53.
@ -693,8 +702,7 @@
2013-12-17 Thomas Schwinge <thomas@codesourcery.com>
* omp-low.c (tmp_ompfn_id_num): Remove leftover variable
definition.
* omp-low.c (tmp_ompfn_id_num): Remove leftover variable definition.
* tree-pass.h (make_pass_expand_omp_ssa): Remove leftover function
declaration.
@ -703,8 +711,7 @@
* omp-low.c (check_combined_parallel): Reflect reality in comment.
* doc/cfg.texi (Control Flow): Refer to passes.def instead of
passes.c.
* doc/cfg.texi (Control Flow): Refer to passes.def instead of passes.c.
* doc/passes.texi (Pass manager): Refer to passes.def.
* doc/gccint.texi (Top): Fix inclusion order.
@ -776,8 +783,8 @@
2013-12-17 Jan Hubicka <hubicka@ucw.cz>
* ipa-utils.h (possible_polymorphic_call_targets): Determine context of
the call.
* ipa-utils.h (possible_polymorphic_call_targets): Determine
context of the call.
* gimple-fold.c (gimple_fold_call): Use ipa-devirt to devirtualize.
2013-12-17 Jakub Jelinek <jakub@redhat.com>
@ -812,12 +819,12 @@
* config/arm/driver-arm.c (arm_cpu_table): Add cortex-a12 entry.
2013-12-14 Jan Hubicka <jh@suse.cz>
Markus Trippelsdorf <octoploid@yandex.com>
Markus Trippelsdorf <octoploid@yandex.com>
PR ipa/59265
* ipa-profile.c (ipa_profile_generate_summary): Do not ICE when
call is already devirtualized.
2013-12-16 Jakub Jelinek <jakub@redhat.com>
* Makefile.in (version.o): Restore dependencies on
@ -882,6 +889,7 @@
devirtualized calls.
2013-12-14 Jan Hubicka <jh@suse.cz>
PR middle-end/58477
* ipa-prop.c (stmt_may_be_vtbl_ptr_store): Skip clobbers.
@ -945,7 +953,7 @@
2013-12-13 Kenneth Zadeck <zadeck@naturalbridge.com>
* genmodes.c (emit_max_int): Fixed missing parens.
2013-12-13 Aldy Hernandez <aldyh@redhat.com>
PR tree-optimization/59149
@ -1066,8 +1074,7 @@
2013-12-11 Bernd Edlinger <bernd.edlinger@hotmail.de>
* expr.c (expand_assignment): Remove dependency on
flag_strict_volatile_bitfields. Always set the memory
access mode.
flag_strict_volatile_bitfields. Always set the memory access mode.
(expand_expr_real_1): Likewise.
2013-12-11 Bernd Edlinger <bernd.edlinger@hotmail.de>
@ -1234,7 +1241,7 @@
2013-12-10 H.J. Lu <hongjiu.lu@intel.com>
* basic-block.h (gcov_working_set_t): Put back typedef.
* basic-block.h (gcov_working_set_t): Put back typedef.
* gcov-io.h (gcov_bucket_type): Likewise.
(gcov_working_set_info, gcov_working_set_t): Likewise.
@ -1406,8 +1413,7 @@
afterwards, check gimple_code of stmts here. Replace is_predicated
check with dominance check. Add any_mask_load_store argument,
pass it down to if_convertible_stmt_p and if_convertible_phi_p,
call if_convertible_phi_p only after all if_convertible_stmt_p
calls.
call if_convertible_phi_p only after all if_convertible_stmt_p calls.
(if_convertible_loop_p): Add any_mask_load_store argument,
pass it down to if_convertible_loop_p_1.
(predicate_mem_writes): Emit MASK_LOAD and/or MASK_STORE calls.
@ -1456,8 +1462,7 @@
pass_if_conversion.
* tree-predcom.c (split_data_refs_to_components): Give up if
DR_STMT is a call.
* tree-vect-stmts.c (vect_mark_relevant): Don't crash if lhs
is NULL.
* tree-vect-stmts.c (vect_mark_relevant): Don't crash if lhs is NULL.
(exist_non_indexing_operands_for_use_p): Handle MASK_LOAD
and MASK_STORE.
(vectorizable_mask_load_store): New function.
@ -1545,7 +1550,7 @@
* predict.c (estimate_loops): Likewise.
* sched-rgn.c (haifa_find_rgns): Likewise.
* tree-cfg.c (split_critical_edges): Likewise.
* tree-dfa.c (renumber_gimple_stmt_uids): Likewise.
* tree-dfa.c (renumber_gimple_stmt_uids): Likewise.
* tree-loop-distribution.c (tree_loop_distribution): Likewise.
* tree-ssa-pre.c (compute_antic, insert, init_pre): Likewise.
* tree-ssa-propagate.c (ssa_prop_init): Likewise.
@ -1782,8 +1787,9 @@
vrp_initialize, identify_jump_threads, instrument_memory_accesses):
Likewise.
* ubsan.c (ubsan_pass): Likewise.
* value-prof.c (verify_histograms, gimple_value_profile_transformations,
gimple_find_values_to_profile): Likewise.
* value-prof.c (verify_histograms,
gimple_value_profile_transformations, gimple_find_values_to_profile):
Likewise.
* var-tracking.c (vt_find_locations, dump_dataflow_sets, vt_emit_notes,
vt_initialize, delete_debug_insns, vt_finalize): Likewise.
@ -1837,16 +1843,16 @@
* graphite-sese-to-poly.c (build_scop_bbs): Likewise.
* haifa-sched.c (unlink_bb_notes): Likewise.
* ipa-split.c (execute_split_functions): Likewise.
* ira-build.c (create_loop_tree_nodes,
remove_unnecessary_regions): Likewise.
* ira-build.c (create_loop_tree_nodes, remove_unnecessary_regions):
Likewise.
* ira-emit.c (ira_emit): Likewise.
* ira.c (find_moveable_pseudos, ira): Likewise.
* lcm.c (compute_antinout_edge, compute_laterin,
compute_insert_delete, pre_edge_lcm, compute_available,
compute_nearerout, compute_rev_insert_delete,
pre_edge_rev_lcm): Likewise.
* loop-unroll.c (opt_info_start_duplication,
apply_opt_in_copies): Likewise.
* loop-unroll.c (opt_info_start_duplication, apply_opt_in_copies):
Likewise.
* lower-subreg.c (decompose_multiword_subregs): Likewise.
* lra-lives.c (lra_create_live_ranges): Likewise.
* lra.c (lra): Likewise.
@ -1918,9 +1924,8 @@
* basic-block.h (label_to_block_map): Eliminate macro.
* gimple.c (gimple_set_bb): Replace uses of label_to_block_map
with uses of label_to_block_map_for_fn, making uses of cfun be
explicit.
* gimple.c (gimple_set_bb): Replace uses of label_to_block_map with
uses of label_to_block_map_for_fn, making uses of cfun be explicit.
* tree-cfg.c (delete_tree_cfg_annotations): Likewise.
(verify_gimple_label): Likewise.
@ -1928,9 +1933,8 @@
* basic-block.h (basic_block_info): Eliminate macro.
* cfgrtl.c (rtl_create_basic_block): Replace uses of
basic_block_info with basic_block_info_for_fn, making uses
of cfun be explicit.
* cfgrtl.c (rtl_create_basic_block): Replace uses of basic_block_info
with basic_block_info_for_fn, making uses of cfun be explicit.
* tree-cfg.c (build_gimple_cfg, create_bb): Likewise.
2013-12-09 David Malcolm <dmalcolm@redhat.com>
@ -1975,8 +1979,8 @@
* lra-lives.c (lra_create_live_ranges): Likewise.
* predict.c (propagate_freq): Likewise.
* regrename.c (regrename_analyze): Likewise.
* regstat.c (regstat_bb_compute_ri,
regstat_bb_compute_calls_crossed): Likewise.
* regstat.c (regstat_bb_compute_ri, regstat_bb_compute_calls_crossed):
Likewise.
* resource.c (mark_target_live_regs): Likewise.
* sched-ebb.c (ebb_fix_recovery_cfg): Likewise.
* sched-int.h (EBB_FIRST_BB, EBB_LAST_BB): Likewise.
@ -1987,8 +1991,8 @@
* sel-sched-ir.c (sel_finish_global_and_expr, verify_backedges,
purge_empty_blocks, sel_remove_loop_preheader): Likewise.
* sel-sched.c (remove_insns_that_need_bookkeeping)
(current_region_empty_p, sel_region_init,
simplify_changed_insns): Likewise.
(current_region_empty_p, sel_region_init, simplify_changed_insns):
Likewise.
* trans-mem.c (execute_tm_mark, execute_tm_edges,
tm_memopt_compute_antic, ipa_tm_scan_irr_function): Likewise.
* tree-cfg.c (make_edges, end_recording_case_labels,
@ -2003,10 +2007,11 @@
insert_phi_nodes_for, insert_updated_phi_nodes_for): Likewise.
* tree-ssa-dom.c (tree_ssa_dominator_optimize): Likewise.
* tree-ssa-live.c (live_worklist): Likewise.
* tree-ssa-loop-manip.c (compute_live_loop_exits,
add_exit_phis_var, find_uses_to_rename, copy_phi_node_args): Likewise.
* tree-ssa-loop-manip.c (compute_live_loop_exits, add_exit_phis_var,
find_uses_to_rename, copy_phi_node_args): Likewise.
* tree-ssa-pre.c (compute_antic): Likewise.
* tree-ssa-reassoc.c (update_range_test, optimize_range_tests): Likewise.
* tree-ssa-reassoc.c (update_range_test, optimize_range_tests):
Likewise.
* tree-ssa-sink.c (nearest_common_dominator_of_uses): Likewise.
* tree-ssa-tail-merge.c (same_succ_hash, same_succ_def::equal,
same_succ_flush_bbs, update_worklist, set_cluster,
@ -2091,8 +2096,7 @@
unreachable code.
(do_complex_constraint): Call set_union_with_increment with
the solution delta, not the full solution.
(make_transitive_closure_constraints): Merge the two
constraints.
(make_transitive_closure_constraints): Merge the two constraints.
2013-12-09 Richard Earnshaw <rearnsha@arm.com>
@ -14604,7 +14608,7 @@
2013-10-10 Andrew MacLeod <amacleod@redhat.com>
* config/aplha/alpha.c: Add gimple-ssa.h to include list.
* config/alpha/alpha.c: Add gimple-ssa.h to include list.
2013-10-09 Easwaran Raman <eraman@google.com>

View File

@ -29972,16 +29972,21 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
P_SSE3,
P_SSSE3,
P_PROC_SSSE3,
P_SSE4_a,
P_PROC_SSE4_a,
P_SSE4_A,
P_PROC_SSE4_A,
P_SSE4_1,
P_SSE4_2,
P_PROC_SSE4_2,
P_POPCNT,
P_AVX,
P_PROC_AVX,
P_FMA4,
P_XOP,
P_PROC_XOP,
P_FMA,
P_PROC_FMA,
P_AVX2,
P_FMA,
P_PROC_FMA
P_PROC_AVX2
};
enum feature_priority priority = P_ZERO;
@ -30000,11 +30005,15 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
{"sse", P_SSE},
{"sse2", P_SSE2},
{"sse3", P_SSE3},
{"sse4a", P_SSE4_A},
{"ssse3", P_SSSE3},
{"sse4.1", P_SSE4_1},
{"sse4.2", P_SSE4_2},
{"popcnt", P_POPCNT},
{"avx", P_AVX},
{"fma4", P_FMA4},
{"xop", P_XOP},
{"fma", P_FMA},
{"avx2", P_AVX2}
};
@ -30056,26 +30065,50 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
arg_str = "nehalem";
priority = P_PROC_SSE4_2;
break;
case PROCESSOR_SANDYBRIDGE:
arg_str = "sandybridge";
priority = P_PROC_SSE4_2;
break;
case PROCESSOR_SANDYBRIDGE:
arg_str = "sandybridge";
priority = P_PROC_AVX;
break;
case PROCESSOR_HASWELL:
arg_str = "haswell";
priority = P_PROC_AVX2;
break;
case PROCESSOR_BONNELL:
arg_str = "bonnell";
priority = P_PROC_SSSE3;
break;
case PROCESSOR_SILVERMONT:
arg_str = "silvermont";
priority = P_PROC_SSE4_2;
break;
case PROCESSOR_AMDFAM10:
arg_str = "amdfam10h";
priority = P_PROC_SSE4_a;
priority = P_PROC_SSE4_A;
break;
case PROCESSOR_BTVER1:
arg_str = "bobcat";
priority = P_PROC_SSE4_A;
break;
case PROCESSOR_BTVER2:
arg_str = "jaguar";
priority = P_PROC_AVX;
break;
case PROCESSOR_BDVER1:
arg_str = "bdver1";
priority = P_PROC_FMA;
priority = P_PROC_XOP;
break;
case PROCESSOR_BDVER2:
arg_str = "bdver2";
priority = P_PROC_FMA;
break;
case PROCESSOR_BDVER3:
arg_str = "bdver3";
priority = P_PROC_FMA;
break;
case PROCESSOR_BDVER4:
arg_str = "bdver4";
priority = P_PROC_AVX2;
break;
}
}
@ -30940,6 +30973,10 @@ fold_builtin_cpu (tree fndecl, tree *args)
F_SSE4_2,
F_AVX,
F_AVX2,
F_SSE4_A,
F_FMA4,
F_XOP,
F_FMA,
F_MAX
};
@ -30957,6 +30994,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_AMDFAM10H,
M_AMDFAM15H,
M_INTEL_SILVERMONT,
M_AMD_BOBCAT,
M_AMD_JAGUAR,
M_CPU_SUBTYPE_START,
M_INTEL_COREI7_NEHALEM,
M_INTEL_COREI7_WESTMERE,
@ -30967,7 +31006,9 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_AMDFAM15H_BDVER1,
M_AMDFAM15H_BDVER2,
M_AMDFAM15H_BDVER3,
M_AMDFAM15H_BDVER4
M_AMDFAM15H_BDVER4,
M_INTEL_COREI7_IVYBRIDGE,
M_INTEL_COREI7_HASWELL
};
static struct _arch_names_table
@ -30986,15 +31027,21 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"nehalem", M_INTEL_COREI7_NEHALEM},
{"westmere", M_INTEL_COREI7_WESTMERE},
{"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
{"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
{"haswell", M_INTEL_COREI7_HASWELL},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"amdfam10h", M_AMDFAM10H},
{"barcelona", M_AMDFAM10H_BARCELONA},
{"shanghai", M_AMDFAM10H_SHANGHAI},
{"istanbul", M_AMDFAM10H_ISTANBUL},
{"bobcat", M_AMD_BOBCAT},
{"amdfam15h", M_AMDFAM15H},
{"bdver1", M_AMDFAM15H_BDVER1},
{"bdver2", M_AMDFAM15H_BDVER2},
{"bdver3", M_AMDFAM15H_BDVER3},
{"bdver4", M_AMDFAM15H_BDVER4},
{"jaguar", M_AMD_JAGUAR},
};
static struct _isa_names_table
@ -31011,9 +31058,13 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"sse2", F_SSE2},
{"sse3", F_SSE3},
{"ssse3", F_SSSE3},
{"sse4a", F_SSE4_A},
{"sse4.1", F_SSE4_1},
{"sse4.2", F_SSE4_2},
{"avx", F_AVX},
{"fma4", F_FMA4},
{"xop", F_XOP},
{"fma", F_FMA},
{"avx2", F_AVX2}
};

View File

@ -1,3 +1,13 @@
2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org>
PR target/59422
* gcc.target/i386/funcspec-5.c (test_fma, test_xop, test_no_fma,
test_no_xop, test_arch_corei7, test_arch_corei7_avx,
test_arch_core_avx2, test_arch_bdver1, test_arch_bdver2,
test_arch_bdver3, test_tune_corei7, test_tune_corei7_avx,
test_tune_core_avx2, test_tune_bdver1, test_tune_bdver2 and
test_tune_bdver3): New function prototypes.
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* gcc.target/arm/fixed_float_conversion.c: New test case.

View File

@ -17,7 +17,9 @@ extern void test_sse4 (void) __attribute__((__target__("sse4")));
extern void test_sse4_1 (void) __attribute__((__target__("sse4.1")));
extern void test_sse4_2 (void) __attribute__((__target__("sse4.2")));
extern void test_sse4a (void) __attribute__((__target__("sse4a")));
extern void test_fma (void) __attribute__((__target__("fma")));
extern void test_fma4 (void) __attribute__((__target__("fma4")));
extern void test_xop (void) __attribute__((__target__("xop")));
extern void test_ssse3 (void) __attribute__((__target__("ssse3")));
extern void test_tbm (void) __attribute__((__target__("tbm")));
extern void test_avx (void) __attribute__((__target__("avx")));
@ -37,7 +39,9 @@ extern void test_no_sse4 (void) __attribute__((__target__("no-sse4")));
extern void test_no_sse4_1 (void) __attribute__((__target__("no-sse4.1")));
extern void test_no_sse4_2 (void) __attribute__((__target__("no-sse4.2")));
extern void test_no_sse4a (void) __attribute__((__target__("no-sse4a")));
extern void test_no_fma (void) __attribute__((__target__("no-fma")));
extern void test_no_fma4 (void) __attribute__((__target__("no-fma4")));
extern void test_no_xop (void) __attribute__((__target__("no-xop")));
extern void test_no_ssse3 (void) __attribute__((__target__("no-ssse3")));
extern void test_no_tbm (void) __attribute__((__target__("no-tbm")));
extern void test_no_avx (void) __attribute__((__target__("no-avx")));
@ -63,6 +67,9 @@ extern void test_arch_pentium4m (void) __attribute__((__target__("arch=pentium4
extern void test_arch_prescott (void) __attribute__((__target__("arch=prescott")));
extern void test_arch_nocona (void) __attribute__((__target__("arch=nocona")));
extern void test_arch_core2 (void) __attribute__((__target__("arch=core2")));
extern void test_arch_corei7 (void) __attribute__((__target__("arch=corei7")));
extern void test_arch_corei7_avx (void) __attribute__((__target__("arch=corei7-avx")));
extern void test_arch_core_avx2 (void) __attribute__((__target__("arch=core-avx2")));
extern void test_arch_geode (void) __attribute__((__target__("arch=geode")));
extern void test_arch_k6 (void) __attribute__((__target__("arch=k6")));
extern void test_arch_k6_2 (void) __attribute__((__target__("arch=k6-2")));
@ -81,6 +88,9 @@ extern void test_arch_athlon64_sse3 (void) __attribute__((__target__("arch=athlo
extern void test_arch_athlon_fx (void) __attribute__((__target__("arch=athlon-fx")));
extern void test_arch_amdfam10 (void) __attribute__((__target__("arch=amdfam10")));
extern void test_arch_barcelona (void) __attribute__((__target__("arch=barcelona")));
extern void test_arch_bdver1 (void) __attribute__((__target__("arch=bdver1")));
extern void test_arch_bdver2 (void) __attribute__((__target__("arch=bdver2")));
extern void test_arch_bdver3 (void) __attribute__((__target__("arch=bdver3")));
extern void test_arch_foo (void) __attribute__((__target__("arch=foo"))); /* { dg-error "bad value" } */
extern void test_tune_i386 (void) __attribute__((__target__("tune=i386")));
@ -103,6 +113,9 @@ extern void test_tune_pentium4m (void) __attribute__((__target__("tune=pentium4
extern void test_tune_prescott (void) __attribute__((__target__("tune=prescott")));
extern void test_tune_nocona (void) __attribute__((__target__("tune=nocona")));
extern void test_tune_core2 (void) __attribute__((__target__("tune=core2")));
extern void test_tune_corei7 (void) __attribute__((__target__("tune=corei7")));
extern void test_tune_corei7_avx (void) __attribute__((__target__("tune=corei7-avx")));
extern void test_tune_core_avx2 (void) __attribute__((__target__("tune=core-avx2")));
extern void test_tune_geode (void) __attribute__((__target__("tune=geode")));
extern void test_tune_k6 (void) __attribute__((__target__("tune=k6")));
extern void test_tune_k6_2 (void) __attribute__((__target__("tune=k6-2")));
@ -121,6 +134,9 @@ extern void test_tune_athlon64_sse3 (void) __attribute__((__target__("tune=athlo
extern void test_tune_athlon_fx (void) __attribute__((__target__("tune=athlon-fx")));
extern void test_tune_amdfam10 (void) __attribute__((__target__("tune=amdfam10")));
extern void test_tune_barcelona (void) __attribute__((__target__("tune=barcelona")));
extern void test_tune_bdver1 (void) __attribute__((__target__("tune=bdver1")));
extern void test_tune_bdver2 (void) __attribute__((__target__("tune=bdver2")));
extern void test_tune_bdver3 (void) __attribute__((__target__("tune=bdver3")));
extern void test_tune_generic (void) __attribute__((__target__("tune=generic")));
extern void test_tune_foo (void) __attribute__((__target__("tune=foo"))); /* { dg-error "bad value" } */

View File

@ -1,3 +1,19 @@
2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org>
H.J. Lu <hongjiu.lu@intel.com>
PR target/59422
* config/i386/cpuinfo.c (enum processor_types): Add AMD_BOBCAT
and AMD_JAGUAR.
(enum processor_subtypes): Add AMDFAM15H_BDVER3, AMDFAM15H_BDVER4,
INTEL_COREI7_IVYBRIDGE and INTEL_COREI7_HASWELL.
(enum processor_features): Add FEATURE_SSE4_A, FEATURE_FMA4,
FEATURE_XOP and FEATURE_FMA.
(get_amd_cpu): Handle AMD_BOBCAT, AMD_JAGUAR, AMDFAM15H_BDVER2 and
AMDFAM15H_BDVER3.
(get_intel_cpu): Handle INTEL_COREI7 and INTEL_COREI7_HASWELL.
(get_available_features): Handle FEATURE_FMA, FEATURE_SSE4_A,
FEATURE_FMA4 and FEATURE_XOP.
2013-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/cpuinfo.c (processor_subtypes): Replace INTEL_ATOM,

View File

@ -62,6 +62,8 @@ enum processor_types
AMDFAM10H,
AMDFAM15H,
INTEL_SILVERMONT,
AMD_BOBCAT,
AMD_JAGUAR,
CPU_TYPE_MAX
};
@ -75,6 +77,10 @@ enum processor_subtypes
AMDFAM10H_ISTANBUL,
AMDFAM15H_BDVER1,
AMDFAM15H_BDVER2,
AMDFAM15H_BDVER3,
AMDFAM15H_BDVER4,
INTEL_COREI7_IVYBRIDGE,
INTEL_COREI7_HASWELL,
CPU_SUBTYPE_MAX
};
@ -92,7 +98,11 @@ enum processor_features
FEATURE_SSE4_1,
FEATURE_SSE4_2,
FEATURE_AVX,
FEATURE_AVX2
FEATURE_AVX2,
FEATURE_SSE4_A,
FEATURE_FMA4,
FEATURE_XOP,
FEATURE_FMA
};
struct __processor_model
@ -113,36 +123,45 @@ get_amd_cpu (unsigned int family, unsigned int model)
{
/* AMD Family 10h. */
case 0x10:
__cpu_model.__cpu_type = AMDFAM10H;
switch (model)
{
case 0x2:
/* Barcelona. */
__cpu_model.__cpu_type = AMDFAM10H;
__cpu_model.__cpu_subtype = AMDFAM10H_BARCELONA;
break;
case 0x4:
/* Shanghai. */
__cpu_model.__cpu_type = AMDFAM10H;
__cpu_model.__cpu_subtype = AMDFAM10H_SHANGHAI;
break;
case 0x8:
/* Istanbul. */
__cpu_model.__cpu_type = AMDFAM10H;
__cpu_model.__cpu_subtype = AMDFAM10H_ISTANBUL;
break;
default:
break;
}
break;
/* AMD Family 15h. */
/* AMD Family 14h "Bobcat". */
case 0x14:
__cpu_model.__cpu_type = AMD_BOBCAT;
break;
/* AMD Family 15h "Bulldozer". */
case 0x15:
__cpu_model.__cpu_type = AMDFAM15H;
/* Bulldozer version 1. */
if ( model <= 0xf)
__cpu_model.__cpu_subtype = AMDFAM15H_BDVER1;
/* Bulldozer version 2. */
if (model >= 0x10 && model <= 0x1f)
__cpu_model.__cpu_subtype = AMDFAM15H_BDVER2;
/* Bulldozer version 2 "Piledriver" */
if (model >= 0x10 && model <= 0x2f)
__cpu_model.__cpu_subtype = AMDFAM15H_BDVER2;
/* Bulldozer version 3 "Steamroller" */
if (model >= 0x30 && model <= 0x4f)
__cpu_model.__cpu_subtype = AMDFAM15H_BDVER3;
break;
/* AMD Family 16h "Jaguar". */
case 0x16:
__cpu_model.__cpu_type = AMD_JAGUAR;
break;
default:
break;
@ -196,6 +215,20 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_SANDYBRIDGE;
break;
case 0x3a:
case 0x3e:
/* Ivy Bridge. */
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_IVYBRIDGE;
break;
case 0x3c:
case 0x3f:
case 0x45:
case 0x46:
/* Haswell. */
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_HASWELL;
break;
case 0x17:
case 0x1d:
/* Penryn. */
@ -242,6 +275,8 @@ get_available_features (unsigned int ecx, unsigned int edx,
features |= (1 << FEATURE_SSE4_2);
if (ecx & bit_AVX)
features |= (1 << FEATURE_AVX);
if (ecx & bit_FMA)
features |= (1 << FEATURE_FMA);
/* Get Advanced Features at level 7 (eax = 7, ecx = 0). */
if (max_cpuid_level >= 7)
@ -252,6 +287,23 @@ get_available_features (unsigned int ecx, unsigned int edx,
features |= (1 << FEATURE_AVX2);
}
unsigned int ext_level;
unsigned int eax, ebx;
/* Check cpuid level of extended features. */
__cpuid (0x80000000, ext_level, ebx, ecx, edx);
if (ext_level > 0x80000000)
{
__cpuid (0x80000001, eax, ebx, ecx, edx);
if (ecx & bit_SSE4a)
features |= (1 << FEATURE_SSE4_A);
if (ecx & bit_FMA4)
features |= (1 << FEATURE_FMA4);
if (ecx & bit_XOP)
features |= (1 << FEATURE_XOP);
}
__cpu_model.__cpu_features[0] = features;
}

View File

@ -147,7 +147,7 @@ func TestSelfConnect(t *testing.T) {
n = 100
}
for i := 0; i < n; i++ {
c, err := Dial("tcp", addr)
c, err := DialTimeout("tcp", addr, time.Millisecond)
if err == nil {
c.Close()
t.Errorf("#%d: Dial %q succeeded", i, addr)