RISC-V: Fix problems with ilp32e ABI support.

gcc/
	PR target/87391
	* config/riscv/riscv.h (STACK_BOUNDARY): Test riscv_abi == ABI_ILP32E
	not TARGET_RVE.
	(ABI_STACK_BOUNDARY, MAX_ARGS_IN_REGISTERS): Likewise.

From-SVN: r264555
This commit is contained in:
Jim Wilson 2018-09-25 01:27:06 +00:00 committed by Jim Wilson
parent 0276f2c271
commit 75902396e6
2 changed files with 11 additions and 3 deletions

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@ -1,3 +1,10 @@
2018-09-24 Jim Wilson <jimw@sifive.com>
PR target/87391
* config/riscv/riscv.h (STACK_BOUNDARY): Test riscv_abi == ABI_ILP32E
not TARGET_RVE.
(ABI_STACK_BOUNDARY, MAX_ARGS_IN_REGISTERS): Likewise.
2018-09-24 Andrew Pinski <apinski@marvell.com>
* config/aarch64/aarch64.c (aarch_macro_fusion_pair_p): Don't

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@ -126,10 +126,11 @@ along with GCC; see the file COPYING3. If not see
#define FUNCTION_BOUNDARY (TARGET_RVC ? 16 : 32)
/* The smallest supported stack boundary the calling convention supports. */
#define STACK_BOUNDARY (TARGET_RVE ? BITS_PER_WORD : 2 * BITS_PER_WORD)
#define STACK_BOUNDARY \
(riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 2 * BITS_PER_WORD)
/* The ABI stack alignment. */
#define ABI_STACK_BOUNDARY (TARGET_RVE ? BITS_PER_WORD : 128)
#define ABI_STACK_BOUNDARY (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 128)
/* There is no point aligning anything to a rounder boundary than this. */
#define BIGGEST_ALIGNMENT 128
@ -492,7 +493,7 @@ enum reg_class
#define GP_RETURN GP_ARG_FIRST
#define FP_RETURN (UNITS_PER_FP_ARG == 0 ? GP_RETURN : FP_ARG_FIRST)
#define MAX_ARGS_IN_REGISTERS (TARGET_RVE ? 6 : 8)
#define MAX_ARGS_IN_REGISTERS (riscv_abi == ABI_ILP32E ? 6 : 8)
/* Symbolic macros for the first/last argument registers. */