always define HAVE_conditional_move

gcc/ChangeLog:

2015-05-20  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* genconfig.c (main): Always define HAVE_conditional_move.
	* combine.c, expmed.c, expr.c, ifcvt.c, optabs.c, optabs.h,
	toplev.c, tree-ssa-phiopt.c: Don't check if HAVE_conditional_move
	is defined.

From-SVN: r223517
This commit is contained in:
Trevor Saunders 2015-05-22 01:04:09 +00:00 committed by Trevor Saunders
parent 3f393fc679
commit 759df569f1
10 changed files with 21 additions and 27 deletions

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@ -1,3 +1,10 @@
2015-05-20 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* genconfig.c (main): Always define HAVE_conditional_move.
* combine.c, expmed.c, expr.c, ifcvt.c, optabs.c, optabs.h,
toplev.c, tree-ssa-phiopt.c: Don't check if HAVE_conditional_move
is defined.
2015-05-20 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* combine.c, df-problems.c, df-scan.c, emit-rtl.c, reginfo.c,

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@ -6818,7 +6818,7 @@ simplify_set (rtx x)
&& (GET_CODE (XEXP (src, 0)) == EQ || GET_CODE (XEXP (src, 0)) == NE)
&& XEXP (XEXP (src, 0), 1) == const0_rtx
&& GET_MODE (src) == GET_MODE (XEXP (XEXP (src, 0), 0))
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
&& ! can_conditionally_move_p (GET_MODE (src))
#endif
&& (num_sign_bit_copies (XEXP (XEXP (src, 0), 0),

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@ -3797,7 +3797,7 @@ expand_sdiv_pow2 (machine_mode mode, rtx op0, HOST_WIDE_INT d)
return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0);
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
if (BRANCH_COST (optimize_insn_for_speed_p (), false)
>= 2)
{
@ -5555,7 +5555,7 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1,
target_mode);
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Try using a setcc instruction for ORDERED/UNORDERED, followed by a
conditional move. */
tem = emit_store_flag_1 (subtarget, first_code, op0, op1, mode, 0,

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@ -2423,7 +2423,7 @@ get_def_for_expr (tree name, enum tree_code code)
return def_stmt;
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Return the defining gimple statement for SSA_NAME NAME if it is an
assigment and the class of the expresion on the RHS is CLASS. Return
NULL otherwise. */
@ -7517,7 +7517,7 @@ highest_pow2_factor_for_target (const_tree target, const_tree exp)
return MAX (factor, talign);
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Convert the tree comparison code TCODE to the rtl one where the
signedness is UNSIGNEDP. */
@ -8021,7 +8021,7 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
tree treeop1 ATTRIBUTE_UNUSED,
tree treeop2 ATTRIBUTE_UNUSED)
{
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
rtx insn;
rtx op00, op01, op1, op2;
enum rtx_code comparison_code;
@ -8892,7 +8892,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
if (code == MIN_EXPR)
comparison_code = LT;
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Use a conditional move if possible. */
if (can_conditionally_move_p (mode))
{

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@ -352,6 +352,8 @@ main (int argc, char **argv)
if (have_cmove_flag)
printf ("#define HAVE_conditional_move 1\n");
else
printf ("#define HAVE_conditional_move 0\n");
if (have_cond_exec_flag)
printf ("#define HAVE_conditional_execution 1\n");

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@ -72,9 +72,6 @@
#include "shrink-wrap.h"
#include "ifcvt.h"
#ifndef HAVE_conditional_move
#define HAVE_conditional_move 0
#endif
#ifndef HAVE_incscc
#define HAVE_incscc 0
#endif
@ -1505,7 +1502,6 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code,
return NULL_RTX;
}
#if HAVE_conditional_move
unsignedp = (code == LTU || code == GEU
|| code == LEU || code == GTU);
@ -1562,13 +1558,6 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code,
}
else
return NULL_RTX;
#else
/* We'll never get here, as noce_process_if_block doesn't call the
functions involved. Ifdef code, however, should be discouraged
because it leads to typos in the code not selected. However,
emit_conditional_move won't exist either. */
return NULL_RTX;
#endif
}
/* Try only simple constants and registers here. More complex cases

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@ -929,7 +929,7 @@ expand_subword_shift (machine_mode op1_mode, optab binoptab,
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Try implementing expand_doubleword_shift using conditional moves.
The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
@ -1096,7 +1096,7 @@ expand_doubleword_shift (machine_mode op1_mode, optab binoptab,
unsignedp, methods, shift_mask);
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Try using conditional moves to generate straight-line code. */
{
rtx_insn *start = get_last_insn ();
@ -4518,7 +4518,7 @@ emit_indirect_jump (rtx loc ATTRIBUTE_UNUSED)
#endif
}
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Emit a conditional move instruction if the machine supports one for that
condition and machine mode.

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@ -364,7 +364,7 @@ extern void emit_indirect_jump (rtx);
#error "insn-config.h must be included before optabs.h"
#endif
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
/* Emit a conditional move operation. */
rtx emit_conditional_move (rtx, enum rtx_code, rtx, rtx, machine_mode,
rtx, rtx, machine_mode, int);

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@ -1576,7 +1576,7 @@ process_options (void)
warning (0, "var-tracking-assignments changes selective scheduling");
if (flag_tree_cselim == AUTODETECT_VALUE)
#ifdef HAVE_conditional_move
#if HAVE_conditional_move
flag_tree_cselim = 1;
#else
flag_tree_cselim = 0;

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@ -83,10 +83,6 @@ along with GCC; see the file COPYING3. If not see
#include "tree-scalar-evolution.h"
#include "tree-inline.h"
#ifndef HAVE_conditional_move
#define HAVE_conditional_move (0)
#endif
static unsigned int tree_ssa_phiopt_worker (bool, bool);
static bool conditional_replacement (basic_block, basic_block,
edge, edge, gphi *, tree, tree);