fold-vec-neg-char.c: New.

[testsuite]

2017-10-27  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-neg-char.c: New.
	* gcc.target/powerpc/fold-vec-neg-floatdouble.c: New.
	* gcc.target/powerpc/fold-vec-neg-int.c: New.
	* gcc.target/powerpc/fold-vec-neg-longlong.c: New.
	* gcc.target/powerpc/fold-vec-neg-short.c: New.

From-SVN: r254164
This commit is contained in:
Will Schmidt 2017-10-27 17:52:55 +00:00 committed by Will Schmidt
parent 730de5a59e
commit 759ebd17e3
6 changed files with 104 additions and 0 deletions

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@ -1,3 +1,11 @@
2017-10-27 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-neg-char.c: New.
* gcc.target/powerpc/fold-vec-neg-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-neg-int.c: New.
* gcc.target/powerpc/fold-vec-neg-longlong.c: New.
* gcc.target/powerpc/fold-vec-neg-short.c: New.
2017-10-27 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/56342

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/* Verify that overloaded built-ins for vec_neg with char
inputs produce the right code. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -O2" } */
#include <altivec.h>
vector signed char
test2 (vector signed char x)
{
return vec_neg (x);
}
/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */
/* { dg-final { scan-assembler-times "vsububm" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsb" 0 } } */

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/* Verify that overloaded built-ins for vec_neg with float and
double inputs for VSX produce the right code. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-mvsx -O2" } */
#include <altivec.h>
vector float
test1 (vector float x)
{
return vec_neg (x);
}
vector double
test2 (vector double x)
{
return vec_neg (x);
}
/* { dg-final { scan-assembler-times "xvnegsp" 1 } } */
/* { dg-final { scan-assembler-times "xvnegdp" 1 } } */

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/* Verify that overloaded built-ins for vec_neg with int
inputs produce the right code. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -O2" } */
#include <altivec.h>
vector signed int
test1 (vector signed int x)
{
return vec_neg (x);
}
/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */
/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsw" 0 } } */

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/* Verify that overloaded built-ins for vec_neg with long long
inputs produce the right code. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-options "-mpower8-vector -O2" } */
#include <altivec.h>
vector signed long long
test3 (vector signed long long x)
{
return vec_neg (x);
}
/* { dg-final { scan-assembler-times "xxspltib|vspltisw" 1 } } */
/* { dg-final { scan-assembler-times "vsubudm" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsd" 0 } } */

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/* Verify that overloaded built-ins for vec_neg with short
inputs produce the right code. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -O2" } */
#include <altivec.h>
vector signed short
test3 (vector signed short x)
{
return vec_neg (x);
}
/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */
/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsh" 0 } } */