rs6000.c (insn_is_swappable_p): Don't provide special handling for stores whose SET_SRC is an UNSPEC (such as...

[gcc]

2014-09-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (insn_is_swappable_p): Don't provide
	special handling for stores whose SET_SRC is an UNSPEC (such as
	UNSPEC_STVE).


[gcc/testsuite]

2014-09-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/swaps-p8-17.c: New test.

From-SVN: r215564
This commit is contained in:
Bill Schmidt 2014-09-24 18:35:33 +00:00 committed by William Schmidt
parent 2b63a3acfa
commit 7606cbaeff
4 changed files with 29 additions and 4 deletions

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@ -1,3 +1,9 @@
2014-09-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (insn_is_swappable_p): Don't provide
special handling for stores whose SET_SRC is an UNSPEC (such as
UNSPEC_STVE).
2014-09-24 Jiong Wang <jiong.wang@arm.com>
* shrink-wrap.c (move_insn_for_shrink_wrap): Add further check when

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@ -33793,9 +33793,10 @@ insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn,
return 0;
/* Loads and stores seen here are not permuting, but we can still
fix them up by converting them to permuting ones. Exception:
UNSPEC_LVX and UNSPEC_STVX, which have a PARALLEL body instead
of a SET. */
fix them up by converting them to permuting ones. Exceptions:
UNSPEC_LVE, UNSPEC_LVX, and UNSPEC_STVX, which have a PARALLEL
body instead of a SET; and UNSPEC_STVE, which has an UNSPEC
for the SET source. */
rtx body = PATTERN (insn);
int i = INSN_UID (insn);
@ -33812,7 +33813,7 @@ insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn,
if (insn_entry[i].is_store)
{
if (GET_CODE (body) == SET)
if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) != UNSPEC)
{
*special = SH_NOSWAP_ST;
return 1;

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@ -1,3 +1,7 @@
2014-09-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/swaps-p8-17.c: New test.
2014-09-24 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/shrink_wrap_symbol_ref_1.c: New testcase.

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@ -0,0 +1,14 @@
/* { dg-do compile { target { powerpc64le-*-* } } } */
/* { dg-options "-mcpu=power8 -O1" } */
/* { dg-final { scan-assembler "lxvd2x" } } */
/* { dg-final { scan-assembler "xxpermdi" } } */
/* Verify that we don't try to do permute removal in the presence of
vec_ste. This used to ICE. */
#include <altivec.h>
void f (void *p)
{
vector unsigned int u32 = vec_vsx_ld (1, (const unsigned int *)p);
vec_ste (u32, 1, (unsigned int *)p);
}