re PR rtl-optimization/79901 (ICE in prepare_cmp_insn, at optabs.c:3904)
PR rtl-optimization/79901 * config/i386/sse.md (*avx512bw_<code><mode>3<mask_name>): Renamed to ... (*avx512f_<code><mode>3<mask_name>): ... this. (<code><mode>3 with maxmin code iterator): Use VI8_AVX2_AVX512F iterator instead of VI8_AVX2_AVX512BW. * gcc.target/i386/pr79901.c: New test. From-SVN: r245947
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2017-03-07 Jakub Jelinek <jakub@redhat.com>
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2017-03-07 Jakub Jelinek <jakub@redhat.com>
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PR rtl-optimization/79901
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* config/i386/sse.md (*avx512bw_<code><mode>3<mask_name>): Renamed to
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...
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(*avx512f_<code><mode>3<mask_name>): ... this.
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(<code><mode>3 with maxmin code iterator): Use VI8_AVX2_AVX512F
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iterator instead of VI8_AVX2_AVX512BW.
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PR rtl-optimization/79901
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PR rtl-optimization/79901
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* expr.c (expand_expr_real_2): For vector MIN/MAX, if there is no
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* expr.c (expand_expr_real_2): For vector MIN/MAX, if there is no
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min/max expander, expand it using expand_vec_cond_expr.
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min/max expander, expand it using expand_vec_cond_expr.
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@ -10841,7 +10841,7 @@
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"TARGET_AVX512F"
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"TARGET_AVX512F"
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"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
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"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
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(define_insn "*avx512bw_<code><mode>3<mask_name>"
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(define_insn "*avx512f_<code><mode>3<mask_name>"
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[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
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[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
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(maxmin:VI48_AVX512VL
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(maxmin:VI48_AVX512VL
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(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v")
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(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v")
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@ -10865,10 +10865,10 @@
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(set_attr "mode" "<sseinsnmode>")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_expand "<code><mode>3"
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(define_expand "<code><mode>3"
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[(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand")
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[(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand")
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(maxmin:VI8_AVX2_AVX512BW
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(maxmin:VI8_AVX2_AVX512F
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(match_operand:VI8_AVX2_AVX512BW 1 "register_operand")
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(match_operand:VI8_AVX2_AVX512F 1 "register_operand")
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(match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))]
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(match_operand:VI8_AVX2_AVX512F 2 "register_operand")))]
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"TARGET_SSE4_2"
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"TARGET_SSE4_2"
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{
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{
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if (TARGET_AVX512F
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if (TARGET_AVX512F
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@ -1,5 +1,8 @@
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2017-03-07 Jakub Jelinek <jakub@redhat.com>
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2017-03-07 Jakub Jelinek <jakub@redhat.com>
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PR rtl-optimization/79901
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* gcc.target/i386/pr79901.c: New test.
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PR sanitizer/79897
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PR sanitizer/79897
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* c-c++-common/ubsan/pr79897.c: New test.
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* c-c++-common/ubsan/pr79897.c: New test.
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@ -0,0 +1,22 @@
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/* PR rtl-optimization/79901 */
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/* { dg-do compile } */
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/* { dg-options "-O3 -mavx512f -fno-ssa-phiopt" } */
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unsigned int
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foo (const unsigned long long x)
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{
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if (x < 0)
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return 0;
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else if ( x > ~0U)
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return ~0U;
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else
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return (unsigned int) x;
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}
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void
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bar (unsigned x, unsigned int *y, unsigned int z)
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{
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unsigned i;
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for (i = 0; i < x; i++)
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y[i] = foo (y[i] * (unsigned long long) z);
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}
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