rs6000-c (altivec_overloaded_builtins): Add support for built-in functions vector signed char vec_nabs (vector signed...
gcc/ChangeLog: 2017-01-16 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000-c (altivec_overloaded_builtins): Add support for built-in functions vector signed char vec_nabs (vector signed char) vector signed short vec_nabs (vector signed short) vector signed int vec_nabs (vector signed int) vector signed long long vec_nabs (vector signed long long) vector float vec_nabs (vector float) vector double vec_nabs (vector double) * config/rs6000/rs6000-builtin.def: Add definitions for NABS functions and NABS overload. * config/rs6000/altivec.md: New define_expand nabs<mode>2 types * config/rs6000/altivec.h: New define for vec_nabs built-in function. * doc/extend.texi: Update the documentation file for the new built-in functions. gcc/testsuite/ChangeLog: 2017-01-16 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/builtins-3.c: New vec_nabs testcase. * gcc.target/powerpc/builtins-3-p8.c: New vec_nabs testcase. From-SVN: r244501
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Carl Love
Carl Love
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1a41367709
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@ -1,3 +1,20 @@
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2017-01-16 Carl Love <cel@us.ibm.com>
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* config/rs6000/rs6000-c (altivec_overloaded_builtins): Add support
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for built-in functions
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vector signed char vec_nabs (vector signed char)
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vector signed short vec_nabs (vector signed short)
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vector signed int vec_nabs (vector signed int)
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vector signed long long vec_nabs (vector signed long long)
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vector float vec_nabs (vector float)
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vector double vec_nabs (vector double)
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* config/rs6000/rs6000-builtin.def: Add definitions for NABS functions
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and NABS overload.
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* config/rs6000/altivec.md: New define_expand nabs<mode>2 types
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* config/rs6000/altivec.h: New define for vec_nabs built-in function.
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* doc/extend.texi: Update the documentation file for the new built-in
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functions.
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2017-01-16 Martin Sebor <msebor@redhat.com>
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* gimple-ssa-sprintf.c (format_directive): Correct a typo in a warning
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@ -189,6 +189,7 @@
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#define vec_vupklsh __builtin_vec_vupklsh
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#define vec_vupklsb __builtin_vec_vupklsb
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#define vec_abs __builtin_vec_abs
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#define vec_nabs __builtin_vec_nabs
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#define vec_abss __builtin_vec_abss
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#define vec_add __builtin_vec_add
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#define vec_adds __builtin_vec_adds
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@ -2740,6 +2740,33 @@
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operands[4] = gen_reg_rtx (<MODE>mode);
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})
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;; Generate
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;; vspltisw SCRATCH1,0
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;; vsubu?m SCRATCH2,SCRATCH1,%1
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;; vmins? %0,%1,SCRATCH2"
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(define_expand "nabs<mode>2"
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[(set (match_dup 2) (match_dup 3))
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(set (match_dup 4)
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(minus:VI2 (match_dup 2)
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(match_operand:VI2 1 "register_operand" "v")))
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(set (match_operand:VI2 0 "register_operand" "=v")
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(smin:VI2 (match_dup 1) (match_dup 4)))]
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"<VI_unit>"
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{
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int i;
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int n_elt = GET_MODE_NUNITS (<MODE>mode);
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rtvec v = rtvec_alloc (n_elt);
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/* Create an all 0 constant. */
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for (i = 0; i < n_elt; ++i)
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RTVEC_ELT (v, i) = const0_rtx;
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operands[2] = gen_reg_rtx (<MODE>mode);
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operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, v);
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operands[4] = gen_reg_rtx (<MODE>mode);
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})
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;; Generate
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;; vspltisw SCRATCH1,-1
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;; vslw SCRATCH2,SCRATCH1,SCRATCH1
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@ -1129,6 +1129,14 @@ BU_ALTIVEC_A (ABSS_V4SI, "abss_v4si", SAT, altivec_abss_v4si)
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BU_ALTIVEC_A (ABSS_V8HI, "abss_v8hi", SAT, altivec_abss_v8hi)
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BU_ALTIVEC_A (ABSS_V16QI, "abss_v16qi", SAT, altivec_abss_v16qi)
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/* Altivec NABS functions. */
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BU_ALTIVEC_A (NABS_V2DI, "nabs_v2di", CONST, nabsv2di2)
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BU_ALTIVEC_A (NABS_V4SI, "nabs_v4si", CONST, nabsv4si2)
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BU_ALTIVEC_A (NABS_V8HI, "nabs_v8hi", CONST, nabsv8hi2)
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BU_ALTIVEC_A (NABS_V16QI, "nabs_v16qi", CONST, nabsv16qi2)
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BU_ALTIVEC_A (NABS_V4SF, "nabs_v4sf", CONST, vsx_nabsv4sf2)
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BU_ALTIVEC_A (NABS_V2DF, "nabs_v2df", CONST, vsx_nabsv2df2)
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/* 1 argument Altivec builtin functions. */
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BU_ALTIVEC_1 (VEXPTEFP, "vexptefp", FP, altivec_vexptefp)
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BU_ALTIVEC_1 (VLOGEFP, "vlogefp", FP, altivec_vlogefp)
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@ -1408,6 +1416,7 @@ BU_ALTIVEC_OVERLOAD_2 (XOR, "xor")
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/* 1 argument Altivec overloaded functions. */
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BU_ALTIVEC_OVERLOAD_1 (ABS, "abs")
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BU_ALTIVEC_OVERLOAD_1 (NABS, "nabs")
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BU_ALTIVEC_OVERLOAD_1 (ABSS, "abss")
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BU_ALTIVEC_OVERLOAD_1 (CEIL, "ceil")
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BU_ALTIVEC_OVERLOAD_1 (EXPTE, "expte")
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@ -1992,6 +1992,18 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB,
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RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V16QI,
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RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V8HI,
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RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SI,
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RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V2DI,
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RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SF,
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RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NABS, VSX_BUILTIN_XVNABSDP,
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RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI,
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RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI,
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@ -16304,6 +16304,12 @@ vector unsigned short vec_vmuloub (vector unsigned char,
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vector float vec_nmsub (vector float, vector float, vector float);
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vector signed char vec_nabs (vector signed char);
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vector signed short vec_nabs (vector signed short);
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vector signed int vec_nabs (vector signed int);
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vector float vec_nabs (vector float);
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vector double vec_nabs (vector double);
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vector float vec_nor (vector float, vector float);
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vector signed int vec_nor (vector signed int, vector signed int);
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vector unsigned int vec_nor (vector unsigned int, vector unsigned int);
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@ -17710,6 +17716,8 @@ vector long long vec_min (vector long long, vector long long);
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vector unsigned long long vec_min (vector unsigned long long,
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vector unsigned long long);
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vector signed long long vec_nabs (vector signed long long);
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vector long long vec_nand (vector long long, vector long long);
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vector long long vec_nand (vector bool long long, vector long long);
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vector long long vec_nand (vector long long, vector bool long long);
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@ -1,3 +1,8 @@
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2017-01-16 Carl Love <cel@us.ibm.com>
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* gcc.target/powerpc/builtins-3.c: New vec_nabs testcase.
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* gcc.target/powerpc/builtins-3-p8.c: New vec_nabs testcase.
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2017-01-16 Carl Love <cel@us.ibm.com>
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* gcc.target/powerpc/builtins-3-p9.c (test_ne_long()):
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@ -16,10 +16,20 @@ test_pack_float (vector double x, vector double y)
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return vec_pack (x, y);
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}
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vector long long
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test_nabs_long_long (vector long long x)
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{
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return vec_nabs (x);
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}
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/* Expected test results:
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test_eq_long_long 1 vcmpequd inst
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test_pack_float 1 vpkudum inst */
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test_pack_float 1 vpkudum inst
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test_nabs_long_long 1 vspltisw, 1 vsubudm, 1 vminsd */
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/* { dg-final { scan-assembler-times "vcmpequd" 1 } } */
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/* { dg-final { scan-assembler-times "vpkudum" 1 } } */
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/* { dg-final { scan-assembler-times "vspltisw" 1 } } */
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/* { dg-final { scan-assembler-times "vsubudm" 1 } } */
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/* { dg-final { scan-assembler-times "vminsd" 1 } } */
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@ -28,14 +28,59 @@ test_shift_left_double (vector double x, vector double y)
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return vec_sld (x, y, /* shift_by */ 10);
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}
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vector signed char
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test_nabs_char (vector signed char x)
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{
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return vec_nabs (x);
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}
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vector short
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test_nabs_short (vector short x)
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{
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return vec_nabs (x);
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}
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vector int
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test_nabs_int (vector int x)
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{
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return vec_nabs (x);
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}
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vector float
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test_nabs_float (vector float x)
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{
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return vec_nabs (x);
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}
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vector double
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test_nabs_double (vector double x)
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{
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return vec_nabs (x);
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}
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/* Expected test results:
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test_eq_char 1 vcmpequb inst
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test_eq_short 1 vcmpequh inst
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test_eq_int 1 vcmpequw inst
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test_shift_left_double 1 vsldoi inst */
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test_shift_left_double 1 vsldoi inst
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test_nabs_char 1 vspltisw, 1 vsububm, 1 vminsb
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test_nabs_short 1 vspltisw, 1 vsubuhm, 1 vminsh
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test_nabs_int 1 vspltisw, 1 vsubuwm, 1 vminsw
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test_nabs_float 1 xvnabssp
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test_nabs_double 1 xvnabsdp */
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/* { dg-final { scan-assembler-times "vcmpequb" 1 } } */
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/* { dg-final { scan-assembler-times "vcmpequh" 1 } } */
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/* { dg-final { scan-assembler-times "vcmpequw" 1 } } */
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/* { dg-final { scan-assembler-times "vsldoi" 1 } } */
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/* { dg-final { scan-assembler-times "vsububm" 1 } } */
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/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */
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/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
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/* { dg-final { scan-assembler-times "vminsb" 1 } } */
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/* { dg-final { scan-assembler-times "vminsh" 1 } } */
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/* { dg-final { scan-assembler-times "vminsw" 1 } } */
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/* { dg-final { scan-assembler-times "vspltisw" 3 } } */
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/* { dg-final { scan-assembler-times "xvnabssp" 1 } } */
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/* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */
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