re PR middle-end/78416 (wrong code for division by (u128)~INT64_MAX at -O0)
PR middle-end/78416 * expmed.c (expand_divmod): Use wide_int for computation of op1_is_pow2. Don't set it if op1 is 0. Formatting fixes. Use size <= HOST_BITS_PER_WIDE_INT instead of HOST_BITS_PER_WIDE_INT >= size. * gcc.dg/torture/pr78416.c: New test. From-SVN: r242690
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
9b28cb6f0a
commit
76a7314dc9
@ -1,5 +1,11 @@
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2016-11-22 Jakub Jelinek <jakub@redhat.com>
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PR middle-end/78416
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* expmed.c (expand_divmod): Use wide_int for computation of
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op1_is_pow2. Don't set it if op1 is 0. Formatting fixes.
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Use size <= HOST_BITS_PER_WIDE_INT instead of
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HOST_BITS_PER_WIDE_INT >= size.
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PR tree-optimization/78445
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* tree-if-conv.c (tree_if_conversion): If any_pred_load_store or
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any_complicated_phi, version loop even if flag_tree_loop_if_convert is
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54
gcc/expmed.c
54
gcc/expmed.c
@ -3994,11 +3994,10 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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op1_is_constant = CONST_INT_P (op1);
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if (op1_is_constant)
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{
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unsigned HOST_WIDE_INT ext_op1 = UINTVAL (op1);
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if (unsignedp)
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ext_op1 &= GET_MODE_MASK (mode);
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op1_is_pow2 = ((EXACT_POWER_OF_2_OR_ZERO_P (ext_op1)
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|| (! unsignedp && EXACT_POWER_OF_2_OR_ZERO_P (-ext_op1))));
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wide_int ext_op1 = rtx_mode_t (op1, mode);
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op1_is_pow2 = (wi::popcount (ext_op1) == 1
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|| (! unsignedp
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&& wi::popcount (wi::neg (ext_op1)) == 1));
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}
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/*
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@ -4079,11 +4078,10 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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not straightforward to generalize this. Maybe we should make an array
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of possible modes in init_expmed? Save this for GCC 2.7. */
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optab1 = ((op1_is_pow2 && op1 != const0_rtx)
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optab1 = (op1_is_pow2
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? (unsignedp ? lshr_optab : ashr_optab)
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: (unsignedp ? udiv_optab : sdiv_optab));
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optab2 = ((op1_is_pow2 && op1 != const0_rtx)
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? optab1
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optab2 = (op1_is_pow2 ? optab1
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: (unsignedp ? udivmod_optab : sdivmod_optab));
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for (compute_mode = mode; compute_mode != VOIDmode;
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@ -4139,10 +4137,15 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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/* convert_modes may have placed op1 into a register, so we
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must recompute the following. */
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op1_is_constant = CONST_INT_P (op1);
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op1_is_pow2 = (op1_is_constant
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&& ((EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1))
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|| (! unsignedp
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&& EXACT_POWER_OF_2_OR_ZERO_P (-UINTVAL (op1))))));
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if (op1_is_constant)
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{
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wide_int ext_op1 = rtx_mode_t (op1, compute_mode);
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op1_is_pow2 = (wi::popcount (ext_op1) == 1
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|| (! unsignedp
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&& wi::popcount (wi::neg (ext_op1)) == 1));
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}
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else
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op1_is_pow2 = 0;
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}
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/* If one of the operands is a volatile MEM, copy it into a register. */
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@ -4182,10 +4185,10 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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unsigned HOST_WIDE_INT mh, ml;
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int pre_shift, post_shift;
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int dummy;
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unsigned HOST_WIDE_INT d = (INTVAL (op1)
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& GET_MODE_MASK (compute_mode));
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wide_int wd = rtx_mode_t (op1, compute_mode);
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unsigned HOST_WIDE_INT d = wd.to_uhwi ();
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if (EXACT_POWER_OF_2_OR_ZERO_P (d))
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if (wi::popcount (wd) == 1)
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{
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pre_shift = floor_log2 (d);
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if (rem_flag)
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@ -4325,7 +4328,7 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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else if (d == -1)
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quotient = expand_unop (compute_mode, neg_optab, op0,
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tquotient, 0);
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else if (HOST_BITS_PER_WIDE_INT >= size
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else if (size <= HOST_BITS_PER_WIDE_INT
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&& abs_d == HOST_WIDE_INT_1U << (size - 1))
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{
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/* This case is not handled correctly below. */
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@ -4335,6 +4338,7 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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goto fail1;
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}
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else if (EXACT_POWER_OF_2_OR_ZERO_P (d)
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&& (size <= HOST_BITS_PER_WIDE_INT || d >= 0)
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&& (rem_flag
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? smod_pow2_cheap (speed, compute_mode)
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: sdiv_pow2_cheap (speed, compute_mode))
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@ -4348,7 +4352,9 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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compute_mode)
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!= CODE_FOR_nothing)))
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;
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else if (EXACT_POWER_OF_2_OR_ZERO_P (abs_d))
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else if (EXACT_POWER_OF_2_OR_ZERO_P (abs_d)
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&& (size <= HOST_BITS_PER_WIDE_INT
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|| abs_d != (unsigned HOST_WIDE_INT) d))
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{
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if (rem_flag)
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{
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@ -4483,7 +4489,7 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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case FLOOR_DIV_EXPR:
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case FLOOR_MOD_EXPR:
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/* We will come here only for signed operations. */
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if (op1_is_constant && HOST_BITS_PER_WIDE_INT >= size)
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if (op1_is_constant && size <= HOST_BITS_PER_WIDE_INT)
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{
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unsigned HOST_WIDE_INT mh, ml;
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int pre_shift, lgup, post_shift;
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@ -4552,9 +4558,8 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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op0, constm1_rtx), NULL_RTX);
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t2 = expand_binop (compute_mode, ior_optab, op0, t1, NULL_RTX,
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0, OPTAB_WIDEN);
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nsign = expand_shift
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(RSHIFT_EXPR, compute_mode, t2,
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size - 1, NULL_RTX, 0);
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nsign = expand_shift (RSHIFT_EXPR, compute_mode, t2,
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size - 1, NULL_RTX, 0);
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t3 = force_operand (gen_rtx_MINUS (compute_mode, t1, nsign),
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NULL_RTX);
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t4 = expand_divmod (0, TRUNC_DIV_EXPR, compute_mode, t3, op1,
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@ -4663,7 +4668,10 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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case CEIL_MOD_EXPR:
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if (unsignedp)
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{
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if (op1_is_constant && EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1)))
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if (op1_is_constant
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&& EXACT_POWER_OF_2_OR_ZERO_P (INTVAL (op1))
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&& (size <= HOST_BITS_PER_WIDE_INT
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|| INTVAL (op1) >= 0))
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{
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rtx t1, t2, t3;
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unsigned HOST_WIDE_INT d = INTVAL (op1);
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@ -4876,7 +4884,7 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
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break;
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case EXACT_DIV_EXPR:
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if (op1_is_constant && HOST_BITS_PER_WIDE_INT >= size)
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if (op1_is_constant && size <= HOST_BITS_PER_WIDE_INT)
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{
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HOST_WIDE_INT d = INTVAL (op1);
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unsigned HOST_WIDE_INT ml;
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@ -1,5 +1,8 @@
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2016-11-22 Jakub Jelinek <jakub@redhat.com>
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PR middle-end/78416
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* gcc.dg/torture/pr78416.c: New test.
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PR tree-optimization/78445
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* gcc.dg/pr78445.c: New test.
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17
gcc/testsuite/gcc.dg/torture/pr78416.c
Normal file
17
gcc/testsuite/gcc.dg/torture/pr78416.c
Normal file
@ -0,0 +1,17 @@
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/* PR middle-end/78416 */
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/* { dg-do run { target int128 } } */
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int
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main ()
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{
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unsigned __int128 x;
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x = 0xFFFFFFFFFFFFFFFFULL;
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x /= ~0x7FFFFFFFFFFFFFFFLL;
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if (x != 0)
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__builtin_abort ();
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x = ~0x7FFFFFFFFFFFFFFELL;
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x /= ~0x7FFFFFFFFFFFFFFFLL;
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if (x != 1)
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__builtin_abort ();
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return 0;
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}
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