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Revert [ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture 

This is causing regressions when mixing with user code compiled in ARM mode.

2019-09-20  Christophe Lyon  <christophe.lyon@st.com>

	Revert:
	2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
		Mickaël Guêné <mickael.guene@st.com>

	* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
	architecture.

From-SVN: r276001
This commit is contained in:
Christophe Lyon 2019-09-20 15:32:20 +02:00 committed by Christophe Lyon
parent 264c073993
commit 76c93295f3
2 changed files with 9 additions and 5 deletions
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9
libgcc/ChangeLog
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@ -1,3 +1,12 @@
2019-09-20 Christophe Lyon <christophe.lyon@st.com>
Revert:
2019-09-10 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
architecture.
2019-09-19 Richard Henderson <richard.henderson@linaro.org>
* config/aarch64/lse-init.c: New file.

5
libgcc/config/arm/unwind-arm.c
View File

@ -199,11 +199,6 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
return _UVRSR_FAILED;
vrs->core.r[regno] = *(_uw *) valuep;
#if defined(__thumb__)
/* Force LSB bit since we always run thumb code. */
if (regno == R_PC)
vrs->core.r[regno] |= 1;
#endif
return _UVRSR_OK;
case _UVRSC_VFP: