[NDS32] Merge movqi and movhi patterns.
gcc/ * config/nds32/nds32.md (movqi, movhi): Merge into mov<mode>. From-SVN: r259071
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@ -1,3 +1,7 @@
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2018-04-04 Chung-Ju Wu <jasonwucj@gmail.com>
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* config/nds32/nds32.md (movqi, movhi): Merge into mov<mode>.
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2018-04-04 Chung-Ju Wu <jasonwucj@gmail.com>
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Kito Cheng <kito.cheng@gmail.com>
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@ -83,25 +83,24 @@
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;; For QImode and HImode, the immediate value can be fit in imm20s.
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;; So there is no need to split rtx for QI and HI patterns.
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(define_expand "movqi"
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[(set (match_operand:QI 0 "general_operand" "")
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(match_operand:QI 1 "general_operand" ""))]
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(define_expand "mov<mode>"
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[(set (match_operand:QIHI 0 "general_operand" "")
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(match_operand:QIHI 1 "general_operand" ""))]
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""
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{
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/* Need to force register if mem <- !reg. */
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if (MEM_P (operands[0]) && !REG_P (operands[1]))
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operands[1] = force_reg (QImode, operands[1]);
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operands[1] = force_reg (<MODE>mode, operands[1]);
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if (MEM_P (operands[1]) && optimize > 0)
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{
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rtx reg = gen_reg_rtx (SImode);
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emit_insn (gen_zero_extend<mode>si2 (reg, operands[1]));
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operands[1] = gen_lowpart (<MODE>mode, reg);
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}
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})
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(define_expand "movhi"
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[(set (match_operand:HI 0 "general_operand" "")
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(match_operand:HI 1 "general_operand" ""))]
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""
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{
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/* Need to force register if mem <- !reg. */
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if (MEM_P (operands[0]) && !REG_P (operands[1]))
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operands[1] = force_reg (HImode, operands[1]);
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})
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(define_expand "movsi"
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[(set (match_operand:SI 0 "general_operand" "")
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