i386-builtin-types.def (V4DF_FTYPE_V4DF_V4DF_V4DI): New.
* config/i386/i386-builtin-types.def (V4DF_FTYPE_V4DF_V4DF_V4DI): New. (V8SF_FTYPE_V8SF_V8SF_V8SI): New. * config/i386/i386.c (ix86_vectorize_builtin_vec_perm): Support V4DF and V8SF for AVX; relax constraint on V4SF to SSE1 from SSE2. (IX86_BUILTIN_VEC_PERM_V4DF, IX86_BUILTIN_VEC_PERM_V8SF): New. (bdesc_args): Add them. (ix86_expand_builtin): Expand them. (expand_vec_perm_pshufb2): Only operate on 16-byte vectors. From-SVN: r154831
This commit is contained in:
Richard Henderson
Richard Henderson
parent
1feb57517d
commit
784e5ae13a
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@ -1,3 +1,14 @@
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2009-11-30 Richard Henderson <rth@redhat.com>
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* config/i386/i386-builtin-types.def (V4DF_FTYPE_V4DF_V4DF_V4DI): New.
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(V8SF_FTYPE_V8SF_V8SF_V8SI): New.
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* config/i386/i386.c (ix86_vectorize_builtin_vec_perm): Support
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V4DF and V8SF for AVX; relax constraint on V4SF to SSE1 from SSE2.
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(IX86_BUILTIN_VEC_PERM_V4DF, IX86_BUILTIN_VEC_PERM_V8SF): New.
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(bdesc_args): Add them.
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(ix86_expand_builtin): Expand them.
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(expand_vec_perm_pshufb2): Only operate on 16-byte vectors.
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2009-11-30 Martin Jambor <mjambor@suse.cz>
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PR middle-end/42206
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@ -351,6 +351,8 @@ DEF_FUNCTION_TYPE (V2UDI, V2UDI, V2UDI, V2UDI)
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DEF_FUNCTION_TYPE (V4USI, V4USI, V4USI, V4USI)
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DEF_FUNCTION_TYPE (V8UHI, V8UHI, V8UHI, V8UHI)
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DEF_FUNCTION_TYPE (V16UQI, V16UQI, V16UQI, V16UQI)
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DEF_FUNCTION_TYPE (V4DF, V4DF, V4DF, V4DI)
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DEF_FUNCTION_TYPE (V8SF, V8SF, V8SF, V8SI)
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DEF_FUNCTION_TYPE (V2DI, V2DI, V2DI, UINT, UINT)
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DEF_FUNCTION_TYPE (V4HI, HI, HI, HI, HI)
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@ -21047,6 +21047,8 @@ enum ix86_builtins
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IX86_BUILTIN_VEC_PERM_V4SI_U,
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IX86_BUILTIN_VEC_PERM_V8HI_U,
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IX86_BUILTIN_VEC_PERM_V16QI_U,
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IX86_BUILTIN_VEC_PERM_V4DF,
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IX86_BUILTIN_VEC_PERM_V8SF,
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/* FMA4 and XOP instructions. */
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IX86_BUILTIN_VFMADDSS,
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@ -21722,7 +21724,7 @@ static const struct builtin_description bdesc_args[] =
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_shufpd, "__builtin_ia32_shufpd", IX86_BUILTIN_SHUFPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v2df", IX86_BUILTIN_VEC_PERM_V2DF, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v4sf", IX86_BUILTIN_VEC_PERM_V4SF, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SI },
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{ OPTION_MASK_ISA_SSE, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v4sf", IX86_BUILTIN_VEC_PERM_V4SF, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v2di", IX86_BUILTIN_VEC_PERM_V2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v4si", IX86_BUILTIN_VEC_PERM_V4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v8hi", IX86_BUILTIN_VEC_PERM_V8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI },
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@ -21731,6 +21733,8 @@ static const struct builtin_description bdesc_args[] =
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v4si_u", IX86_BUILTIN_VEC_PERM_V4SI_U, UNKNOWN, (int) V4USI_FTYPE_V4USI_V4USI_V4USI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v8hi_u", IX86_BUILTIN_VEC_PERM_V8HI_U, UNKNOWN, (int) V8UHI_FTYPE_V8UHI_V8UHI_V8UHI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v16qi_u", IX86_BUILTIN_VEC_PERM_V16QI_U, UNKNOWN, (int) V16UQI_FTYPE_V16UQI_V16UQI_V16UQI },
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{ OPTION_MASK_ISA_AVX, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v4df", IX86_BUILTIN_VEC_PERM_V4DF, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DI },
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{ OPTION_MASK_ISA_AVX, CODE_FOR_nothing, "__builtin_ia32_vec_perm_v8sf", IX86_BUILTIN_VEC_PERM_V8SF, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SI },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_movmskpd, "__builtin_ia32_movmskpd", IX86_BUILTIN_MOVMSKPD, UNKNOWN, (int) INT_FTYPE_V2DF },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_pmovmskb, "__builtin_ia32_pmovmskb128", IX86_BUILTIN_PMOVMSKB128, UNKNOWN, (int) INT_FTYPE_V16QI },
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@ -24151,6 +24155,8 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
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case IX86_BUILTIN_VEC_PERM_V4SI_U:
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case IX86_BUILTIN_VEC_PERM_V8HI_U:
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case IX86_BUILTIN_VEC_PERM_V16QI_U:
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case IX86_BUILTIN_VEC_PERM_V4DF:
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case IX86_BUILTIN_VEC_PERM_V8SF:
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return ix86_expand_vec_perm_builtin (exp);
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case IX86_BUILTIN_INFQ:
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@ -28976,21 +28982,33 @@ ix86_vectorize_builtin_vec_perm (tree vec_type, tree *mask_type)
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{
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tree itype = TREE_TYPE (vec_type);
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bool u = TYPE_UNSIGNED (itype);
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enum machine_mode vmode = TYPE_MODE (vec_type);
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enum ix86_builtins fcode;
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bool ok = TARGET_SSE2;
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if (!TARGET_SSE2)
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return NULL_TREE;
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switch (TYPE_MODE (vec_type))
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switch (vmode)
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{
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case V4DFmode:
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ok = TARGET_AVX;
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fcode = IX86_BUILTIN_VEC_PERM_V4DF;
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goto get_di;
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case V2DFmode:
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itype = ix86_get_builtin_type (IX86_BT_DI);
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fcode = IX86_BUILTIN_VEC_PERM_V2DF;
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get_di:
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itype = ix86_get_builtin_type (IX86_BT_DI);
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break;
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case V8SFmode:
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ok = TARGET_AVX;
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fcode = IX86_BUILTIN_VEC_PERM_V8SF;
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goto get_si;
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case V4SFmode:
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itype = ix86_get_builtin_type (IX86_BT_SI);
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ok = TARGET_SSE;
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fcode = IX86_BUILTIN_VEC_PERM_V4SF;
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get_si:
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itype = ix86_get_builtin_type (IX86_BT_SI);
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break;
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case V2DImode:
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fcode = u ? IX86_BUILTIN_VEC_PERM_V2DI_U : IX86_BUILTIN_VEC_PERM_V2DI;
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break;
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@ -29004,9 +29022,13 @@ ix86_vectorize_builtin_vec_perm (tree vec_type, tree *mask_type)
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fcode = u ? IX86_BUILTIN_VEC_PERM_V16QI_U : IX86_BUILTIN_VEC_PERM_V16QI;
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break;
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default:
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return NULL_TREE;
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ok = false;
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break;
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}
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if (!ok)
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return NULL_TREE;
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*mask_type = itype;
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return ix86_builtins[(int) fcode];
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}
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@ -29619,8 +29641,9 @@ expand_vec_perm_pshufb2 (struct expand_vec_perm_d *d)
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rtx rperm[2][16], vperm, l, h, op, m128;
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unsigned int i, nelt, eltsz;
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if (!TARGET_SSSE3)
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if (!TARGET_SSSE3 || GET_MODE_SIZE (d->vmode) != 16)
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return false;
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gcc_assert (d->op0 != d->op1);
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nelt = d->nelt;
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eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
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