* config/i386/i386.md (float<SWI48x:mode><MODEF:mode>2) Enable
DImode for x87 on 32bit targets. Conditionally disable x87 modes with X87_ENABLE_FLOAT. Remove preparation code. (*float<SWI48:mode><MODEF:mode>2): Rename from *float<SWI48:mode><MODEF:mode>2_mixed. Handle x87, SSE and mixed math using "enabled" attribute. (*floatdi<MODEF:mode>2_i387): Rename from *float<SWI48x:mode><MODEF:mode>2_i387. Handle only DImode and enable for 32bit targets only. (floatdi<X87MODEF:mode>2_i387_with_xmm pre-reload splitter): New splitter. (floatdi<X87MODEF:mode>2_i387_with_xmm): Use register_operand as operand 1 predicate. Rewrite as define_insn_and_split. (floatdi<X87MODEF:mode>2_i387_with_xmm memory input splitter): Remove. From-SVN: r264160
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6435284ea6
commit
785425e152
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@ -1,3 +1,20 @@
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2018-09-07 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (float<SWI48x:mode><MODEF:mode>2) Enable
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DImode for x87 on 32bit targets. Conditionally disable x87 modes
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with X87_ENABLE_FLOAT. Remove preparation code.
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(*float<SWI48:mode><MODEF:mode>2): Rename from
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*float<SWI48:mode><MODEF:mode>2_mixed. Handle x87, SSE and mixed
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math using "enabled" attribute.
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(*floatdi<MODEF:mode>2_i387): Rename from
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*float<SWI48x:mode><MODEF:mode>2_i387. Handle only DImode and
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enable for 32bit targets only.
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(floatdi<X87MODEF:mode>2_i387_with_xmm pre-reload splitter): New
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splitter.
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(floatdi<X87MODEF:mode>2_i387_with_xmm): Use register_operand
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as operand 1 predicate. Rewrite as define_insn_and_split.
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(floatdi<X87MODEF:mode>2_i387_with_xmm memory input splitter): Remove.
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2018-09-06 Uros Bizjak <ubizjak@gmail.com>
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2018-09-06 Uros Bizjak <ubizjak@gmail.com>
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* reg-stack.c (get_true_reg) <case FLOAT_TRUNCATE>: Reorder
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* reg-stack.c (get_true_reg) <case FLOAT_TRUNCATE>: Reorder
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@ -5063,36 +5063,19 @@
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(set_attr "znver1_decode" "double")
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(set_attr "znver1_decode" "double")
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(set_attr "fp_int_src" "true")])
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(set_attr "fp_int_src" "true")])
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(define_expand "float<SWI48:mode><MODEF:mode>2"
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(define_expand "float<SWI48x:mode><MODEF:mode>2"
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[(set (match_operand:MODEF 0 "register_operand")
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[(set (match_operand:MODEF 0 "register_operand")
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(float:MODEF (match_operand:SWI48 1 "nonimmediate_operand")))]
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(float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand")))]
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"TARGET_80387 || (SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)"
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"(TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48x:MODE>mode))
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{
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|| (SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
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if (!(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)
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&& ((<SWI48x:MODE>mode != DImode) || TARGET_64BIT))")
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&& !X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48:MODE>mode))
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{
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rtx reg = gen_reg_rtx (XFmode);
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rtx (*insn)(rtx, rtx);
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emit_insn (gen_float<SWI48:mode>xf2 (reg, operands[1]));
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(define_insn "*float<SWI48:mode><MODEF:mode>2"
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if (<MODEF:MODE>mode == SFmode)
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insn = gen_truncxfsf2;
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else if (<MODEF:MODE>mode == DFmode)
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insn = gen_truncxfdf2;
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else
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gcc_unreachable ();
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emit_insn (insn (operands[0], reg));
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DONE;
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}
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})
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(define_insn "*float<SWI48:mode><MODEF:mode>2_mixed"
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[(set (match_operand:MODEF 0 "register_operand" "=f,v,v")
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[(set (match_operand:MODEF 0 "register_operand" "=f,v,v")
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(float:MODEF
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(float:MODEF
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(match_operand:SWI48 1 "nonimmediate_operand" "m,r,m")))]
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(match_operand:SWI48 1 "nonimmediate_operand" "m,r,m")))]
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"SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"
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"(TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48:MODE>mode))
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|| (SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)"
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"@
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"@
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fild%Z1\t%1
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fild%Z1\t%1
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%vcvtsi2<MODEF:ssemodesuffix><SWI48:rex64suffix>\t{%1, %d0|%d0, %1}
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%vcvtsi2<MODEF:ssemodesuffix><SWI48:rex64suffix>\t{%1, %d0|%d0, %1}
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@ -5113,21 +5096,28 @@
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(set_attr "znver1_decode" "double,*,*")
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(set_attr "znver1_decode" "double,*,*")
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(set_attr "fp_int_src" "true")
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(set_attr "fp_int_src" "true")
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(set (attr "enabled")
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(set (attr "enabled")
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(cond [(eq_attr "alternative" "0")
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(if_then_else
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(symbol_ref "TARGET_MIX_SSE_I387
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(match_test ("SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"))
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&& X87_ENABLE_FLOAT (<MODEF:MODE>mode,
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(if_then_else
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<SWI48:MODE>mode)")
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(eq_attr "alternative" "0")
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]
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(symbol_ref "TARGET_MIX_SSE_I387
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(symbol_ref "true")))
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&& X87_ENABLE_FLOAT (<MODEF:MODE>mode,
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<SWI48:MODE>mode)")
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(symbol_ref "true"))
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(if_then_else
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(eq_attr "alternative" "0")
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(symbol_ref "true")
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(symbol_ref "false"))))
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(set (attr "preferred_for_speed")
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(set (attr "preferred_for_speed")
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(cond [(eq_attr "alternative" "1")
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(cond [(eq_attr "alternative" "1")
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(symbol_ref "TARGET_INTER_UNIT_CONVERSIONS")]
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(symbol_ref "TARGET_INTER_UNIT_CONVERSIONS")]
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(symbol_ref "true")))])
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(symbol_ref "true")))])
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(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"
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(define_insn "*floatdi<MODEF:mode>2_i387"
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[(set (match_operand:MODEF 0 "register_operand" "=f")
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[(set (match_operand:MODEF 0 "register_operand" "=f")
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(float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand" "m")))]
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(float:MODEF (match_operand:DI 1 "nonimmediate_operand" "m")))]
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"TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48x:MODE>mode)"
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"!TARGET_64BIT
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&& TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, DImode)"
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"fild%Z1\t%1"
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"fild%Z1\t%1"
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[(set_attr "type" "fmov")
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[(set_attr "type" "fmov")
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(set_attr "mode" "<MODEF:MODE>")
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(set_attr "mode" "<MODEF:MODE>")
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@ -5242,32 +5232,34 @@
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;; Avoid store forwarding (partial memory) stall penalty
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;; Avoid store forwarding (partial memory) stall penalty
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;; by passing DImode value through XMM registers. */
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;; by passing DImode value through XMM registers. */
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(define_insn "floatdi<X87MODEF:mode>2_i387_with_xmm"
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[(set (match_operand:X87MODEF 0 "register_operand" "=f,f")
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(float:X87MODEF
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(match_operand:DI 1 "nonimmediate_operand" "m,?r")))
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(clobber (match_scratch:V4SI 3 "=X,x"))
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(clobber (match_scratch:V4SI 4 "=X,x"))
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(clobber (match_operand:DI 2 "memory_operand" "=X,m"))]
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"TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
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&& TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC
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&& !TARGET_64BIT && optimize_function_for_speed_p (cfun)"
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"#"
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[(set_attr "type" "multi")
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(set_attr "mode" "<X87MODEF:MODE>")
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(set_attr "unit" "i387")
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(set_attr "fp_int_src" "true")])
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(define_split
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(define_split
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[(set (match_operand:X87MODEF 0 "fp_register_operand")
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[(set (match_operand:X87MODEF 0 "register_operand")
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(float:X87MODEF (match_operand:DI 1 "register_operand")))
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(float:X87MODEF
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(clobber (match_scratch:V4SI 3))
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(match_operand:DI 1 "register_operand")))]
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(clobber (match_scratch:V4SI 4))
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"!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC
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(clobber (match_operand:DI 2 "memory_operand"))]
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&& TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
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"TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
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&& TARGET_SSE2 && optimize_function_for_speed_p (cfun)
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&& TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC
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&& can_create_pseudo_p ()"
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&& !TARGET_64BIT && optimize_function_for_speed_p (cfun)
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[(const_int 0)]
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&& reload_completed"
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{
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emit_insn (gen_floatdi<mode>2_i387_with_xmm
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(operands[0], operands[1],
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assign_386_stack_local (DImode, SLOT_TEMP)));
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DONE;
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})
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(define_insn_and_split "floatdi<X87MODEF:mode>2_i387_with_xmm"
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[(set (match_operand:X87MODEF 0 "register_operand" "=f")
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(float:X87MODEF
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(match_operand:DI 1 "register_operand" "r")))
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(clobber (match_scratch:V4SI 3 "=x"))
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(clobber (match_scratch:V4SI 4 "=x"))
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(clobber (match_operand:DI 2 "memory_operand" "=m"))]
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"!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC
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&& TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
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&& TARGET_SSE2 && optimize_function_for_speed_p (cfun)"
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"#"
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"&& reload_completed"
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[(set (match_dup 2) (match_dup 3))
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[(set (match_dup 2) (match_dup 3))
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(set (match_dup 0) (float:X87MODEF (match_dup 2)))]
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(set (match_dup 0) (float:X87MODEF (match_dup 2)))]
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{
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{
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@ -5281,19 +5273,11 @@
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operands[4]));
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operands[4]));
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operands[3] = gen_lowpart (DImode, operands[3]);
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operands[3] = gen_lowpart (DImode, operands[3]);
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})
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}
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[(set_attr "type" "multi")
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(define_split
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(set_attr "mode" "<X87MODEF:MODE>")
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[(set (match_operand:X87MODEF 0 "fp_register_operand")
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(set_attr "unit" "i387")
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(float:X87MODEF (match_operand:DI 1 "memory_operand")))
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(set_attr "fp_int_src" "true")])
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(clobber (match_scratch:V4SI 3))
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(clobber (match_scratch:V4SI 4))
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(clobber (match_operand:DI 2 "memory_operand"))]
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"TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
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&& TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC
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&& !TARGET_64BIT && optimize_function_for_speed_p (cfun)
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&& reload_completed"
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[(set (match_dup 0) (float:X87MODEF (match_dup 1)))])
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(define_expand "floatuns<SWI12:mode><MODEF:mode>2"
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(define_expand "floatuns<SWI12:mode><MODEF:mode>2"
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[(set (match_operand:MODEF 0 "register_operand")
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[(set (match_operand:MODEF 0 "register_operand")
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