alpha.md (extqh): Define as 64-((R&7)*8) instead of 56-(((R-1)&7)*8).
* alpha.md (extqh): Define as 64-((R&7)*8) instead of 56-(((R-1)&7)*8). (extlh, extwh): Likewise. From-SVN: r27897
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@ -1,3 +1,8 @@
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Thu Jul 1 20:54:10 1999 Richard Henderson <rth@cygnus.com>
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* alpha.md (extqh): Define as 64-((R&7)*8) instead of 56-(((R-1)&7)*8).
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(extlh, extwh): Likewise.
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Thu Jul 1 11:05:25 1999 Gavin Romig-Koch <gavin@cygnus.com>
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* c-lex.c (yylex): Improve 'integer constant out of range' messages.
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@ -1522,10 +1522,9 @@
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(const_int -8))))
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(set (match_dup 4)
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(ashift:DI (match_dup 3)
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(minus:DI (const_int 56)
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(minus:DI (const_int 64)
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(ashift:DI
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(and:DI (plus:DI (match_dup 2) (const_int -1))
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(const_int 7))
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(and:DI (match_dup 2) (const_int 7))
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(const_int 3)))))
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(set (subreg:DI (match_operand:QI 0 "register_operand" "") 0)
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(ashiftrt:DI (match_dup 4) (const_int 56)))]
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@ -1543,10 +1542,9 @@
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(const_int -8))))
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(set (match_dup 4)
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(ashift:DI (match_dup 3)
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(minus:DI (const_int 56)
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(minus:DI (const_int 64)
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(ashift:DI
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(and:DI (plus:DI (match_dup 2) (const_int -1))
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(const_int 7))
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(and:DI (match_dup 2) (const_int 7))
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(const_int 3)))))
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(set (subreg:DI (match_operand:QI 0 "register_operand" "") 0)
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(ashiftrt:DI (match_dup 4) (const_int 48)))]
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@ -1603,11 +1601,10 @@
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[(set (match_operand:DI 0 "register_operand" "=r")
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(ashift:DI
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(match_operand:DI 1 "reg_or_0_operand" "rJ")
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(minus:DI (const_int 56)
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(minus:DI (const_int 64)
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(ashift:DI
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(and:DI
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(plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
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(const_int -1))
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(match_operand:DI 2 "reg_or_8bit_operand" "rI")
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(const_int 7))
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(const_int 3)))))]
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""
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@ -1619,11 +1616,10 @@
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(ashift:DI
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(and:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
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(const_int 2147483647))
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(minus:DI (const_int 56)
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(minus:DI (const_int 64)
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(ashift:DI
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(and:DI
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(plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
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(const_int -1))
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(match_operand:DI 2 "reg_or_8bit_operand" "rI")
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(const_int 7))
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(const_int 3)))))]
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""
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@ -1635,11 +1631,10 @@
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(ashift:DI
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(and:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
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(const_int 65535))
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(minus:DI (const_int 56)
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(minus:DI (const_int 64)
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(ashift:DI
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(and:DI
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(plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
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(const_int -1))
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(match_operand:DI 2 "reg_or_8bit_operand" "rI")
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(const_int 7))
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(const_int 3)))))]
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""
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