mips.c (mips_need_mips16_rdhwr_p): New variable.
gcc/ * config/mips/mips.c (mips_need_mips16_rdhwr_p): New variable. (mips_get_tp): Set it. Record that __mips16_rdhwr binds locally. (mips_start_unique_function, mips_output_mips16_rdhwr) (mips_code_end): New functions. (TARGET_ASM_CODE_END): Define. libgcc/ * config.host (mips64*-*-linux*, mipsisa64*-*-linux*) (mips*-*-linux*): Remove t-slibgcc-libgcc. * config/mips/t-mips16 (LIB1ASMFUNCS): Remove __mips16_rdhwr. * config/mips/mips16.S (__mips16_rdhwr): Delete. From-SVN: r184380
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
5adeb24686
commit
78c2726669
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@ -1,3 +1,11 @@
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2012-02-19 Richard Sandiford <rdsandiford@googlemail.com>
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* config/mips/mips.c (mips_need_mips16_rdhwr_p): New variable.
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(mips_get_tp): Set it. Record that __mips16_rdhwr binds locally.
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(mips_start_unique_function, mips_output_mips16_rdhwr)
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(mips_code_end): New functions.
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(TARGET_ASM_CODE_END): Define.
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2012-02-19 Richard Sandiford <rdsandiford@googlemail.com>
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* config/mips/mips.c (mips16_build_call_stub): Add CFI information
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@ -592,6 +592,9 @@ struct target_globals *mips16_globals;
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and returned from mips_sched_reorder2. */
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static int cached_can_issue_more;
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/* True if the output uses __mips16_rdhwr. */
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static bool mips_need_mips16_rdhwr_p;
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/* Index R is the smallest register class that contains register R. */
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const enum reg_class mips_regno_to_class[FIRST_PSEUDO_REGISTER] = {
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LEA_REGS, LEA_REGS, M16_REGS, V1_REG,
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@ -2842,7 +2845,9 @@ mips_get_tp (void)
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tp = gen_reg_rtx (Pmode);
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if (TARGET_MIPS16)
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{
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mips_need_mips16_rdhwr_p = true;
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fn = mips16_stub_function ("__mips16_rdhwr");
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SYMBOL_REF_FLAGS (fn) |= SYMBOL_FLAG_LOCAL;
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if (!call_insn_operand (fn, VOIDmode))
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fn = force_reg (Pmode, fn);
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emit_insn (PMODE_INSN (gen_tls_get_tp_mips16, (tp, fn)));
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@ -5827,6 +5832,33 @@ mips_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
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return addr;
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}
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/* Declare a unique, locally-binding function called NAME, then start
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its definition. */
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static void
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mips_start_unique_function (const char *name)
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{
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tree decl;
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decl = build_decl (BUILTINS_LOCATION, FUNCTION_DECL,
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get_identifier (name),
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build_function_type_list (void_type_node, NULL_TREE));
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DECL_RESULT (decl) = build_decl (BUILTINS_LOCATION, RESULT_DECL,
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NULL_TREE, void_type_node);
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TREE_PUBLIC (decl) = 1;
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TREE_STATIC (decl) = 1;
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DECL_COMDAT_GROUP (decl) = DECL_ASSEMBLER_NAME (decl);
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targetm.asm_out.unique_section (decl, 0);
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switch_to_section (get_named_section (decl, NULL, 0));
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targetm.asm_out.globalize_label (asm_out_file, name);
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fputs ("\t.hidden\t", asm_out_file);
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assemble_name (asm_out_file, name);
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putc ('\n', asm_out_file);
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}
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/* Start a definition of function NAME. MIPS16_P indicates whether the
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function contains MIPS16 code. */
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@ -5865,6 +5897,26 @@ mips_end_function_definition (const char *name)
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}
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}
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/* Output a definition of the __mips16_rdhwr function. */
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static void
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mips_output_mips16_rdhwr (void)
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{
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const char *name;
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name = "__mips16_rdhwr";
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mips_start_unique_function (name);
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mips_start_function_definition (name, false);
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fprintf (asm_out_file,
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"\t.set\tpush\n"
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"\t.set\tmips32r2\n"
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"\t.set\tnoreorder\n"
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"\trdhwr\t$3,$29\n"
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"\t.set\tpop\n"
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"\tj\t$31\n");
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mips_end_function_definition (name);
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}
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/* Return true if calls to X can use R_MIPS_CALL* relocations. */
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static bool
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@ -8467,6 +8519,15 @@ mips_file_start (void)
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ASM_COMMENT_START,
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mips_small_data_threshold, mips_arch_info->name, mips_isa);
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}
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/* Implement TARGET_ASM_CODE_END. */
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static void
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mips_code_end (void)
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{
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if (mips_need_mips16_rdhwr_p)
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mips_output_mips16_rdhwr ();
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}
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/* Make the last instruction frame-related and note that it performs
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the operation described by FRAME_PATTERN. */
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@ -17357,6 +17418,8 @@ mips_expand_vec_minmax (rtx target, rtx op0, rtx op1,
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#define TARGET_ASM_FILE_START mips_file_start
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#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
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#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
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#undef TARGET_ASM_CODE_END
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#define TARGET_ASM_CODE_END mips_code_end
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#undef TARGET_INIT_LIBFUNCS
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#define TARGET_INIT_LIBFUNCS mips_init_libfuncs
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@ -1,3 +1,10 @@
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2012-02-19 Richard Sandiford <rdsandiford@googlemail.com>
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* config.host (mips64*-*-linux*, mipsisa64*-*-linux*)
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(mips*-*-linux*): Remove t-slibgcc-libgcc.
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* config/mips/t-mips16 (LIB1ASMFUNCS): Remove __mips16_rdhwr.
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* config/mips/mips16.S (__mips16_rdhwr): Delete.
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2012-02-19 Richard Sandiford <rdsandiford@googlemail.com>
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* config/mips/mips16.S (CALL_STUB_RET): Add CFI information.
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@ -746,12 +746,12 @@ mips*-*-netbsd*) # NetBSD/mips, either endian.
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;;
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mips64*-*-linux* | mipsisa64*-*-linux*)
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extra_parts="$extra_parts crtfastmath.o"
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tmake_file="${tmake_file} t-crtfm mips/t-mips16 mips/t-tpbit t-slibgcc-libgcc"
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tmake_file="${tmake_file} t-crtfm mips/t-mips16 mips/t-tpbit"
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md_unwind_header=mips/linux-unwind.h
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;;
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mips*-*-linux*) # Linux MIPS, either endian.
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extra_parts="$extra_parts crtfastmath.o"
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tmake_file="${tmake_file} t-crtfm mips/t-mips16 t-slibgcc-libgcc"
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tmake_file="${tmake_file} t-crtfm mips/t-mips16"
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md_unwind_header=mips/linux-unwind.h
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;;
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mips*-*-openbsd*)
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@ -718,17 +718,4 @@ CALL_STUB_RET (__mips16_call_stub_dc_10, 10, DC)
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#endif
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#endif /* !__mips_single_float */
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#ifdef L_m16rdhwr
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STARTFN (__mips16_rdhwr)
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/* Forced always hidden, because the PLT resolver function would
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not preserve all necessary registers. */
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.hidden __mips16_rdhwr
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.set push
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.set mips32r2
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.set noreorder
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rdhwr $3,$29
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.set pop
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j $31
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ENDFN (__mips16_rdhwr)
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#endif
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#endif
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@ -36,8 +36,7 @@ LIB1ASMFUNCS = _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \
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_m16stubsc0 _m16stubsc1 _m16stubsc2 _m16stubsc5 _m16stubsc6 \
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_m16stubsc9 _m16stubsc10 \
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_m16stubdc0 _m16stubdc1 _m16stubdc2 _m16stubdc5 _m16stubdc6 \
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_m16stubdc9 _m16stubdc10 \
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_m16rdhwr
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_m16stubdc9 _m16stubdc10
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SYNC = yes
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SYNC_CFLAGS = -mno-mips16
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