PR90545, gcc.target/powerpc/fold-vec-splats-floatdouble.c fails
I figure a tweak to register_move_cost is better than sprinkling ?s in instruction operand alternatives. PR target/90545 * config/rs6000/rs6000.c (rs6000_register_move_cost): Increase power9 direct move cost. * testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c: Correct comments and rename functions to suit parameters. From-SVN: r271464
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@ -1,3 +1,11 @@
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2019-05-21 Alan Modra <amodra@gmail.com>
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PR target/90545
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* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
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power9 direct move cost.
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* testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c:
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Correct comments and rename functions to suit parameters.
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2019-05-21 Richard Biener <rguenther@suse.de>
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PR middle-end/90510
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@ -34657,8 +34657,14 @@ rs6000_register_move_cost (machine_mode mode,
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{
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if (TARGET_DIRECT_MOVE)
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{
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/* Keep the cost for direct moves above that for within
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a register class even if the actual processor cost is
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comparable. We do this because a direct move insn
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can't be a nop, whereas with ideal register
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allocation a move within the same class might turn
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out to be a nop. */
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if (rs6000_tune == PROCESSOR_POWER9)
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ret = 2 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
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ret = 3 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
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else
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ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
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/* SFmode requires a conversion when moving between gprs
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@ -8,20 +8,20 @@
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#include <altivec.h>
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vector float
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test1d (float x)
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test1f (float x)
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{
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return vec_splats (x);
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}
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vector double
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test1f (double x)
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test1d (double x)
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{
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return vec_splats (x);
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}
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// float test generates the permute instruction.
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// double test generates the permute instruction.
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/* { dg-final { scan-assembler-times "xxpermdi" 1 } } */
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// double test generates a convert (double to single non-signalling) followed by a splat.
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// float test generates a convert (double to single non-signalling) followed by a splat.
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/* { dg-final { scan-assembler-times {\mxscvdpspn?\M} 1 } } */
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/* { dg-final { scan-assembler-times {\mvspltw\M|\mxxspltw\M} 1 } } */
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