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PR90545, gcc.target/powerpc/fold-vec-splats-floatdouble.c fails

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I figure a tweak to register_move_cost is better than sprinkling ?s
in instruction operand alternatives.

	PR target/90545
	* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
	power9 direct move cost.
	* testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c:
	Correct comments and rename functions to suit parameters.

From-SVN: r271464
This commit is contained in:
Alan Modra 2019-05-21 23:06:04 +09:30 committed by Alan Modra
parent 4f8b89f092
commit 78e5da0aa8
3 changed files with 19 additions and 5 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2019-05-21 Alan Modra <amodra@gmail.com>
PR target/90545
* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase
power9 direct move cost.
* testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c:
Correct comments and rename functions to suit parameters.
2019-05-21 Richard Biener <rguenther@suse.de> 2019-05-21 Richard Biener <rguenther@suse.de>
PR middle-end/90510 PR middle-end/90510

8
gcc/config/rs6000/rs6000.c
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@ -34657,8 +34657,14 @@ rs6000_register_move_cost (machine_mode mode,
{ {
if (TARGET_DIRECT_MOVE) if (TARGET_DIRECT_MOVE)
{ {
/* Keep the cost for direct moves above that for within
a register class even if the actual processor cost is
comparable. We do this because a direct move insn
can't be a nop, whereas with ideal register
allocation a move within the same class might turn
out to be a nop. */
if (rs6000_tune == PROCESSOR_POWER9) if (rs6000_tune == PROCESSOR_POWER9)
ret = 2 * hard_regno_nregs (FIRST_GPR_REGNO, mode); ret = 3 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
else else
ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode); ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
/* SFmode requires a conversion when moving between gprs /* SFmode requires a conversion when moving between gprs

8
gcc/testsuite/gcc.target/powerpc/fold-vec-splats-floatdouble.c
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@ -8,20 +8,20 @@
#include <altivec.h> #include <altivec.h>
vector float vector float
test1d (float x) test1f (float x)
{ {
return vec_splats (x); return vec_splats (x);
} }
vector double vector double
test1f (double x) test1d (double x)
{ {
return vec_splats (x); return vec_splats (x);
} }
// float test generates the permute instruction. // double test generates the permute instruction.
/* { dg-final { scan-assembler-times "xxpermdi" 1 } } */ /* { dg-final { scan-assembler-times "xxpermdi" 1 } } */
// double test generates a convert (double to single non-signalling) followed by a splat. // float test generates a convert (double to single non-signalling) followed by a splat.
/* { dg-final { scan-assembler-times {\mxscvdpspn?\M} 1 } } */ /* { dg-final { scan-assembler-times {\mxscvdpspn?\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvspltw\M|\mxxspltw\M} 1 } } */ /* { dg-final { scan-assembler-times {\mvspltw\M|\mxxspltw\M} 1 } } */