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config.gcc: Add .opt magic for the rs6000 ports. 

2005-05-05  Aldy Hernandez  <aldyh@redhat.com>

        * config.gcc: Add .opt magic for the rs6000 ports.

        * doc/invoke.texi: Document -mabi= option properly.  Document
        -misel and -mno-sel.  Document -mspe and -mno-spe.  Document
        -mvrsave and -mno-vrsave.  Document deprecation of -mspe= and
        -misel=.

        * config/rs6000/aix.h: Remove XL_COMPAT stuff.  Remove
        SUBTARGET_SWITCHES and SUBSUBTARGET_SWITCHES.  Define
        TARGET_XL_COMPAT.

        * config/rs6000/aix.opt: New.
        * config/rs6000/aix41.opt: New.
        * config/rs6000/aix64.opt: New.
        * config/rs6000/darwin.opt: New.
        * config/rs6000/linux64.opt: New.
        * config/rs6000/rs6000.opt: New.
        * config/rs6000/sysv4.opt: New.

        * config/rs6000/sysv4.h: Delete definitions of MASK_* and
        associated TARGET_*.  Remove SUBTARGET_OPTIONS,
        SUBTARGET_SWITCHES.
        Define TARGET_USES_SYSV4_OPT.
        * config/rs6000/aix41.h: Remove SUBSUBTARGET_SWITCHES.
        * config/rs6000/aix43.h: Remove SUBSUBTARGET_SWITCHES.  Define
        TARGET_USES_AIX64_OPT.
        * config/rs6000/aix51.h: Same.
        * config/rs6000/aix52.h: Same.
        * config/rs6000/darwin.h: Remove
        SUBTARGET_SWITCHES.  Use TARGET_ALTIVEC_VRSAVE instead of
        rs6000_altivec_vrsave.
        * config/rs6000/linux64.h: Use
        rs6000_explicit_options.  Remove EXTRA_SUBTARGET_SWITCHES.

        * config/rs6000/rs6000.c: Remove definitions of
        rs6000_sched_restricted_insns_priority,
        rs6000_long_double_size_string, rs6000_altivec_vrsave,
        rs6000_altivec_vrsave_string, rs6000_isel, rs6000_spe,
        rs6000_float_gprs_string, rs6000_isel_string, rs6000_spe_string,
        rs6000_abi_string, rs6000_warn_altivec_long, rs6000_longcall,
        rs6000_alignment_string.  Define rs6000_explicit_options.
        (rs6000_parse_abi_options): Remove.
        (rs6000_parse_alignment_option): Remove.
        (rs6000_parse_float_gprs_option): Remove.
        (rs6000_handle_option): New.  Define TARGET_HANDLE_OPTION.  Define
        TARGET_DEFAULT_TARGET_FLAGS.
        (rs6000_override_options): Revamp to use new .opt machinery.

        * config/rs6000/rs6000.h: Remove old MASK_* and TARGET_* in favor
        of new .opt machinery.  Remove target_flags.  Redefine
        TARGET_MFCRF and TARGET_POWERPC64.  Remove TARGET_SWITCHES,
        SUBTARGET_SWITCHES, TARGET_OPTIONS, SUBTARGET_OPTIONS,
        rs6000_float_gprs_string, rs6000_isel_string, rs6000_spe_string,
        rs6000_altivec_vrsave_string, rs6000_altivec_vrsave,
        rs6000_longcall_switch, rs6000_default_long_calls,
        rs6000_sched_costly_dep_str, rs6000_sched_costly_dep,
        rs6000_warn_altivec_long, rs6000_warn_altivec_long_switch, and
        TARGET_ALTIVEC_VRSAVE.

From-SVN: r99284
This commit is contained in:
Aldy Hernandez 2005-05-05 20:54:25 +00:00 committed by David Edelsohn
parent 7f9a7fc358
commit 78f5898b95
20 changed files with 919 additions and 642 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

61
gcc/ChangeLog
View File

@ -1,3 +1,64 @@
2005-05-05 Aldy Hernandez <aldyh@redhat.com>
* config.gcc: Add .opt magic for the rs6000 ports.
* doc/invoke.texi: Document -mabi= option properly. Document
-misel and -mno-sel. Document -mspe and -mno-spe. Document
-mvrsave and -mno-vrsave. Document deprecation of -mspe= and
-misel=.
* config/rs6000/aix.h: Remove XL_COMPAT stuff. Remove
SUBTARGET_SWITCHES and SUBSUBTARGET_SWITCHES. Define
TARGET_XL_COMPAT.
* config/rs6000/aix.opt: New.
* config/rs6000/aix41.opt: New.
* config/rs6000/aix64.opt: New.
* config/rs6000/darwin.opt: New.
* config/rs6000/linux64.opt: New.
* config/rs6000/rs6000.opt: New.
* config/rs6000/sysv4.opt: New.
* config/rs6000/sysv4.h: Delete definitions of MASK_* and
associated TARGET_*. Remove SUBTARGET_OPTIONS,
SUBTARGET_SWITCHES.
Define TARGET_USES_SYSV4_OPT.
* config/rs6000/aix41.h: Remove SUBSUBTARGET_SWITCHES.
* config/rs6000/aix43.h: Remove SUBSUBTARGET_SWITCHES. Define
TARGET_USES_AIX64_OPT.
* config/rs6000/aix51.h: Same.
* config/rs6000/aix52.h: Same.
* config/rs6000/darwin.h: Remove
SUBTARGET_SWITCHES. Use TARGET_ALTIVEC_VRSAVE instead of
rs6000_altivec_vrsave.
* config/rs6000/linux64.h: Use
rs6000_explicit_options. Remove EXTRA_SUBTARGET_SWITCHES.
* config/rs6000/rs6000.c: Remove definitions of
rs6000_sched_restricted_insns_priority,
rs6000_long_double_size_string, rs6000_altivec_vrsave,
rs6000_altivec_vrsave_string, rs6000_isel, rs6000_spe,
rs6000_float_gprs_string, rs6000_isel_string, rs6000_spe_string,
rs6000_abi_string, rs6000_warn_altivec_long, rs6000_longcall,
rs6000_alignment_string. Define rs6000_explicit_options.
(rs6000_parse_abi_options): Remove.
(rs6000_parse_alignment_option): Remove.
(rs6000_parse_float_gprs_option): Remove.
(rs6000_handle_option): New. Define TARGET_HANDLE_OPTION. Define
TARGET_DEFAULT_TARGET_FLAGS.
(rs6000_override_options): Revamp to use new .opt machinery.
* config/rs6000/rs6000.h: Remove old MASK_* and TARGET_* in favor
of new .opt machinery. Remove target_flags. Redefine
TARGET_MFCRF and TARGET_POWERPC64. Remove TARGET_SWITCHES,
SUBTARGET_SWITCHES, TARGET_OPTIONS, SUBTARGET_OPTIONS,
rs6000_float_gprs_string, rs6000_isel_string, rs6000_spe_string,
rs6000_altivec_vrsave_string, rs6000_altivec_vrsave,
rs6000_longcall_switch, rs6000_default_long_calls,
rs6000_sched_costly_dep_str, rs6000_sched_costly_dep,
rs6000_warn_altivec_long, rs6000_warn_altivec_long_switch, and
TARGET_ALTIVEC_VRSAVE.
2005-05-05 Ralf Corsepius <ralf.corsepius@rtems.org>
* config.gcc (hppa1.1-*-rtems*): Remove.

31
gcc/config.gcc
View File

@ -1581,10 +1581,12 @@ powerpc64-*-linux*)
test x$with_cpu != x || cpu_is_64bit=yes
test x$cpu_is_64bit != xyes || tm_file="${tm_file} rs6000/default64.h"
tm_file="rs6000/biarch64.h ${tm_file} rs6000/linux64.h"
extra_options="${extra_options} rs6000/sysv4.opt rs6000/linux64.opt"
tmake_file="rs6000/t-fprules ${tmake_file} rs6000/t-ppccomm rs6000/t-linux64"
;;
powerpc64-*-gnu*)
tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux64.h rs6000/gnu.h"
extra_options="${extra_options} rs6000/sysv4.opt rs6000/linux64.opt"
tmake_file="rs6000/t-fprules t-slibgcc-elf-ver t-gnu rs6000/t-linux64"
;;
powerpc-*-beos*)
@ -1596,6 +1598,7 @@ powerpc-*-beos*)
powerpc-*-darwin*)
tm_file="${tm_file} rs6000/darwin.h"
tmake_file="${tmake_file} rs6000/t-darwin"
extra_options="${extra_options} rs6000/darwin.opt"
case ${target} in
*-darwin1[0-9]*) tmake_file="${tmake_file} rs6000/t-darwin8" ;;
*-darwin[0-7]*) ;;
@ -1606,14 +1609,17 @@ powerpc-*-darwin*)
powerpc*-*-freebsd*)
tm_file="${tm_file} dbxelf.h elfos.h ${fbsd_tm_file} rs6000/sysv4.h rs6000/freebsd.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
powerpc-*-netbsd*)
tm_file="${tm_file} dbxelf.h elfos.h netbsd.h netbsd-elf.h freebsd-spec.h rs6000/sysv4.h rs6000/netbsd.h"
tmake_file="${tmake_file} rs6000/t-netbsd"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
powerpc-*-chorusos*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h chorus.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcos rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
case ${enable_threads} in
yes | posix)
thread_file='posix'
@ -1623,43 +1629,53 @@ powerpc-*-chorusos*)
;;
powerpc-*-eabispe*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/eabispe.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-spe rs6000/t-ppccomm"
;;
powerpc-*-eabisimaltivec*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/eabisim.h rs6000/eabialtivec.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcendian rs6000/t-ppccomm"
;;
powerpc-*-eabisim*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/eabisim.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
;;
powerpc-*-elf*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
use_fixproto=yes
;;
powerpc-*-eabialtivec*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/eabialtivec.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcendian rs6000/t-ppccomm"
;;
powerpc-*-eabi*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
;;
powerpc-*-rtems*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/rtems.h rtems.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-rtems t-rtems rs6000/t-ppccomm"
;;
powerpc-*-linux*altivec*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
;;
powerpc-*-linux*spe*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxspe.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
;;
powerpc-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
case ${enable_targets}:${cpu_is_64bit} in
*powerpc64* | all:* | *:yes)
@ -1676,6 +1692,7 @@ powerpc-*-linux*)
;;
powerpc-*-gnu-gnualtivec*)
tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h rs6000/gnu.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcos t-slibgcc-elf-ver t-gnu rs6000/t-ppccomm"
if test x$enable_threads = xyes; then
thread_file='posix'
@ -1684,6 +1701,7 @@ powerpc-*-gnu-gnualtivec*)
powerpc-*-gnu*)
tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/gnu.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcos t-slibgcc-elf-ver t-gnu rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
if test x$enable_threads = xyes; then
thread_file='posix'
fi
@ -1694,11 +1712,13 @@ powerpc-wrs-vxworks*)
tm_file="rs6000/rs6000.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h"
tm_file="${tm_file} vxworks.h rs6000/vxworks.h"
tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-ppccomm rs6000/t-vxworks"
extra_options="${extra_options} rs6000/sysv4.opt"
extra_headers=ppc-asm.h
;;
powerpc-wrs-windiss*) # Instruction-level simulator for VxWorks.
tm_file="${tm_file} elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/windiss.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
thread_file=""
use_fixproto=yes
;;
@ -1706,6 +1726,7 @@ powerpc-*-lynxos*)
xm_defines=POSIX
tm_file="${tm_file} dbxelf.h elfos.h rs6000/sysv4.h rs6000/lynx.h lynx.h"
tmake_file="t-lynx rs6000/t-lynx"
extra_options="${extra_options} rs6000/sysv4.opt lynx.opt"
extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
extra_options="${extra_options} lynx.opt"
thread_file=lynx
@ -1715,32 +1736,39 @@ powerpc-*-lynxos*)
powerpcle-*-sysv*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/sysv4le.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcos rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
use_fixproto=yes
;;
powerpcle-*-elf*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/sysv4le.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
use_fixproto=yes
;;
powerpcle-*-eabisim*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/sysv4le.h rs6000/eabi.h rs6000/eabisim.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
powerpcle-*-eabi*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/sysv4le.h rs6000/eabi.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
powerpc-*-kaos*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h kaos.h rs6000/kaos-ppc.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
powerpcle-*-kaos*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/sysv4le.h kaos.h rs6000/kaos-ppc.h"
tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
rs6000-ibm-aix4.[12]* | powerpc-ibm-aix4.[12]*)
tm_file="${tm_file} rs6000/aix.h rs6000/aix41.h rs6000/xcoff.h"
tmake_file="rs6000/t-fprules rs6000/t-newas"
extra_options="${extra_options} rs6000/aix.opt rs6000/aix41.opt"
use_collect2=yes
extra_headers=
use_fixproto=yes
@ -1748,12 +1776,14 @@ rs6000-ibm-aix4.[12]* | powerpc-ibm-aix4.[12]*)
rs6000-ibm-aix4.[3456789]* | powerpc-ibm-aix4.[3456789]*)
tm_file="rs6000/biarch64.h ${tm_file} rs6000/aix.h rs6000/aix43.h rs6000/xcoff.h"
tmake_file=rs6000/t-aix43
extra_options="${extra_options} rs6000/aix.opt rs6000/aix64.opt"
use_collect2=yes
thread_file='aix'
extra_headers=
;;
rs6000-ibm-aix5.1.* | powerpc-ibm-aix5.1.*)
tm_file="rs6000/biarch64.h ${tm_file} rs6000/aix.h rs6000/aix51.h rs6000/xcoff.h"
extra_options="${extra_options} rs6000/aix.opt rs6000/aix64.opt"
tmake_file=rs6000/t-aix43
use_collect2=yes
thread_file='aix'
@ -1762,6 +1792,7 @@ rs6000-ibm-aix5.1.* | powerpc-ibm-aix5.1.*)
rs6000-ibm-aix[56789].* | powerpc-ibm-aix[56789].*)
tm_file="${tm_file} rs6000/aix.h rs6000/aix52.h rs6000/xcoff.h"
tmake_file=rs6000/t-aix52
extra_options="${extra_options} rs6000/aix.opt rs6000/aix64.opt"
use_collect2=yes
thread_file='aix'
extra_headers=

13
gcc/config/rs6000/aix.h
View File

@ -195,17 +195,8 @@
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* Enable AIX XL compiler calling convention breakage compatibility. */
#undef TARGET_XL_COMPAT
#define MASK_XL_COMPAT 0x40000000
#define TARGET_XL_COMPAT (target_flags & MASK_XL_COMPAT)
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{"xl-compat", MASK_XL_COMPAT, \
N_("Conform more closely to IBM XLC semantics") }, \
{"no-xl-compat", - MASK_XL_COMPAT, \
N_("Default GCC semantics that differ from IBM XLC") }, \
SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES
#undef TARGET_XL_COMPAT
#define TARGET_XL_COMPAT has_xl_compat_option
/* Define any extra SPECS that the compiler needs to generate. */
#undef SUBTARGET_EXTRA_SPECS

25
gcc/config/rs6000/aix.opt Normal file
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@ -0,0 +1,25 @@
; AIX options.
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
mxl-compat
Target Var(has_xl_compat_option)
Conform more closely to IBM XLC semantics

5
gcc/config/rs6000/aix41.h
View File

@ -22,11 +22,6 @@
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA. */
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
{"pe", 0, \
N_("Support message passing with the Parallel Environment") },
#undef ASM_SPEC
#define ASM_SPEC "-u %(asm_cpu)"

25
gcc/config/rs6000/aix41.opt Normal file
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@ -0,0 +1,25 @@
; Options for AIX4.1.
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
mpe
Target Report RejectNegative Var(internal_nothing_1)
Support message passing with the Parallel Environment

14
gcc/config/rs6000/aix43.h
View File

@ -21,17 +21,6 @@
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA. */
/* AIX 4.3 and above support 64-bit executables. */
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
{"aix64", MASK_64BIT | MASK_POWERPC64 \
| MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Compile for 32-bit pointers") }, \
{"pe", 0, \
N_("Support message passing with the Parallel Environment") },
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
`OVERRIDE_OPTIONS' to take account of this. This macro, if
@ -184,3 +173,6 @@ do { \
.set directives. We handle this by deferring the output of .set
directives to the end of the compilation unit. */
#define TARGET_DEFERRED_OUTPUT_DEFS(DECL,TARGET) true
/* This target uses the aix64.opt file. */
#define TARGET_USES_AIX64_OPT 1

13
gcc/config/rs6000/aix51.h
View File

@ -20,17 +20,6 @@
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA. */
/* AIX V5 and above support 64-bit executables. */
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
{"aix64", MASK_64BIT | MASK_POWERPC64 \
| MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Compile for 32-bit pointers") }, \
{"pe", 0, \
N_("Support message passing with the Parallel Environment") },
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
`OVERRIDE_OPTIONS' to take account of this. This macro, if
@ -193,3 +182,5 @@ do { \
#undef TARGET_C99_FUNCTIONS
#define TARGET_C99_FUNCTIONS 1
/* This target uses the aix64.opt file. */
#define TARGET_USES_AIX64_OPT 1

14
gcc/config/rs6000/aix52.h
View File

@ -20,17 +20,6 @@
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA. */
/* AIX V5 and above support 64-bit executables. */
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
{"aix64", MASK_64BIT | MASK_POWERPC64 \
| MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Compile for 32-bit pointers") }, \
{"pe", 0, \
N_("Support message passing with the Parallel Environment") },
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
`OVERRIDE_OPTIONS' to take account of this. This macro, if
@ -188,3 +177,6 @@ do { \
#ifndef _AIX52
extern long long int atoll(const char *);
#endif
/* This target uses the aix64.opt file. */
#define TARGET_USES_AIX64_OPT 1

33
gcc/config/rs6000/aix64.opt Normal file
View File

@ -0,0 +1,33 @@
; Options for the 64-bit flavor of AIX.
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
maix64
Target Report RejectNegative Mask(64BIT)
Compile for 64-bit pointers
maix32
Target Report RejectNegative InverseMask(64BIT)
Compile for 32-bit pointers
mpe
Target Report RejectNegative Var(internal_nothing_1)
Support message passing with the Parallel Environment

14
gcc/config/rs6000/darwin.h
View File

@ -63,25 +63,13 @@
while (0)
/* */
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{ "64", MASK_64BIT | MASK_POWERPC64, \
N_("Generate 64-bit code") }, \
{ "32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Generate 32-bit code") }, \
{"dynamic-no-pic", MASK_MACHO_DYNAMIC_NO_PIC, \
N_("Generate code suitable for executables (NOT shared libs)")}, \
{"no-dynamic-no-pic", -MASK_MACHO_DYNAMIC_NO_PIC, ""},
/* The Darwin ABI always includes AltiVec, can't be (validly) turned
off. */
#define SUBTARGET_OVERRIDE_OPTIONS \
do { \
rs6000_altivec_abi = 1; \
rs6000_altivec_vrsave = 1; \
TARGET_ALTIVEC_VRSAVE = 1; \
if (DEFAULT_ABI == ABI_DARWIN) \
{ \
if (MACHO_DYNAMIC_NO_PIC_P) \

33
gcc/config/rs6000/darwin.opt Normal file
View File

@ -0,0 +1,33 @@
; Darwin options for PPC port.
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
m64
Target RejectNegative Mask(64BIT)
Generate 64-bit code
m32
Target RejectNegative InverseMask(64BIT)
Generate 32-bit code
mdynamic-no-pic
Target Report Mask(MACHO_DYNAMIC_NO_PIC)
Generate code suitable for executables (NOT shared libs)

10
gcc/config/rs6000/linux64.h
View File

@ -78,7 +78,7 @@ extern int dot_symbols;
#define SUBSUBTARGET_OVERRIDE_OPTIONS \
do \
{ \
if (rs6000_alignment_string == 0) \
if (!rs6000_explicit_options.alignment) \
rs6000_alignment_flags = MASK_ALIGN_NATURAL; \
if (TARGET_64BIT) \
{ \
@ -214,14 +214,6 @@ extern int dot_symbols;
account for arg save/restore code added just for _mcount. */
#define TARGET_PROFILE_KERNEL (target_flags & MASK_PROFILE_KERNEL)
/* Override sysv4.h. */
#undef EXTRA_SUBTARGET_SWITCHES
#define EXTRA_SUBTARGET_SWITCHES \
{"profile-kernel", MASK_PROFILE_KERNEL, \
N_("Call mcount for profiling before a function prologue") }, \
{"no-profile-kernel", -MASK_PROFILE_KERNEL, \
N_("Call mcount for profiling after a function prologue") },
/* We use glibc _mcount for profiling. */
#define NO_PROFILE_COUNTERS TARGET_64BIT
#define PROFILE_HOOK(LABEL) \

25
gcc/config/rs6000/linux64.opt Normal file
View File

@ -0,0 +1,25 @@
; Options for 64-bit PowerPC Linux.
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
mprofile-kernel
Target Report Mask(PROFILE_KERNEL)
Call mcount for profiling before a function prologue

463
gcc/config/rs6000/rs6000.c
View File

@ -130,11 +130,6 @@ static GTY(()) bool rs6000_always_hint;
/* Schedule instructions for group formation. */
static GTY(()) bool rs6000_sched_groups;
/* Support adjust_priority scheduler hook
and -mprioritize-restricted-insns= option. */
const char *rs6000_sched_restricted_insns_priority_str;
int rs6000_sched_restricted_insns_priority;
/* Support for -msched-costly-dep option. */
const char *rs6000_sched_costly_dep_str;
enum rs6000_dependence_cost rs6000_sched_costly_dep;
@ -147,42 +142,20 @@ enum rs6000_nop_insertion rs6000_sched_insert_nops;
static GTY(()) tree altivec_builtin_mask_for_load;
/* Size of long double */
const char *rs6000_long_double_size_string;
int rs6000_long_double_type_size;
/* Whether -mabi=altivec has appeared */
int rs6000_altivec_abi;
/* Whether VRSAVE instructions should be generated. */
int rs6000_altivec_vrsave;
/* String from -mvrsave= option. */
const char *rs6000_altivec_vrsave_string;
/* Nonzero if we want SPE ABI extensions. */
int rs6000_spe_abi;
/* Whether isel instructions should be generated. */
int rs6000_isel;
/* Whether SPE simd instructions should be generated. */
int rs6000_spe;
/* Nonzero if floating point operations are done in the GPRs. */
int rs6000_float_gprs = 0;
/* Nonzero if we want Darwin's struct-by-value-in-regs ABI. */
int rs6000_darwin64_abi;
/* String from -mfloat-gprs=. */
const char *rs6000_float_gprs_string;
/* String from -misel=. */
const char *rs6000_isel_string;
/* String from -mspe=. */
const char *rs6000_spe_string;
/* Set to nonzero once AIX common-mode calls have been defined. */
static GTY(()) int common_mode_defined;
@ -216,9 +189,6 @@ const char *rs6000_tls_size_string;
/* ABI enumeration available for subtarget to use. */
enum rs6000_abi rs6000_current_abi;
/* ABI string from -mabi= option. */
const char *rs6000_abi_string;
/* Whether to use variant of AIX ABI for PowerPC64 Linux. */
int dot_symbols;
@ -235,9 +205,6 @@ bool rs6000_hard_regno_mode_ok_p[NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
tree rs6000_builtin_types[RS6000_BTI_MAX];
tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT];
int rs6000_warn_altivec_long = 1; /* On by default. */
const char *rs6000_warn_altivec_long_switch;
const char *rs6000_traceback_name;
static enum {
traceback_default = 0,
@ -253,19 +220,20 @@ char toc_label_name[10];
/* Alias set for saves and restores from the rs6000 stack. */
static GTY(()) int rs6000_sr_alias_set;
/* Call distance, overridden by -mlongcall and #pragma longcall(1).
The only place that looks at this is rs6000_set_default_type_attributes;
everywhere else should rely on the presence or absence of a longcall
attribute on the function declaration. Exception: init_cumulative_args
looks at it too, for libcalls. */
int rs6000_default_long_calls;
const char *rs6000_longcall_switch;
/* Control alignment for fields within structures. */
/* String from -malign-XXXXX. */
const char *rs6000_alignment_string;
int rs6000_alignment_flags;
/* True for any options that were explicitly set. */
struct {
bool alignment; /* True if -malign- was used. */
bool abi; /* True if -mabi= was used. */
bool spe; /* True if -mspe= was used. */
bool float_gprs; /* True if -mfloat-gprs= was used. */
bool isel; /* True if -misel was used. */
bool long_double; /* True if -mlong-double- was used. */
} rs6000_explicit_options;
struct builtin_description
{
/* mask is not const because we're going to alter it below. This
@ -700,11 +668,9 @@ static rtx altivec_expand_predicate_builtin (enum insn_code,
const char *, tree, rtx);
static rtx altivec_expand_lv_builtin (enum insn_code, tree, rtx);
static rtx altivec_expand_stv_builtin (enum insn_code, tree);
static void rs6000_parse_abi_options (void);
static void rs6000_parse_alignment_option (void);
static bool rs6000_handle_option (size_t, const char *, int);
static void rs6000_parse_tls_size_option (void);
static void rs6000_parse_yes_no_option (const char *, const char *, int *);
static void rs6000_parse_float_gprs_option (void);
static int first_altivec_reg_to_save (void);
static unsigned int compute_vrsave_mask (void);
static void compute_save_world_info (rs6000_stack_t *info_ptr);
@ -992,6 +958,13 @@ static const char alt_reg_names[][8] =
#undef TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
#define TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN invalid_arg_for_unprototyped_fn
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION rs6000_handle_option
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS \
(TARGET_DEFAULT | MASK_SCHED_PROLOG)
/* MPC604EUM 3.5.2 Weak Consistency between Multiple Processors
The PowerPC architecture requires only weak consistency among
processors--that is, memory accesses between processors need not be
@ -1271,24 +1244,16 @@ rs6000_override_options (const char *default_cpu)
rs6000_traceback_name);
}
/* Set size of long double */
rs6000_long_double_type_size = RS6000_DEFAULT_LONG_DOUBLE_SIZE;
if (rs6000_long_double_size_string)
{
char *tail;
int size = strtol (rs6000_long_double_size_string, &tail, 10);
if (*tail != '\0' || (size != 64 && size != 128))
error ("Unknown switch -mlong-double-%s",
rs6000_long_double_size_string);
else
rs6000_long_double_type_size = size;
}
if (!rs6000_explicit_options.long_double)
rs6000_long_double_type_size = RS6000_DEFAULT_LONG_DOUBLE_SIZE;
/* Set Altivec ABI as default for powerpc64 linux. */
if (TARGET_ELF && TARGET_64BIT)
{
rs6000_altivec_abi = 1;
rs6000_altivec_vrsave = 1;
#if TARGET_ALTIVEC_VRSAVE != 0
TARGET_ALTIVEC_VRSAVE = 1;
#endif
}
/* Set the Darwin64 ABI as default for 64-bit Darwin. */
@ -1302,21 +1267,6 @@ rs6000_override_options (const char *default_cpu)
rs6000_alignment_flags = MASK_ALIGN_NATURAL;
}
/* Handle -mabi= options. */
rs6000_parse_abi_options ();
/* Handle -malign-XXXXX option. */
rs6000_parse_alignment_option ();
rs6000_parse_float_gprs_option ();
/* Handle generic -mFOO=YES/NO options. */
rs6000_parse_yes_no_option ("vrsave", rs6000_altivec_vrsave_string,
&rs6000_altivec_vrsave);
rs6000_parse_yes_no_option ("isel", rs6000_isel_string,
&rs6000_isel);
rs6000_parse_yes_no_option ("spe", rs6000_spe_string, &rs6000_spe);
/* Handle -mtls-size option. */
rs6000_parse_tls_size_option ();
@ -1339,26 +1289,21 @@ rs6000_override_options (const char *default_cpu)
MASK_STRING above when optimizing for size. */
if ((target_flags & MASK_STRING) != 0)
target_flags = target_flags & ~MASK_STRING;
/* No SPE means 64-bit long doubles, even if an E500. */
if (rs6000_spe_string != 0
&& !strcmp (rs6000_spe_string, "no"))
rs6000_long_double_type_size = 64;
}
else if (rs6000_select[1].string != NULL)
{
/* For the powerpc-eabispe configuration, we set all these by
default, so let's unset them if we manually set another
CPU that is not the E500. */
if (rs6000_abi_string == 0)
if (!rs6000_explicit_options.abi)
rs6000_spe_abi = 0;
if (rs6000_spe_string == 0)
if (!rs6000_explicit_options.spe)
rs6000_spe = 0;
if (rs6000_float_gprs_string == 0)
if (!rs6000_explicit_options.float_gprs)
rs6000_float_gprs = 0;
if (rs6000_isel_string == 0)
if (!rs6000_explicit_options.isel)
rs6000_isel = 0;
if (rs6000_long_double_size_string == 0)
if (!rs6000_explicit_options.long_double)
rs6000_long_double_type_size = RS6000_DEFAULT_LONG_DOUBLE_SIZE;
}
@ -1367,43 +1312,18 @@ rs6000_override_options (const char *default_cpu)
rs6000_sched_groups = (rs6000_cpu == PROCESSOR_POWER4
|| rs6000_cpu == PROCESSOR_POWER5);
/* Handle -m(no-)longcall option. This is a bit of a cheap hack,
using TARGET_OPTIONS to handle a toggle switch, but we're out of
bits in target_flags so TARGET_SWITCHES cannot be used.
Assumption here is that rs6000_longcall_switch points into the
text of the complete option, rather than being a copy, so we can
scan back for the presence or absence of the no- modifier. */
if (rs6000_longcall_switch)
{
const char *base = rs6000_longcall_switch;
while (base[-1] != 'm') base--;
if (*rs6000_longcall_switch != '\0')
error ("invalid option %qs", base);
rs6000_default_long_calls = (base[0] != 'n');
}
/* Handle -m(no-)warn-altivec-long similarly. */
if (rs6000_warn_altivec_long_switch)
{
const char *base = rs6000_warn_altivec_long_switch;
while (base[-1] != 'm') base--;
if (*rs6000_warn_altivec_long_switch != '\0')
error ("invalid option %qs", base);
rs6000_warn_altivec_long = (base[0] != 'n');
}
/* Handle -mprioritize-restricted-insns option. */
/* ?? I see no need for this. This variable was always initialized to 0,
except when explicitly set. It's not set in any .h file either.
rs6000_sched_restricted_insns_priority
= (rs6000_sched_groups ? 1 : 0);
if (rs6000_sched_restricted_insns_priority_str)
rs6000_sched_restricted_insns_priority =
atoi (rs6000_sched_restricted_insns_priority_str);
*/
/* Handle -msched-costly-dep option. */
/* ?? Same goes for this. When would rs6000_sched_costly_dep ever have
a nonzero value upon entry to this function. ??
rs6000_sched_costly_dep
= (rs6000_sched_groups ? store_to_load_dep_costly : no_dep_costly);
*/
if (rs6000_sched_costly_dep_str)
{
if (! strcmp (rs6000_sched_costly_dep_str, "no"))
@ -1604,87 +1524,6 @@ rs6000_parse_yes_no_option (const char *name, const char *value, int *flag)
error ("unknown -m%s= option specified: '%s'", name, value);
}
/* Handle -mabi= options. */
static void
rs6000_parse_abi_options (void)
{
if (rs6000_abi_string == 0)
return;
else if (! strcmp (rs6000_abi_string, "altivec"))
{
rs6000_altivec_abi = 1;
rs6000_spe_abi = 0;
}
else if (! strcmp (rs6000_abi_string, "no-altivec"))
rs6000_altivec_abi = 0;
else if (! strcmp (rs6000_abi_string, "spe"))
{
rs6000_spe_abi = 1;
rs6000_altivec_abi = 0;
if (!TARGET_SPE_ABI)
error ("not configured for ABI: '%s'", rs6000_abi_string);
}
/* These are here for testing during development only, do not
document in the manual please. */
else if (! strcmp (rs6000_abi_string, "d64"))
{
rs6000_darwin64_abi = 1;
warning (0, "Using darwin64 ABI");
}
else if (! strcmp (rs6000_abi_string, "d32"))
{
rs6000_darwin64_abi = 0;
warning (0, "Using old darwin ABI");
}
else if (! strcmp (rs6000_abi_string, "no-spe"))
rs6000_spe_abi = 0;
else
error ("unknown ABI specified: '%s'", rs6000_abi_string);
}
/* Handle -mfloat-gprs= options. */
static void
rs6000_parse_float_gprs_option (void)
{
if (rs6000_float_gprs_string == 0)
return;
else if (! strcmp (rs6000_float_gprs_string, "yes")
|| ! strcmp (rs6000_float_gprs_string, "single"))
rs6000_float_gprs = 1;
else if (! strcmp (rs6000_float_gprs_string, "double"))
rs6000_float_gprs = 2;
else if (! strcmp (rs6000_float_gprs_string, "no"))
rs6000_float_gprs = 0;
else
error ("invalid option for -mfloat-gprs");
}
/* Handle -malign-XXXXXX options. */
static void
rs6000_parse_alignment_option (void)
{
if (rs6000_alignment_string == 0)
return;
else if (! strcmp (rs6000_alignment_string, "power"))
{
/* On 64-bit Darwin, power alignment is ABI-incompatible with
some C library functions, so warn about it. The flag may be
useful for performance studies from time to time though, so
don't disable it entirely. */
if (DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT)
warning (0, "-malign-power is not supported for 64-bit Darwin;"
" it is incompatible with the installed C and C++ libraries");
rs6000_alignment_flags = MASK_ALIGN_POWER;
}
else if (! strcmp (rs6000_alignment_string, "natural"))
rs6000_alignment_flags = MASK_ALIGN_NATURAL;
else
error ("unknown -malign-XXXXX option specified: '%s'",
rs6000_alignment_string);
}
/* Validate and record the size specified with the -mtls-size option. */
static void
@ -1706,6 +1545,240 @@ void
optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
{
}
/* Implement TARGET_HANDLE_OPTION. */
static bool
rs6000_handle_option (size_t code, const char *arg, int value)
{
switch (code)
{
case OPT_mno_power:
target_flags &= ~(MASK_POWER | MASK_POWER2
| MASK_MULTIPLE | MASK_STRING);
break;
case OPT_mno_powerpc:
target_flags &= ~(MASK_POWERPC | MASK_PPC_GPOPT
| MASK_PPC_GFXOPT | MASK_POWERPC64);
break;
case OPT_mfull_toc:
target_flags &= ~(MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC
| MASK_NO_SUM_IN_TOC);
#ifdef TARGET_USES_SYSV4_OPT
/* Note, V.4 no longer uses a normal TOC, so make -mfull-toc, be
just the same as -mminimal-toc. */
target_flags |= MASK_MINIMAL_TOC;
#endif
break;
#ifdef TARGET_USES_SYSV4_OPT
case OPT_mtoc:
/* Make -mtoc behave like -mminimal-toc. */
target_flags |= MASK_MINIMAL_TOC;
break;
#endif
#ifdef TARGET_USES_AIX64_OPT
case OPT_maix64:
#else
case OPT_m64:
#endif
target_flags |= MASK_POWERPC64 | MASK_POWERPC | MASK_PPC_GFXOPT;
break;
#ifdef TARGET_USES_AIX64_OPT
case OPT_maix32:
#else
case OPT_m32:
#endif
target_flags &= ~MASK_POWERPC64;
break;
case OPT_minsert_sched_nops_:
rs6000_sched_insert_nops_str = arg;
break;
case OPT_mminimal_toc:
if (value == 1)
{
target_flags &= ~MASK_NO_FP_IN_TOC;
target_flags &= ~MASK_NO_SUM_IN_TOC;
}
break;
case OPT_mpower:
if (value == 1)
target_flags |= (MASK_MULTIPLE | MASK_STRING);
break;
case OPT_mpower2:
if (value == 1)
target_flags |= (MASK_POWER | MASK_MULTIPLE | MASK_STRING);
break;
case OPT_mpowerpc_gpopt:
case OPT_mpowerpc_gfxopt:
if (value == 1)
target_flags |= MASK_POWERPC;
break;
#if TARGET_ALTIVEC_VRSAVE != 0
case OPT_mvrsave_:
rs6000_parse_yes_no_option ("vrsave", arg, &(TARGET_ALTIVEC_VRSAVE));
break;
#endif
case OPT_misel_:
rs6000_explicit_options.isel = true;
rs6000_parse_yes_no_option ("isel", arg, &(rs6000_isel));
break;
case OPT_mspe_:
rs6000_explicit_options.spe = true;
rs6000_parse_yes_no_option ("spe", arg, &(rs6000_spe));
/* No SPE means 64-bit long doubles, even if an E500. */
if (!rs6000_spe)
rs6000_long_double_type_size = 64;
break;
case OPT_mdebug_:
rs6000_debug_name = arg;
break;
#ifdef TARGET_USES_SYSV4_OPT
case OPT_mcall_:
rs6000_abi_name = arg;
break;
case OPT_msdata_:
rs6000_sdata_name = arg;
break;
case OPT_mtls_size_:
rs6000_tls_size_string = arg;
break;
case OPT_mrelocatable:
if (value == 1)
target_flags |= MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC;
break;
case OPT_mrelocatable_lib:
if (value == 1)
target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC
| MASK_NO_FP_IN_TOC;
else
target_flags &= ~MASK_RELOCATABLE;
break;
#endif
case OPT_mabi_:
rs6000_explicit_options.abi = true;
if (!strcmp (arg, "altivec"))
{
rs6000_altivec_abi = 1;
rs6000_spe_abi = 0;
}
else if (! strcmp (arg, "no-altivec"))
rs6000_altivec_abi = 0;
else if (! strcmp (arg, "spe"))
{
rs6000_spe_abi = 1;
rs6000_altivec_abi = 0;
if (!TARGET_SPE_ABI)
error ("not configured for ABI: '%s'", arg);
}
else if (! strcmp (arg, "no-spe"))
rs6000_spe_abi = 0;
/* These are here for testing during development only, do not
document in the manual please. */
else if (! strcmp (arg, "d64"))
{
rs6000_darwin64_abi = 1;
warning (0, "Using darwin64 ABI");
}
else if (! strcmp (arg, "d32"))
{
rs6000_darwin64_abi = 0;
warning (0, "Using old darwin ABI");
}
else
{
error ("unknown ABI specified: '%s'", arg);
return false;
}
break;
case OPT_mcpu_:
rs6000_select[1].string = arg;
break;
case OPT_mtune_:
rs6000_select[2].string = arg;
break;
case OPT_mtraceback_:
rs6000_traceback_name = arg;
break;
case OPT_mfloat_gprs_:
rs6000_explicit_options.float_gprs = true;
if (! strcmp (arg, "yes") || ! strcmp (arg, "single"))
rs6000_float_gprs = 1;
else if (! strcmp (arg, "double"))
rs6000_float_gprs = 2;
else if (! strcmp (arg, "no"))
rs6000_float_gprs = 0;
else
{
error ("invalid option for -mfloat-gprs: '%s'", arg);
return false;
}
break;
case OPT_mlong_double_:
rs6000_explicit_options.long_double = true;
rs6000_long_double_type_size = RS6000_DEFAULT_LONG_DOUBLE_SIZE;
if (value != 64 && value != 128)
{
error ("Unknown switch -mlong-double-%s", arg);
rs6000_long_double_type_size = RS6000_DEFAULT_LONG_DOUBLE_SIZE;
return false;
}
else
rs6000_long_double_type_size = value;
break;
case OPT_msched_costly_dep_:
rs6000_sched_costly_dep_str = arg;
break;
case OPT_malign_:
rs6000_explicit_options.alignment = true;
if (! strcmp (arg, "power"))
{
/* On 64-bit Darwin, power alignment is ABI-incompatible with
some C library functions, so warn about it. The flag may be
useful for performance studies from time to time though, so
don't disable it entirely. */
if (DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT)
warning (0, "-malign-power is not supported for 64-bit Darwin;"
" it is incompatible with the installed C and C++ libraries");
rs6000_alignment_flags = MASK_ALIGN_POWER;
}
else if (! strcmp (arg, "natural"))
rs6000_alignment_flags = MASK_ALIGN_NATURAL;
else
{
error ("unknown -malign-XXXXX option specified: '%s'", arg);
return false;
}
break;
}
return true;
}
/* Do anything needed at the start of the asm file. */

275
gcc/config/rs6000/rs6000.h
View File

@ -128,117 +128,15 @@
/* Architecture type. */
extern int target_flags;
/* Define TARGET_MFCRF if the target assembler does not suppport the
optional field operand for mfcr. */
/* Use POWER architecture instructions and MQ register. */
#define MASK_POWER 0x00000001
/* Use POWER2 extensions to POWER architecture. */
#define MASK_POWER2 0x00000002
/* Use PowerPC architecture instructions. */
#define MASK_POWERPC 0x00000004
/* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */
#define MASK_PPC_GPOPT 0x00000008
/* Use PowerPC Graphics group optional instructions, e.g. fsel. */
#define MASK_PPC_GFXOPT 0x00000010
/* Use PowerPC-64 architecture instructions. */
#define MASK_POWERPC64 0x00000020
/* Use revised mnemonic names defined for PowerPC architecture. */
#define MASK_NEW_MNEMONICS 0x00000040
/* Disable placing fp constants in the TOC; can be turned on when the
TOC overflows. */
#define MASK_NO_FP_IN_TOC 0x00000080
/* Disable placing symbol+offset constants in the TOC; can be turned on when
the TOC overflows. */
#define MASK_NO_SUM_IN_TOC 0x00000100
/* Output only one TOC entry per module. Normally linking fails if
there are more than 16K unique variables/constants in an executable. With
this option, linking fails only if there are more than 16K modules, or
if there are more than 16K unique variables/constant in a single module.
This is at the cost of having 2 extra loads and one extra store per
function, and one less allocable register. */
#define MASK_MINIMAL_TOC 0x00000200
/* Nonzero for the 64 bit ABIs: longs and pointers are 64 bits. The
chip is running in "64-bit mode", in which CR0 is set in dot
operations based on all 64 bits of the register, bdnz works on 64-bit
ctr, lr is 64 bits, and so on. Requires MASK_POWERPC64. */
#define MASK_64BIT 0x00000400
/* Disable use of FPRs. */
#define MASK_SOFT_FLOAT 0x00000800
/* Enable load/store multiple, even on PowerPC */
#define MASK_MULTIPLE 0x00001000
/* Use string instructions for block moves */
#define MASK_STRING 0x00002000
/* Disable update form of load/store */
#define MASK_NO_UPDATE 0x00004000
/* Disable fused multiply/add operations */
#define MASK_NO_FUSED_MADD 0x00008000
/* Nonzero if we need to schedule the prolog and epilog. */
#define MASK_SCHED_PROLOG 0x00010000
/* Use AltiVec instructions. */
#define MASK_ALTIVEC 0x00020000
/* Return small structures in memory (as the AIX ABI requires). */
#define MASK_AIX_STRUCT_RET 0x00040000
/* Use single field mfcr instruction. */
#define MASK_MFCRF 0x00080000
/* The only remaining free bits are 0x00600000. linux64.h uses
0x00100000, and sysv4.h uses 0x00800000 -> 0x40000000.
0x80000000 is not available because target_flags is signed. */
#define TARGET_POWER (target_flags & MASK_POWER)
#define TARGET_POWER2 (target_flags & MASK_POWER2)
#define TARGET_POWERPC (target_flags & MASK_POWERPC)
#define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT)
#define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT)
#define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS)
#define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC)
#define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC)
#define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC)
#define TARGET_64BIT (target_flags & MASK_64BIT)
#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
#define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE)
#define TARGET_STRING (target_flags & MASK_STRING)
#define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE)
#define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD)
#define TARGET_SCHED_PROLOG (target_flags & MASK_SCHED_PROLOG)
#define TARGET_ALTIVEC (target_flags & MASK_ALTIVEC)
#define TARGET_AIX_STRUCT_RET (target_flags & MASK_AIX_STRUCT_RET)
/* Define TARGET_MFCRF if the target assembler supports the optional
field operand for mfcr and the target processor supports the
instruction. */
#ifdef HAVE_AS_MFCRF
#define TARGET_MFCRF (target_flags & MASK_MFCRF)
#else
#ifndef HAVE_AS_MFCRF
#undef TARGET_MFCRF
#define TARGET_MFCRF 0
#endif
#define TARGET_32BIT (! TARGET_64BIT)
#define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
#define TARGET_UPDATE (! TARGET_NO_UPDATE)
#define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD)
/* Emit a dtp-relative reference to a TLS variable. */
@ -258,126 +156,20 @@ extern int target_flags;
#ifdef IN_LIBGCC2
/* For libgcc2 we make sure this is a compile time constant */
#if defined (__64BIT__) || defined (__powerpc64__)
#undef TARGET_POWERPC64
#define TARGET_POWERPC64 1
#else
#undef TARGET_POWERPC64
#define TARGET_POWERPC64 0
#endif
#else
#define TARGET_POWERPC64 (target_flags & MASK_POWERPC64)
/* The option machinery will define this. */
#endif
#define TARGET_XL_COMPAT 0
/* Run-time compilation parameters selecting different hardware subsets.
Macro to define tables used to set the flags.
This is a list in braces of pairs in braces,
each pair being { "NAME", VALUE }
where VALUE is the bits to set or minus the bits to clear.
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
{{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING, \
N_("Use POWER instruction set")}, \
{"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \
| MASK_POWER2), \
N_("Use POWER2 instruction set")}, \
{"no-power2", - MASK_POWER2, \
N_("Do not use POWER2 instruction set")}, \
{"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \
| MASK_STRING), \
N_("Do not use POWER instruction set")}, \
{"powerpc", MASK_POWERPC, \
N_("Use PowerPC instruction set")}, \
{"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \
| MASK_PPC_GFXOPT | MASK_POWERPC64), \
N_("Do not use PowerPC instruction set")}, \
{"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT, \
N_("Use PowerPC General Purpose group optional instructions")},\
{"no-powerpc-gpopt", - MASK_PPC_GPOPT, \
N_("Do not use PowerPC General Purpose group optional instructions")},\
{"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Use PowerPC Graphics group optional instructions")},\
{"no-powerpc-gfxopt", - MASK_PPC_GFXOPT, \
N_("Do not use PowerPC Graphics group optional instructions")},\
{"powerpc64", MASK_POWERPC64, \
N_("Use PowerPC-64 instruction set")}, \
{"no-powerpc64", - MASK_POWERPC64, \
N_("Do not use PowerPC-64 instruction set")}, \
{"altivec", MASK_ALTIVEC , \
N_("Use AltiVec instructions")}, \
{"no-altivec", - MASK_ALTIVEC , \
N_("Do not use AltiVec instructions")}, \
{"new-mnemonics", MASK_NEW_MNEMONICS, \
N_("Use new mnemonics for PowerPC architecture")},\
{"old-mnemonics", -MASK_NEW_MNEMONICS, \
N_("Use old mnemonics for PowerPC architecture")},\
{"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \
| MASK_MINIMAL_TOC), \
N_("Put everything in the regular TOC")}, \
{"fp-in-toc", - MASK_NO_FP_IN_TOC, \
N_("Place floating point constants in TOC")}, \
{"no-fp-in-toc", MASK_NO_FP_IN_TOC, \
N_("Do not place floating point constants in TOC")},\
{"sum-in-toc", - MASK_NO_SUM_IN_TOC, \
N_("Place symbol+offset constants in TOC")}, \
{"no-sum-in-toc", MASK_NO_SUM_IN_TOC, \
N_("Do not place symbol+offset constants in TOC")},\
{"minimal-toc", MASK_MINIMAL_TOC, \
"Use only one TOC entry per procedure"}, \
{"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC), \
""}, \
{"no-minimal-toc", - MASK_MINIMAL_TOC, \
N_("Place variable addresses in the regular TOC")},\
{"hard-float", - MASK_SOFT_FLOAT, \
N_("Use hardware floating point")}, \
{"soft-float", MASK_SOFT_FLOAT, \
N_("Do not use hardware floating point")}, \
{"multiple", MASK_MULTIPLE, \
N_("Generate load/store multiple instructions")}, \
{"no-multiple", - MASK_MULTIPLE, \
N_("Do not generate load/store multiple instructions")},\
{"string", MASK_STRING, \
N_("Generate string instructions for block moves")},\
{"no-string", - MASK_STRING, \
N_("Do not generate string instructions for block moves")},\
{"update", - MASK_NO_UPDATE, \
N_("Generate load/store with update instructions")},\
{"no-update", MASK_NO_UPDATE, \
N_("Do not generate load/store with update instructions")},\
{"fused-madd", - MASK_NO_FUSED_MADD, \
N_("Generate fused multiply/add instructions")},\
{"no-fused-madd", MASK_NO_FUSED_MADD, \
N_("Do not generate fused multiply/add instructions")},\
{"sched-prolog", MASK_SCHED_PROLOG, \
""}, \
{"no-sched-prolog", -MASK_SCHED_PROLOG, \
N_("Do not schedule the start and end of the procedure")},\
{"sched-epilog", MASK_SCHED_PROLOG, \
""}, \
{"no-sched-epilog", -MASK_SCHED_PROLOG, \
""}, \
{"aix-struct-return", MASK_AIX_STRUCT_RET, \
N_("Return all structures in memory (AIX default)")},\
{"svr4-struct-return", - MASK_AIX_STRUCT_RET, \
N_("Return small structures in registers (SVR4 default)")},\
{"no-aix-struct-return", - MASK_AIX_STRUCT_RET, \
""}, \
{"no-svr4-struct-return", MASK_AIX_STRUCT_RET, \
""}, \
{"mfcrf", MASK_MFCRF, \
N_("Generate single field mfcr instruction")}, \
{"no-mfcrf", - MASK_MFCRF, \
N_("Do not generate single field mfcr instruction")},\
SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT | MASK_SCHED_PROLOG, \
""}}
#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING)
/* This is meant to be redefined in the host dependent files */
#define SUBTARGET_SWITCHES
/* Processor type. Order must match cpu attribute in MD file. */
enum processor_type
{
@ -446,46 +238,6 @@ enum group_termination
previous_group
};
/* This is meant to be overridden in target specific files. */
#define SUBTARGET_OPTIONS
#define TARGET_OPTIONS \
{ \
{"cpu=", &rs6000_select[1].string, \
N_("Use features of and schedule code for given CPU"), 0}, \
{"tune=", &rs6000_select[2].string, \
N_("Schedule code for given CPU"), 0}, \
{"debug=", &rs6000_debug_name, N_("Enable debug output"), 0}, \
{"traceback=", &rs6000_traceback_name, \
N_("Select full, part, or no traceback table"), 0}, \
{"abi=", &rs6000_abi_string, N_("Specify ABI to use"), 0}, \
{"long-double-", &rs6000_long_double_size_string, \
N_("Specify size of long double (64 or 128 bits)"), 0}, \
{"isel=", &rs6000_isel_string, \
N_("Specify yes/no if isel instructions should be generated"), 0}, \
{"spe=", &rs6000_spe_string, \
N_("Specify yes/no if SPE SIMD instructions should be generated"), 0},\
{"float-gprs=", &rs6000_float_gprs_string, \
N_("Specify yes/no if using floating point in the GPRs"), 0}, \
{"vrsave=", &rs6000_altivec_vrsave_string, \
N_("Specify yes/no if VRSAVE instructions should be generated for AltiVec"), 0}, \
{"longcall", &rs6000_longcall_switch, \
N_("Avoid all range limits on call instructions"), 0}, \
{"no-longcall", &rs6000_longcall_switch, "", 0}, \
{"warn-altivec-long", &rs6000_warn_altivec_long_switch, \
N_("Warn about deprecated 'vector long ...' AltiVec type usage"), 0}, \
{"no-warn-altivec-long", &rs6000_warn_altivec_long_switch, "", 0}, \
{"sched-costly-dep=", &rs6000_sched_costly_dep_str, \
N_("Determine which dependences between insns are considered costly"), 0}, \
{"insert-sched-nops=", &rs6000_sched_insert_nops_str, \
N_("Specify which post scheduling nop insertion scheme to apply"), 0}, \
{"align-", &rs6000_alignment_string, \
N_("Specify alignment of structure fields default/natural"), 0}, \
{"prioritize-restricted-insns=", &rs6000_sched_restricted_insns_priority_str, \
N_("Specify scheduling priority for dispatch slot restricted insns"), 0}, \
SUBTARGET_OPTIONS \
}
/* Support for a compile-time default CPU, et cetera. The rules are:
--with-cpu is ignored if -mcpu is specified.
--with-tune is ignored if -mtune is specified.
@ -527,25 +279,13 @@ extern int rs6000_spe_abi;
extern int rs6000_isel;
extern int rs6000_spe;
extern int rs6000_float_gprs;
extern const char *rs6000_float_gprs_string;
extern const char *rs6000_isel_string;
extern const char *rs6000_spe_string;
extern const char *rs6000_altivec_vrsave_string;
extern int rs6000_altivec_vrsave;
extern const char *rs6000_longcall_switch;
extern int rs6000_default_long_calls;
extern const char* rs6000_alignment_string;
extern int rs6000_alignment_flags;
extern const char *rs6000_sched_restricted_insns_priority_str;
extern int rs6000_sched_restricted_insns_priority;
extern const char *rs6000_sched_costly_dep_str;
extern enum rs6000_dependence_cost rs6000_sched_costly_dep;
extern const char *rs6000_sched_insert_nops_str;
extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
extern int rs6000_warn_altivec_long;
extern const char *rs6000_warn_altivec_long_switch;
/* Alignment options for fields in structures for sub-targets following
AIX-like ABI.
ALIGN_POWER word-aligns FP doubles (default AIX ABI).
@ -565,7 +305,6 @@ extern const char *rs6000_warn_altivec_long_switch;
#define TARGET_LONG_DOUBLE_128 (rs6000_long_double_type_size == 128)
#define TARGET_ALTIVEC_ABI rs6000_altivec_abi
#define TARGET_ALTIVEC_VRSAVE rs6000_altivec_vrsave
#define TARGET_SPE_ABI 0
#define TARGET_SPE 0

225
gcc/config/rs6000/rs6000.opt Normal file
View File

@ -0,0 +1,225 @@
; Options for the rs6000 port of the compiler
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
mpower
Target Report RejectNegative Mask(POWER)
Use POWER instruction set
mno-power
Target Report RejectNegative
Do not use POWER instruction set
mpower2
Target Report Mask(POWER2)
Use POWER2 instruction set
mpowerpc
Target Report RejectNegative Mask(POWERPC)
Use PowerPC instruction set
mno-powerpc
Target Report RejectNegative
Do not use PowerPC instruction set
mpowerpc64
Target Report Mask(POWERPC64)
Use PowerPC-64 instruction set
maltivec
Target Report Mask(ALTIVEC)
Use AltiVec instructions
mnew-mnemonics
Target Report RejectNegative Mask(NEW_MNEMONICS)
Use new mnemonics for PowerPC architecture
mold-mnemonics
Target Report RejectNegative InverseMask(NEW_MNEMONICS)
Use old mnemonics for PowerPC architecture
mno-fp-in-toc
Target Report RejectNegative Mask(NO_FP_IN_TOC)
Do not place floating point constants in TOC
mfp-in-toc
Target Report RejectNegative InverseMask(NO_FP_IN_TOC)
Place floating point constants in TOC
mno-sum-in-toc
Target RejectNegative Mask(NO_SUM_IN_TOC)
Do not place symbol+offset constants in TOC
msum-in-toc
Target RejectNegative InverseMask(NO_SUM_IN_TOC)
Place symbol+offset constants in TOC
;; ?? Where should we put documentation like this ??
;;
; Output only one TOC entry per module. Normally linking fails if
; there are more than 16K unique variables/constants in an executable. With
; this option, linking fails only if there are more than 16K modules, or
; if there are more than 16K unique variables/constant in a single module.
;
; This is at the cost of having 2 extra loads and one extra store per
; function, and one less allocable register.
mminimal-toc
Target Report Mask(MINIMAL_TOC)
Use only one TOC entry per procedure
msoft-float
Target Report RejectNegative Mask(SOFT_FLOAT)
Do not use hardware floating point
mhard-float
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
Use hardware floating point
mmultiple
Target Report Mask(MULTIPLE)
Generate load/store multiple instructions
mstring
Target Report Mask(STRING)
Generate string instructions for block moves
mno-update
Target Report RejectNegative Mask(NO_UPDATE)
Do not generate load/store with update instructions
mupdate
Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
Generate load/store with update instructions
mno-fused-madd
Target Report RejectNegative Mask(NO_FUSED_MADD)
Do not generate fused multiply/add instructions
mfused-madd
Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
Generate fused multiply/add instructions
msched-prolog
Target Report Mask(SCHED_PROLOG)
Schedule the start and end of the procedure
msched-epilog
Target Undocumented Mask(SCHED_PROLOG) MaskExists
maix-struct-return
Target Report Mask(AIX_STRUCT_RET)
Return all structures in memory (AIX default)
msvr4-struct-return
Target Report InverseMask(AIX_STRUCT_RET)
Return small structures in registers (SVR4 default)
mmfcrf
Target Report Mask(MFCRF)
Generate single field mfcr instruction
mpowerpc-gpopt
Target Report Mask(PPC_GPOPT)
Use PowerPC General Purpose group optional instructions
mpowerpc-gfxopt
Target Report Mask(PPC_GFXOPT)
Use PowerPC Graphics group optional instructions
mfull-toc
Target Report
Put everything in the regular TOC
mvrsave
Target Report Var(TARGET_ALTIVEC_VRSAVE)
Generate VRSAVE instructions when generating AltiVec code
mvrsave=
Target RejectNegative Joined
-mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead.
misel
Target Var(rs6000_isel)
Generate isel instructions
misel=
Target RejectNegative Joined
-misel=yes/no Deprecated option. Use -misel/-mno-isel instead
mspe
Target Var(rs6000_spe)
Generate SPE SIMD instructions on E500
mspe=
Target RejectNegative Joined
-mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead
mdebug=
Target RejectNegative Joined
-mdebug= Enable debug output
mabi=
Target RejectNegative Joined
-mabi= Specify ABI to use
mcpu=
Target RejectNegative Joined
-mcpu= Use features of and schedule code for given CPU
mtune=
Target RejectNegative Joined
-mtune= Schedule code for given CPU
mtraceback=
Target RejectNegative Joined
-mtraceback= Select full, part, or no traceback table
mlongcall
Target Report Var(rs6000_default_long_calls)
Avoid all range limits on call instructions
mwarn-altivec-long
Target Var(rs6000_warn_altivec_long) Init(1)
Warn about deprecated 'vector long ...' AltiVec type usage
mfloat-gprs=
Target RejectNegative Joined
-mfloat-gprs= Select GPR floating point method.
mlong-double-
Target RejectNegative Joined UInteger
-mlong-double-<n> Specify size of long double (64 or 128 bits)
msched-costly-dep=
Target RejectNegative Joined
Determine which dependences between insns are considered costly
minsert-sched-nops=
Target RejectNegative Joined
Specify which post scheduling nop insertion scheme to apply
malign-
Target RejectNegative Joined
Specify alignment of structure fields default/natural
mprioritize-restricted-insns=
Target RejectNegative Joined Uinteger Var(rs6000_sched_restricted_insns_priority)
Specify scheduling priority for dispatch slot restricted insns

96
gcc/config/rs6000/sysv4.h
View File

@ -47,24 +47,6 @@ enum rs6000_sdata_type {
extern enum rs6000_sdata_type rs6000_sdata;
/* V.4/eabi switches. */
#define MASK_NO_BITFIELD_TYPE 0x40000000 /* Set PCC_BITFIELD_TYPE_MATTERS to 0. */
#define MASK_STRICT_ALIGN 0x20000000 /* Set STRICT_ALIGNMENT to 1. */
#define MASK_RELOCATABLE 0x10000000 /* GOT pointers are PC relative. */
#define MASK_EABI 0x08000000 /* Adhere to eabi, not System V spec. */
#define MASK_LITTLE_ENDIAN 0x04000000 /* Target is little endian. */
#define MASK_REGNAMES 0x02000000 /* Use alternate register names. */
#define MASK_PROTOTYPE 0x01000000 /* Only prototyped fcns pass variable args. */
#define MASK_NO_BITFIELD_WORD 0x00800000 /* Bitfields cannot cross word boundaries */
#define TARGET_NO_BITFIELD_TYPE (target_flags & MASK_NO_BITFIELD_TYPE)
#define TARGET_STRICT_ALIGN (target_flags & MASK_STRICT_ALIGN)
#define TARGET_RELOCATABLE (target_flags & MASK_RELOCATABLE)
#define TARGET_EABI (target_flags & MASK_EABI)
#define TARGET_LITTLE_ENDIAN (target_flags & MASK_LITTLE_ENDIAN)
#define TARGET_REGNAMES (target_flags & MASK_REGNAMES)
#define TARGET_PROTOTYPE (target_flags & MASK_PROTOTYPE)
#define TARGET_NO_BITFIELD_WORD (target_flags & MASK_NO_BITFIELD_WORD)
#define TARGET_TOC ((target_flags & MASK_64BIT) \
|| ((target_flags & (MASK_RELOCATABLE \
| MASK_MINIMAL_TOC)) \
@ -77,87 +59,12 @@ extern enum rs6000_sdata_type rs6000_sdata;
#define TARGET_NO_TOC (! TARGET_TOC)
#define TARGET_NO_EABI (! TARGET_EABI)
/* Strings provided by SUBTARGET_OPTIONS */
extern const char *rs6000_abi_name;
extern const char *rs6000_sdata_name;
extern const char *rs6000_tls_size_string; /* For -mtls-size= */
/* Override rs6000.h definition. */
#undef SUBTARGET_OPTIONS
#define SUBTARGET_OPTIONS \
{ "call-", &rs6000_abi_name, N_("Select ABI calling convention"), 0}, \
{ "sdata=", &rs6000_sdata_name, N_("Select method for sdata handling"), 0}, \
{ "tls-size=", &rs6000_tls_size_string, \
N_("Specify bit size of immediate TLS offsets"), 0 }
#define SDATA_DEFAULT_SIZE 8
/* Note, V.4 no longer uses a normal TOC, so make -mfull-toc, be just
the same as -mminimal-toc. */
/* Override rs6000.h definition. */
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{ "bit-align", -MASK_NO_BITFIELD_TYPE, \
N_("Align to the base type of the bit-field") }, \
{ "no-bit-align", MASK_NO_BITFIELD_TYPE, \
N_("Don't align to the base type of the bit-field") }, \
{ "strict-align", MASK_STRICT_ALIGN, \
N_("Don't assume that unaligned accesses are handled by the system") }, \
{ "no-strict-align", -MASK_STRICT_ALIGN, \
N_("Assume that unaligned accesses are handled by the system") }, \
{ "relocatable", MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC, \
N_("Produce code relocatable at runtime") }, \
{ "no-relocatable", -MASK_RELOCATABLE, \
N_("Don't produce code relocatable at runtime") }, \
{ "relocatable-lib", MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC, \
N_("Produce code relocatable at runtime") }, \
{ "no-relocatable-lib", -MASK_RELOCATABLE, \
N_("Don't produce code relocatable at runtime") }, \
{ "little-endian", MASK_LITTLE_ENDIAN, \
N_("Produce little endian code") }, \
{ "little", MASK_LITTLE_ENDIAN, \
N_("Produce little endian code") }, \
{ "big-endian", -MASK_LITTLE_ENDIAN, \
N_("Produce big endian code") }, \
{ "big", -MASK_LITTLE_ENDIAN, \
N_("Produce big endian code") }, \
{ "no-toc", 0, N_("no description yet") }, \
{ "toc", MASK_MINIMAL_TOC, N_("no description yet") }, \
{ "full-toc", MASK_MINIMAL_TOC, N_("no description yet") }, \
{ "prototype", MASK_PROTOTYPE, N_("no description yet") }, \
{ "no-prototype", -MASK_PROTOTYPE, N_("no description yet") }, \
{ "no-traceback", 0, N_("no description yet") }, \
{ "eabi", MASK_EABI, N_("Use EABI") }, \
{ "no-eabi", -MASK_EABI, N_("Don't use EABI") }, \
{ "bit-word", -MASK_NO_BITFIELD_WORD, "" }, \
{ "no-bit-word", MASK_NO_BITFIELD_WORD, \
N_("Do not allow bit-fields to cross word boundaries") }, \
{ "regnames", MASK_REGNAMES, \
N_("Use alternate register names") }, \
{ "no-regnames", -MASK_REGNAMES, \
N_("Don't use alternate register names") }, \
{ "sdata", 0, N_("no description yet") }, \
{ "no-sdata", 0, N_("no description yet") }, \
{ "sim", 0, \
N_("Link with libsim.a, libc.a and sim-crt0.o") }, \
{ "ads", 0, \
N_("Link with libads.a, libc.a and crt0.o") }, \
{ "yellowknife", 0, \
N_("Link with libyk.a, libc.a and crt0.o") }, \
{ "mvme", 0, \
N_("Link with libmvme.a, libc.a and crt0.o") }, \
{ "emb", 0, \
N_("Set the PPC_EMB bit in the ELF flags header") }, \
{ "windiss", 0, N_("Use the WindISS simulator") }, \
{ "shlib", 0, N_("no description yet") }, \
{ "64", MASK_64BIT | MASK_POWERPC64 \
| MASK_POWERPC | MASK_PPC_GFXOPT, \
N_("Generate 64-bit code") }, \
{ "32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Generate 32-bit code") }, \
EXTRA_SUBTARGET_SWITCHES \
{ "newlib", 0, N_("no description yet") },
/* This is meant to be redefined in the host dependent files. */
#define EXTRA_SUBTARGET_SWITCHES
@ -1371,3 +1278,6 @@ ncrtn.o%s"
/* Generate entries in .fixup for relocatable addresses. */
#define RELOCATABLE_NEEDS_FIXUP 1
/* This target uses the sysv4.opt file. */
#define TARGET_USES_SYSV4_OPT 1

142
gcc/config/rs6000/sysv4.opt Normal file
View File

@ -0,0 +1,142 @@
; SYSV4 options for PPC port.
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
mcall-
Target RejectNegative Joined
Select ABI calling convention
msdata=
Target RejectNegative Joined
Select method for sdata handling
mtls-size=
Target RejectNegative Joined
Specify bit size of immediate TLS offsets
mbit-align
Target Report Mask(NO_BITFIELD_TYPE)
Align to the base type of the bit-field
mstrict-align
Target Report Mask(STRICT_ALIGN)
Align to the base type of the bit-field
Don't assume that unaligned accesses are handled by the system
mrelocatable
Target Report Mask(RELOCATABLE)
Produce code relocatable at runtime
mrelocatable-lib
Target
Produce code relocatable at runtime
mlittle-endian
Target Report RejectNegative Mask(LITTLE_ENDIAN)
Produce little endian code
; FIXME: Need a way to specify an alias.
;mlittle
;Target Report RejectNegative Mask(LITTLE_ENDIAN)
;Produce little endian code
mbig-endian
Target Report RejectNegative InverseMask(LITTLE_ENDIAN)
Produce big endian code
mbig
Target Report RejectNegative InverseMask(LITTLE_ENDIAN)
Produce big endian code
;; FIXME: This does nothing. What should be done?
mno-toc
Target RejectNegative
no description yet
mtoc
Target RejectNegative
no description yet
mprototype
Target Mask(PROTOTYPE)
no description yet
;; FIXME: Does nothing.
mno-traceback
Target RejectNegative
no description yet
meabi
Target Report Mask(EABI)
Use EABI
mbit-word
Target Report Mask(NO_BITFIELD_WORD)
Allow bit-fields to cross word boundaries
mrenames
Target Mask(REGNAMES)
Use alternate register names
;; FIXME: Does nothing.
msdata
Target
no description yet
msim
Target RejectNegative
Link with libsim.a, libc.a and sim-crt0.o
mads
Target RejectNegative
Link with libads.a, libc.a and crt0.o
myellowknife
Target RejectNegative
Link with libyk.a, libc.a and crt0.o
mmvme
Target RejectNegative
Link with libmvme.a, libc.a and crt0.o
memb
Target RejectNegative
Set the PPC_EMB bit in the ELF flags header
mwindiss
Target RejectNegative
Use the WindISS simulator
mshlib
Target RejectNegative
no description yet
m64
Target Report RejectNegative Mask(64BIT)
Generate 64-bit code
m32
Target Report RejectNegative InverseMask(64BIT)
Generate 32-bit code
mnewlib
Target RejectNegative
no description yet

44
gcc/doc/invoke.texi
View File

@ -630,10 +630,12 @@ See RS/6000 and PowerPC Options.
-minsert-sched-nops=@var{scheme} @gol
-mcall-sysv -mcall-netbsd @gol
-maix-struct-return -msvr4-struct-return @gol
-mabi=altivec -mabi=no-altivec @gol
-mabi=spe -mabi=no-spe @gol
-mabi=@var{abi-type} @gol
-misel -mno-isel @gol
-misel=yes -misel=no @gol
-mspe -mno-spe @gol
-mspe=yes -mspe=no @gol
-mvrsave -mno-vrsave @gol
-mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol
-mprototype -mno-prototype @gol
-msim -mmvme -mads -myellowknife -memb -msdata @gol
@ -10649,6 +10651,12 @@ the AltiVec instruction set. You may also need to set
@option{-mabi=altivec} to adjust the current ABI with AltiVec ABI
enhancements.
@item -mvrsave
@item -mno-vrsave
@opindex mvrsave
@opindex mno-vrsave
Generate VRSAVE instructions when generating AltiVec code.
@item -mabi=spe
@opindex mabi=spe
Extend the current ABI with SPE ABI extensions. This does not change
@ -10659,17 +10667,27 @@ ABI@.
@opindex mabi=no-spe
Disable Booke SPE ABI extensions for the current ABI@.
@item -misel=@var{yes/no}
@itemx -misel
@item -misel
@itemx -mno-isel
@opindex misel
@opindex mno-isel
This switch enables or disables the generation of ISEL instructions.
@item -mspe=@var{yes/no}
@itemx -mspe
@item -misel=@var{yes/no}
This switch has been deprecated. Use @option{-misel} and
@option{-mno-isel} instead.
@item -mspe
@itemx -mno-isel
@opindex mspe
@opindex mno-spe
This switch enables or disables the generation of SPE simd
instructions.
@item -mspe=@var{yes/no}
This option has been deprecated. Use @option{-mspe} and
@option{-mno-spe} instead.
@item -mfloat-gprs=@var{yes/single/double/no}
@itemx -mfloat-gprs
@opindex mfloat-gprs
@ -10986,15 +11004,11 @@ Return all structures in memory (as specified by the AIX ABI)@.
Return structures smaller than 8 bytes in registers (as specified by the
SVR4 ABI)@.
@item -mabi=altivec
@opindex mabi=altivec
Extend the current ABI with AltiVec ABI extensions. This does not
change the default ABI, instead it adds the AltiVec ABI extensions to
the current ABI@.
@item -mabi=no-altivec
@opindex mabi=no-altivec
Disable AltiVec ABI extensions for the current ABI@.
@item -mabi=@var{abi-type}
@opindex mabi
Extend the current ABI with a particular extension, or remove such extension.
Valid values are @var{altivec}, @var{no-altivec}, @var{spe},
@var{no-spe}@.
@item -mprototype
@itemx -mno-prototype