ia64.md: Move all define_predicate's ...
* config/ia64/ia64.md: Move all define_predicate's ... * config/ia64/predicates.md: ... here. New file. From-SVN: r91414
This commit is contained in:
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@ -1,3 +1,8 @@
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2004-11-27 Richard Henderson <rth@redhat.com>
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* config/ia64/ia64.md: Move all define_predicate's ...
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* config/ia64/predicates.md: ... here. New file.
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2004-11-27 Per Bothner <per@bothner.com>
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PR bootstrap/18142
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@ -90,347 +90,8 @@
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(UNSPECV_PSAC_NORMAL 6)
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(UNSPECV_SETJMP_RECEIVER 7)
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])
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;; ::::::::::::::::::::
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;; ::
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;; :: Predicates
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;; ::
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;; ::::::::::::::::::::
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;; True if OP is a valid operand for the MEM of a CALL insn.
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(define_predicate "call_operand"
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(ior (match_code "symbol_ref")
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(match_operand 0 "register_operand")))
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;; True if OP refers to any kind of symbol.
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;; For roughly the same reasons that pmode_register_operand exists, this
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;; predicate ignores its mode argument.
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(define_special_predicate "symbolic_operand"
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(match_code "symbol_ref,const,label_ref"))
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;; True if OP is a SYMBOL_REF which refers to a function.
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(define_predicate "function_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_FUNCTION_P (op)")))
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;; True if OP refers to a symbol, and is appropriate for a GOT load.
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(define_predicate "got_symbolic_operand"
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(match_operand 0 "symbolic_operand" "")
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{
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switch (GET_CODE (op))
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{
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case LABEL_REF:
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return true;
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case SYMBOL_REF:
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/* This sort of load should not be used for things in sdata. */
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return !SYMBOL_REF_SMALL_ADDR_P (op);
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case CONST:
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/* Accept only (plus (symbol_ref) (const_int)). */
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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/* Ok if we're not using GOT entries at all. */
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if (TARGET_NO_PIC || TARGET_AUTO_PIC)
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return true;
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/* The low 14 bits of the constant have been forced to zero
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by ia64_expand_load_address, so that we do not use up so
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many GOT entries. Prevent cse from undoing this. */
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op = XEXP (op, 1);
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return (INTVAL (op) & 0x3fff) == 0;
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default:
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abort ();
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}
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})
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;; True if OP refers to a symbol in the sdata section.
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(define_predicate "sdata_symbolic_operand"
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(match_code "symbol_ref,const")
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{
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switch (GET_CODE (op))
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{
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case CONST:
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF)
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return false;
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op = XEXP (op, 0);
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/* FALLTHRU */
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case SYMBOL_REF:
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if (CONSTANT_POOL_ADDRESS_P (op))
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return GET_MODE_SIZE (get_pool_mode (op)) <= ia64_section_threshold;
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else
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return SYMBOL_REF_LOCAL_P (op) && SYMBOL_REF_SMALL_P (op);
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default:
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abort ();
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}
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})
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;; Like nonimmediate_operand, but don't allow MEMs that try to use a
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;; POST_MODIFY with a REG as displacement.
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(define_predicate "destination_operand"
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(and (match_operand 0 "nonimmediate_operand")
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(match_test "GET_CODE (op) != MEM
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|| GET_CODE (XEXP (op, 0)) != POST_MODIFY
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|| GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 1)) != REG")))
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;; Like memory_operand, but don't allow post-increments.
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(define_predicate "not_postinc_memory_operand"
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(and (match_operand 0 "memory_operand")
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(match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
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;; True if OP is a general operand, excluding tls symbolic operands.
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(define_predicate "move_operand"
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(and (match_operand 0 "general_operand")
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(not (match_test
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"GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (op)"))))
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;; True if OP is a register operand that is (or could be) a GR reg.
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(define_predicate "gr_register_operand"
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(match_operand 0 "register_operand")
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{
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unsigned int regno;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
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})
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;; True if OP is a register operand that is (or could be) an FR reg.
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(define_predicate "fr_register_operand"
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(match_operand 0 "register_operand")
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{
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unsigned int regno;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
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})
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;; True if OP is a register operand that is (or could be) a GR/FR reg.
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(define_predicate "grfr_register_operand"
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(match_operand 0 "register_operand")
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{
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unsigned int regno;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER
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|| GENERAL_REGNO_P (regno)
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|| FR_REGNO_P (regno));
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})
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;; True if OP is a nonimmediate operand that is (or could be) a GR reg.
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(define_predicate "gr_nonimmediate_operand"
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(match_operand 0 "nonimmediate_operand")
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{
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unsigned int regno;
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if (GET_CODE (op) == MEM)
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return true;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
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})
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;; True if OP is a nonimmediate operand that is (or could be) a FR reg.
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(define_predicate "fr_nonimmediate_operand"
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(match_operand 0 "nonimmediate_operand")
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{
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unsigned int regno;
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if (GET_CODE (op) == MEM)
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return true;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
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})
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;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg.
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(define_predicate "grfr_nonimmediate_operand"
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(match_operand 0 "nonimmediate_operand")
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{
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unsigned int regno;
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if (GET_CODE (op) == MEM)
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return true;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER
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|| GENERAL_REGNO_P (regno)
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|| FR_REGNO_P (regno));
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})
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;; True if OP is a GR register operand, or zero.
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(define_predicate "gr_reg_or_0_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "op == const0_rtx"))))
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;; True if OP is a GR register operand, or a 5 bit immediate operand.
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(define_predicate "gr_reg_or_5bit_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))))
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;; True if OP is a GR register operand, or a 6 bit immediate operand.
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(define_predicate "gr_reg_or_6bit_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_M (INTVAL (op))"))))
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;; True if OP is a GR register operand, or an 8 bit immediate operand.
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(define_predicate "gr_reg_or_8bit_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_K (INTVAL (op))"))))
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;; True if OP is a GR/FR register operand, or an 8 bit immediate operand.
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(define_predicate "grfr_reg_or_8bit_operand"
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(ior (match_operand 0 "grfr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_K (INTVAL (op))"))))
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;; True if OP is a register operand, or an 8 bit adjusted immediate operand.
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(define_predicate "gr_reg_or_8bit_adjusted_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_L (INTVAL (op))"))))
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;; True if OP is a register operand, or is valid for both an 8 bit
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;; immediate and an 8 bit adjusted immediate operand. This is necessary
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;; because when we emit a compare, we don't know what the condition will be,
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;; so we need the union of the immediates accepted by GT and LT.
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(define_predicate "gr_reg_or_8bit_and_adjusted_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_K (INTVAL (op))
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&& CONST_OK_FOR_L (INTVAL (op))"))))
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;; True if OP is a register operand, or a 14 bit immediate operand.
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(define_predicate "gr_reg_or_14bit_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_I (INTVAL (op))"))))
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;; True if OP is a register operand, or a 22 bit immediate operand.
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(define_predicate "gr_reg_or_22bit_operand"
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(ior (match_operand 0 "gr_register_operand")
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_J (INTVAL (op))"))))
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;; True if OP is a 7 bit immediate operand.
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(define_predicate "dshift_count_operand"
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(and (match_code "const_int")
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(match_test "INTVAL (op) >= 0 && INTVAL (op) < 128")))
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;; True if OP is a 6 bit immediate operand.
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(define_predicate "shift_count_operand"
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(and (match_code "const_int")
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(match_test "CONST_OK_FOR_M (INTVAL (op))")))
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;; True if OP is a 5 bit immediate operand.
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(define_predicate "shift_32bit_count_operand"
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(and (match_code "const_int")
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(match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))
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;; True if OP is one of the immediate values 2, 4, 8, or 16.
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(define_predicate "shladd_operand"
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(and (match_code "const_int")
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(match_test "INTVAL (op) == 2 || INTVAL (op) == 4 ||
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INTVAL (op) == 8 || INTVAL (op) == 16")))
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;; True if OP is one of the immediate values -16, -8, -4, -1, 1, 4, 8, 16.
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(define_predicate "fetchadd_operand"
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(and (match_code "const_int")
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(match_test "INTVAL (op) == -16 || INTVAL (op) == -8 ||
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INTVAL (op) == -4 || INTVAL (op) == -1 ||
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INTVAL (op) == 1 || INTVAL (op) == 4 ||
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INTVAL (op) == 8 || INTVAL (op) == 16")))
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;; True if OP is a floating-point constant zero, one, or a register.
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(define_predicate "fr_reg_or_fp01_operand"
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(ior (match_operand 0 "fr_register_operand")
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(and (match_code "const_double")
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(match_test "CONST_DOUBLE_OK_FOR_G (op)"))))
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;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs.
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(define_predicate "xfreg_or_fp01_operand"
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(and (match_operand 0 "fr_reg_or_fp01_operand")
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(not (match_code "subreg"))))
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;; True if this is a comparison operator, which accepts a normal 8-bit
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;; signed immediate operand.
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(define_predicate "normal_comparison_operator"
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(match_code "eq,ne,gt,le,gtu,leu"))
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;; True if this is a comparison operator, which accepts an adjusted 8-bit
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;; signed immediate operand.
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(define_predicate "adjusted_comparison_operator"
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(match_code "lt,ge,ltu,geu"))
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;; True if this is a signed inequality operator.
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(define_predicate "signed_inequality_operator"
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(match_code "ge,gt,le,lt"))
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;; True if this operator is valid for predication.
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(define_predicate "predicate_operator"
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(match_code "eq,ne"))
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;; True if this operator can be used in a conditional operation.
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(define_predicate "condop_operator"
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(match_code "plus,minus,ior,xor,and"))
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;; These three are hardware registers that can only be addressed in
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;; DImode. It's not strictly necessary to test mode == DImode here,
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;; but it makes decent insurance against someone writing a
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;; match_operand wrong.
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;; True if this is the ar.lc register.
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(define_predicate "ar_lc_reg_operand"
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(and (match_code "reg")
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(match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM")))
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;; True if this is the ar.ccv register.
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(define_predicate "ar_ccv_reg_operand"
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(and (match_code "reg")
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(match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM")))
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;; True if this is the ar.pfs register.
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(define_predicate "ar_pfs_reg_operand"
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(and (match_code "reg")
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(match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM")))
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;; True if OP is valid as a base register in a reg + offset address.
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;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected
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;; checks from pa.c basereg_operand as well? Seems to be OK without them
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;; in test runs.
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(define_predicate "basereg_operand"
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(match_operand 0 "register_operand")
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{
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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return REG_POINTER (op);
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})
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(include "predicates.md")
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;; ::::::::::::::::::::
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;; ::
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@ -501,7 +162,6 @@
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(define_attr "empty" "no,yes" (const_string "no"))
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;; DFA descriptions of ia64 processors used for insn scheduling and
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;; bundling.
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@ -512,9 +172,6 @@
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(automata_option "w")
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;;(automata_option "no-minimization")
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(include "itanium1.md")
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(include "itanium2.md")
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@ -0,0 +1,354 @@
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;; Predicate definitions for IA-64.
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;; Copyright (C) 2004 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
|
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;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 59 Temple Place - Suite 330,
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;; Boston, MA 02111-1307, USA.
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;; True if OP is a valid operand for the MEM of a CALL insn.
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(define_predicate "call_operand"
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(ior (match_code "symbol_ref")
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(match_operand 0 "register_operand")))
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;; True if OP refers to any kind of symbol.
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;; For roughly the same reasons that pmode_register_operand exists, this
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;; predicate ignores its mode argument.
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(define_special_predicate "symbolic_operand"
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(match_code "symbol_ref,const,label_ref"))
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;; True if OP is a SYMBOL_REF which refers to a function.
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(define_predicate "function_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_FUNCTION_P (op)")))
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;; True if OP refers to a symbol, and is appropriate for a GOT load.
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(define_predicate "got_symbolic_operand"
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(match_operand 0 "symbolic_operand" "")
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{
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switch (GET_CODE (op))
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{
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case LABEL_REF:
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return true;
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case SYMBOL_REF:
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/* This sort of load should not be used for things in sdata. */
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return !SYMBOL_REF_SMALL_ADDR_P (op);
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case CONST:
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/* Accept only (plus (symbol_ref) (const_int)). */
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
|
||||
|| GET_CODE (XEXP (op, 1)) != CONST_INT)
|
||||
return false;
|
||||
|
||||
/* Ok if we're not using GOT entries at all. */
|
||||
if (TARGET_NO_PIC || TARGET_AUTO_PIC)
|
||||
return true;
|
||||
|
||||
/* The low 14 bits of the constant have been forced to zero
|
||||
by ia64_expand_load_address, so that we do not use up so
|
||||
many GOT entries. Prevent cse from undoing this. */
|
||||
op = XEXP (op, 1);
|
||||
return (INTVAL (op) & 0x3fff) == 0;
|
||||
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
})
|
||||
|
||||
;; True if OP refers to a symbol in the sdata section.
|
||||
(define_predicate "sdata_symbolic_operand"
|
||||
(match_code "symbol_ref,const")
|
||||
{
|
||||
switch (GET_CODE (op))
|
||||
{
|
||||
case CONST:
|
||||
op = XEXP (op, 0);
|
||||
if (GET_CODE (op) != PLUS
|
||||
|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF)
|
||||
return false;
|
||||
op = XEXP (op, 0);
|
||||
/* FALLTHRU */
|
||||
|
||||
case SYMBOL_REF:
|
||||
if (CONSTANT_POOL_ADDRESS_P (op))
|
||||
return GET_MODE_SIZE (get_pool_mode (op)) <= ia64_section_threshold;
|
||||
else
|
||||
return SYMBOL_REF_LOCAL_P (op) && SYMBOL_REF_SMALL_P (op);
|
||||
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
})
|
||||
|
||||
;; Like nonimmediate_operand, but don't allow MEMs that try to use a
|
||||
;; POST_MODIFY with a REG as displacement.
|
||||
(define_predicate "destination_operand"
|
||||
(and (match_operand 0 "nonimmediate_operand")
|
||||
(match_test "GET_CODE (op) != MEM
|
||||
|| GET_CODE (XEXP (op, 0)) != POST_MODIFY
|
||||
|| GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 1)) != REG")))
|
||||
|
||||
;; Like memory_operand, but don't allow post-increments.
|
||||
(define_predicate "not_postinc_memory_operand"
|
||||
(and (match_operand 0 "memory_operand")
|
||||
(match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
|
||||
|
||||
;; True if OP is a general operand, excluding tls symbolic operands.
|
||||
(define_predicate "move_operand"
|
||||
(and (match_operand 0 "general_operand")
|
||||
(not (match_test
|
||||
"GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (op)"))))
|
||||
|
||||
;; True if OP is a register operand that is (or could be) a GR reg.
|
||||
(define_predicate "gr_register_operand"
|
||||
(match_operand 0 "register_operand")
|
||||
{
|
||||
unsigned int regno;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
regno = REGNO (op);
|
||||
return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
|
||||
})
|
||||
|
||||
;; True if OP is a register operand that is (or could be) an FR reg.
|
||||
(define_predicate "fr_register_operand"
|
||||
(match_operand 0 "register_operand")
|
||||
{
|
||||
unsigned int regno;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
regno = REGNO (op);
|
||||
return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
|
||||
})
|
||||
|
||||
;; True if OP is a register operand that is (or could be) a GR/FR reg.
|
||||
(define_predicate "grfr_register_operand"
|
||||
(match_operand 0 "register_operand")
|
||||
{
|
||||
unsigned int regno;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
regno = REGNO (op);
|
||||
return (regno >= FIRST_PSEUDO_REGISTER
|
||||
|| GENERAL_REGNO_P (regno)
|
||||
|| FR_REGNO_P (regno));
|
||||
})
|
||||
|
||||
;; True if OP is a nonimmediate operand that is (or could be) a GR reg.
|
||||
(define_predicate "gr_nonimmediate_operand"
|
||||
(match_operand 0 "nonimmediate_operand")
|
||||
{
|
||||
unsigned int regno;
|
||||
|
||||
if (GET_CODE (op) == MEM)
|
||||
return true;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
regno = REGNO (op);
|
||||
return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
|
||||
})
|
||||
|
||||
;; True if OP is a nonimmediate operand that is (or could be) a FR reg.
|
||||
(define_predicate "fr_nonimmediate_operand"
|
||||
(match_operand 0 "nonimmediate_operand")
|
||||
{
|
||||
unsigned int regno;
|
||||
|
||||
if (GET_CODE (op) == MEM)
|
||||
return true;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
regno = REGNO (op);
|
||||
return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
|
||||
})
|
||||
|
||||
;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg.
|
||||
(define_predicate "grfr_nonimmediate_operand"
|
||||
(match_operand 0 "nonimmediate_operand")
|
||||
{
|
||||
unsigned int regno;
|
||||
|
||||
if (GET_CODE (op) == MEM)
|
||||
return true;
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
regno = REGNO (op);
|
||||
return (regno >= FIRST_PSEUDO_REGISTER
|
||||
|| GENERAL_REGNO_P (regno)
|
||||
|| FR_REGNO_P (regno));
|
||||
})
|
||||
|
||||
;; True if OP is a GR register operand, or zero.
|
||||
(define_predicate "gr_reg_or_0_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "op == const0_rtx"))))
|
||||
|
||||
;; True if OP is a GR register operand, or a 5 bit immediate operand.
|
||||
(define_predicate "gr_reg_or_5bit_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))))
|
||||
|
||||
;; True if OP is a GR register operand, or a 6 bit immediate operand.
|
||||
(define_predicate "gr_reg_or_6bit_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_M (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a GR register operand, or an 8 bit immediate operand.
|
||||
(define_predicate "gr_reg_or_8bit_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_K (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a GR/FR register operand, or an 8 bit immediate operand.
|
||||
(define_predicate "grfr_reg_or_8bit_operand"
|
||||
(ior (match_operand 0 "grfr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_K (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a register operand, or an 8 bit adjusted immediate operand.
|
||||
(define_predicate "gr_reg_or_8bit_adjusted_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_L (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a register operand, or is valid for both an 8 bit
|
||||
;; immediate and an 8 bit adjusted immediate operand. This is necessary
|
||||
;; because when we emit a compare, we don't know what the condition will be,
|
||||
;; so we need the union of the immediates accepted by GT and LT.
|
||||
(define_predicate "gr_reg_or_8bit_and_adjusted_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_K (INTVAL (op))
|
||||
&& CONST_OK_FOR_L (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a register operand, or a 14 bit immediate operand.
|
||||
(define_predicate "gr_reg_or_14bit_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_I (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a register operand, or a 22 bit immediate operand.
|
||||
(define_predicate "gr_reg_or_22bit_operand"
|
||||
(ior (match_operand 0 "gr_register_operand")
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_J (INTVAL (op))"))))
|
||||
|
||||
;; True if OP is a 7 bit immediate operand.
|
||||
(define_predicate "dshift_count_operand"
|
||||
(and (match_code "const_int")
|
||||
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 128")))
|
||||
|
||||
;; True if OP is a 6 bit immediate operand.
|
||||
(define_predicate "shift_count_operand"
|
||||
(and (match_code "const_int")
|
||||
(match_test "CONST_OK_FOR_M (INTVAL (op))")))
|
||||
|
||||
;; True if OP is a 5 bit immediate operand.
|
||||
(define_predicate "shift_32bit_count_operand"
|
||||
(and (match_code "const_int")
|
||||
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))
|
||||
|
||||
;; True if OP is one of the immediate values 2, 4, 8, or 16.
|
||||
(define_predicate "shladd_operand"
|
||||
(and (match_code "const_int")
|
||||
(match_test "INTVAL (op) == 2 || INTVAL (op) == 4 ||
|
||||
INTVAL (op) == 8 || INTVAL (op) == 16")))
|
||||
|
||||
;; True if OP is one of the immediate values -16, -8, -4, -1, 1, 4, 8, 16.
|
||||
(define_predicate "fetchadd_operand"
|
||||
(and (match_code "const_int")
|
||||
(match_test "INTVAL (op) == -16 || INTVAL (op) == -8 ||
|
||||
INTVAL (op) == -4 || INTVAL (op) == -1 ||
|
||||
INTVAL (op) == 1 || INTVAL (op) == 4 ||
|
||||
INTVAL (op) == 8 || INTVAL (op) == 16")))
|
||||
|
||||
|
||||
;; True if OP is a floating-point constant zero, one, or a register.
|
||||
(define_predicate "fr_reg_or_fp01_operand"
|
||||
(ior (match_operand 0 "fr_register_operand")
|
||||
(and (match_code "const_double")
|
||||
(match_test "CONST_DOUBLE_OK_FOR_G (op)"))))
|
||||
|
||||
;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs.
|
||||
(define_predicate "xfreg_or_fp01_operand"
|
||||
(and (match_operand 0 "fr_reg_or_fp01_operand")
|
||||
(not (match_code "subreg"))))
|
||||
|
||||
;; True if this is a comparison operator, which accepts a normal 8-bit
|
||||
;; signed immediate operand.
|
||||
(define_predicate "normal_comparison_operator"
|
||||
(match_code "eq,ne,gt,le,gtu,leu"))
|
||||
|
||||
;; True if this is a comparison operator, which accepts an adjusted 8-bit
|
||||
;; signed immediate operand.
|
||||
(define_predicate "adjusted_comparison_operator"
|
||||
(match_code "lt,ge,ltu,geu"))
|
||||
|
||||
;; True if this is a signed inequality operator.
|
||||
(define_predicate "signed_inequality_operator"
|
||||
(match_code "ge,gt,le,lt"))
|
||||
|
||||
;; True if this operator is valid for predication.
|
||||
(define_predicate "predicate_operator"
|
||||
(match_code "eq,ne"))
|
||||
|
||||
;; True if this operator can be used in a conditional operation.
|
||||
(define_predicate "condop_operator"
|
||||
(match_code "plus,minus,ior,xor,and"))
|
||||
|
||||
;; These three are hardware registers that can only be addressed in
|
||||
;; DImode. It's not strictly necessary to test mode == DImode here,
|
||||
;; but it makes decent insurance against someone writing a
|
||||
;; match_operand wrong.
|
||||
|
||||
;; True if this is the ar.lc register.
|
||||
(define_predicate "ar_lc_reg_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM")))
|
||||
|
||||
;; True if this is the ar.ccv register.
|
||||
(define_predicate "ar_ccv_reg_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM")))
|
||||
|
||||
;; True if this is the ar.pfs register.
|
||||
(define_predicate "ar_pfs_reg_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM")))
|
||||
|
||||
;; True if OP is valid as a base register in a reg + offset address.
|
||||
;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected
|
||||
;; checks from pa.c basereg_operand as well? Seems to be OK without them
|
||||
;; in test runs.
|
||||
(define_predicate "basereg_operand"
|
||||
(match_operand 0 "register_operand")
|
||||
{
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
return REG_POINTER (op);
|
||||
})
|
||||
|
Loading…
Reference in New Issue