OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

re PR target/23816 (ICE in extract_insn, at recog.c:2084) 

PR target/23816
        * config/i386/sse.md (*ieee_sminv4sf3, *ieee_smaxv4sf3)
        (*ieee_sminv2df3, *ieee_smaxv2df3): New insn patterns.

From-SVN: r104236
This commit is contained in:
Uros Bizjak 2005-09-13 21:02:04 +02:00 committed by Richard Henderson
parent f81ab296b9
commit 79e72538bf
4 changed files with 70 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2005-09-13 Uros Bizjak <uros@kss-loka.si>
PR target/23816
* config/i386/sse.md (*ieee_sminv4sf3, *ieee_smaxv4sf3)
(*ieee_sminv2df3, *ieee_smaxv2df3): New insn patterns.
2005-09-13 Ian Lance Taylor <ian@airs.com>
* loop-doloop.c (doloop_modify): Use GEN_INT to pass an rtx rather

46
gcc/config/i386/sse.md
View File

@ -589,6 +589,52 @@
[(set_attr "type" "sse")
(set_attr "mode" "SF")])
;; These versions of the min/max patterns implement exactly the operations
;; min = (op1 < op2 ? op1 : op2)
;; max = (!(op1 < op2) ? op1 : op2)
;; Their operands are not commutative, and thus they may be used in the
;; presence of -0.0 and NaN.
(define_insn "*ieee_sminv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm")]
UNSPEC_IEEE_MIN))]
"TARGET_SSE"
"minps\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "V4SF")])
(define_insn "*ieee_smaxv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm")]
UNSPEC_IEEE_MAX))]
"TARGET_SSE"
"maxps\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "V4SF")])
(define_insn "*ieee_sminv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm")]
UNSPEC_IEEE_MIN))]
"TARGET_SSE2"
"minpd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "V2DF")])
(define_insn "*ieee_smaxv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm")]
UNSPEC_IEEE_MAX))]
"TARGET_SSE2"
"maxpd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "V2DF")])
(define_insn "sse3_addsubv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF

9
gcc/testsuite/gcc.dg/vect/pr23816-1.c Normal file
View File

@ -0,0 +1,9 @@
/* { dg-do compile } */
void
foo (float a[32], float b[2][32])
{
int i;
for (i = 0; i < 32; i++)
a[i] = (b[0][i] > b[1][i]) ? b[0][i] : b[1][i];
}

9
gcc/testsuite/gcc.dg/vect/pr23816-2.c Normal file
View File

@ -0,0 +1,9 @@
/* { dg-do compile } */
void
foo (double a[32], double b[2][32])
{
int i;
for (i = 0; i < 32; i++)
a[i] = (b[0][i] > b[1][i]) ? b[0][i] : b[1][i];
}