Enable AVX-512 VPOPCNTD/VPOPCNTQ instructions.
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET, OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET): New. * config.gcc: Add avx512vpopcntdqintrin.h. * config/i386/avx512vpopcntdqintrin.h: New. * config/i386/cpuid.h (bit_AVX512VPOPCNTDQ): New. * config/i386/i386-builtin-types.def: Add new types. * config/i386/i386-builtin.def (__builtin_ia32_vpopcountd_v16si, __builtin_ia32_vpopcountd_v16si_mask, __builtin_ia32_vpopcountq_v8di, __builtin_ia32_vpopcountq_v8di_mask): New. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AVX512VPOPCNTDQ__. * config/i386/i386.c (ix86_target_string): Add -mavx512vpopcntdq. (PTA_AVX512VPOPCNTDQ): Define. * config/i386/i386.h (TARGET_AVX512VPOPCNTDQ, TARGET_AVX512VPOPCNTDQ_P): Define. * config/i386/i386.opt: Add mavx512vpopcntdq. * config/i386/immintrin.h: Include avx512vpopcntdqintrin.h. * config/i386/sse.md (define_insn "vpopcount<mode><mask_name>"): New. libgcc/ * config/i386/cpuinfo.h (processor_features): Add FEATURE_AVX512VPOPCNTDQ. * config/i386/cpuinfo.c (get_available_features): Habdle new feature. gcc/testsuite/ * g++.dg/other/i386-2.C: Add -mavx512vpopcntdq. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/builtin_target.c: Handle new option. * gcc.target/i386/funcspec-56.inc: Test new attributes. * gcc.target/i386/avx512vpopcntdq-vpopcntd.c: New test. * gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto. From-SVN: r244263
This commit is contained in:
Andrew Senkevich
Kirill Yukhin
parent
f9a27859df
commit
79fc8ffe6c
@ -1,3 +1,24 @@
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2017-01-10 Andrew Senkevich <andrew.senkevich@intel.com>
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* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET,
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OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET): New.
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* config.gcc: Add avx512vpopcntdqintrin.h.
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* config/i386/avx512vpopcntdqintrin.h: New.
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* config/i386/cpuid.h (bit_AVX512VPOPCNTDQ): New.
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* config/i386/i386-builtin-types.def: Add new types.
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* config/i386/i386-builtin.def (__builtin_ia32_vpopcountd_v16si,
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__builtin_ia32_vpopcountd_v16si_mask, __builtin_ia32_vpopcountq_v8di,
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__builtin_ia32_vpopcountq_v8di_mask): New.
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* config/i386/i386-c.c (ix86_target_macros_internal): Define
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__AVX512VPOPCNTDQ__.
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* config/i386/i386.c (ix86_target_string): Add -mavx512vpopcntdq.
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(PTA_AVX512VPOPCNTDQ): Define.
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* config/i386/i386.h (TARGET_AVX512VPOPCNTDQ,
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TARGET_AVX512VPOPCNTDQ_P): Define.
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* config/i386/i386.opt: Add mavx512vpopcntdq.
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* config/i386/immintrin.h: Include avx512vpopcntdqintrin.h.
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* config/i386/sse.md (define_insn "vpopcount<mode><mask_name>"): New.
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2017-01-01 Jan Hubicka <hubicka@ucw.cz>
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PR middle-end/77484
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@ -78,6 +78,7 @@ along with GCC; see the file COPYING3. If not see
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(OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET)
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#define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS
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#define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW
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#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ
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#define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
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#define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
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#define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
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@ -183,6 +184,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI
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#define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS
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#define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW
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#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ
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#define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
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#define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
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#define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
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@ -409,6 +411,8 @@ ix86_handle_option (struct gcc_options *opts,
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124FMAPS_UNSET;
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX5124VNNIW_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124VNNIW_UNSET;
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET;
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}
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return true;
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@ -481,6 +485,21 @@ ix86_handle_option (struct gcc_options *opts,
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}
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return true;
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case OPT_mavx512vpopcntdq:
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if (value)
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{
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET;
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
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}
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else
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{
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET;
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}
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return true;
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case OPT_mavx512dq:
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if (value)
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{
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@ -375,7 +375,8 @@ i[34567]86-*-*)
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avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h
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avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h
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avx512vbmivlintrin.h avx5124fmapsintrin.h avx5124vnniwintrin.h
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clwbintrin.h mwaitxintrin.h clzerointrin.h pkuintrin.h"
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avx512vpopcntdqintrin.h clwbintrin.h mwaitxintrin.h
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clzerointrin.h pkuintrin.h"
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;;
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x86_64-*-*)
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cpu_type=i386
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@ -397,7 +398,8 @@ x86_64-*-*)
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avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h
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avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h
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avx512vbmivlintrin.h avx5124fmapsintrin.h avx5124vnniwintrin.h
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clwbintrin.h mwaitxintrin.h clzerointrin.h pkuintrin.h"
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avx512vpopcntdqintrin.h clwbintrin.h mwaitxintrin.h
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clzerointrin.h pkuintrin.h"
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;;
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ia64-*-*)
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extra_headers=ia64intrin.h
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94
gcc/config/i386/avx512vpopcntdqintrin.h
Normal file
94
gcc/config/i386/avx512vpopcntdqintrin.h
Normal file
@ -0,0 +1,94 @@
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/* Copyright (C) 2017 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#if !defined _IMMINTRIN_H_INCLUDED
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# error "Never use <avx512vpopcntdqintrin.h> directly; include <x86intrin.h> instead."
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#endif
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#ifndef _AVX512VPOPCNTDQINTRIN_H_INCLUDED
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#define _AVX512VPOPCNTDQINTRIN_H_INCLUDED
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#ifndef __AVX512VPOPCNTDQ__
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#pragma GCC push_options
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#pragma GCC target("avx512vpopcntdq")
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#define __DISABLE_AVX512VPOPCNTDQ__
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#endif /* __AVX512VPOPCNTDQ__ */
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extern __inline __m512i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_popcnt_epi32 (__m512i __A)
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{
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return (__m512i) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
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}
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extern __inline __m512i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_popcnt_epi32 (__m512i __A, __mmask16 __U, __m512i __B)
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{
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return (__m512i) __builtin_ia32_vpopcountd_v16si_mask ((__v16si) __A,
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(__v16si) __B,
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(__mmask16) __U);
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}
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extern __inline __m512i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_maskz_popcnt_epi32 (__mmask16 __U, __m512i __A)
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{
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return (__m512i) __builtin_ia32_vpopcountd_v16si_mask ((__v16si) __A,
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(__v16si)
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_mm512_setzero_si512 (),
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(__mmask16) __U);
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}
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extern __inline __m512i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_popcnt_epi64 (__m512i __A)
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{
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return (__m512i) __builtin_ia32_vpopcountq_v8di ((__v8di) __A);
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}
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extern __inline __m512i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_popcnt_epi64 (__m512i __A, __mmask8 __U, __m512i __B)
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{
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return (__m512i) __builtin_ia32_vpopcountq_v8di_mask ((__v8di) __A,
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(__v8di) __B,
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(__mmask8) __U);
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}
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extern __inline __m512i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_maskz_popcnt_epi64 (__mmask8 __U, __m512i __A)
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{
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return (__m512i) __builtin_ia32_vpopcountq_v8di_mask ((__v8di) __A,
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(__v8di)
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_mm512_setzero_si512 (),
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(__mmask8) __U);
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}
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#ifdef __DISABLE_AVX512VPOPCNTDQ__
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#undef __DISABLE_AVX512VPOPCNTDQ__
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#pragma GCC pop_options
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#endif /* __DISABLE_AVX512VPOPCNTDQ__ */
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#endif /* _AVX512VPOPCNTDQINTRIN_H_INCLUDED */
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@ -54,6 +54,7 @@
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#define bit_SSE4a (1 << 6)
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#define bit_PRFCHW (1 << 8)
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#define bit_XOP (1 << 11)
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#define bit_AVX512VPOPCNTDQ (1 << 14)
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#define bit_LWP (1 << 15)
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#define bit_FMA4 (1 << 16)
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#define bit_TBM (1 << 21)
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@ -305,9 +305,11 @@ DEF_FUNCTION_TYPE (V8DF, V2DF)
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DEF_FUNCTION_TYPE (V16SI, V4SI)
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DEF_FUNCTION_TYPE (V16SI, V8SI)
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DEF_FUNCTION_TYPE (V16SI, V16SF)
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DEF_FUNCTION_TYPE (V16SI, V16SI)
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DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, UHI)
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DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, UQI)
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DEF_FUNCTION_TYPE (V8DI, PV8DI)
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DEF_FUNCTION_TYPE (V8DI, V8DI)
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DEF_FUNCTION_TYPE (DI, V2DI, INT)
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DEF_FUNCTION_TYPE (DOUBLE, V2DF, INT)
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@ -2527,6 +2527,10 @@ BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd, "__builtin
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BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd_mask, "__builtin_ia32_vp4dpwssd_mask", IX86_BUILTIN_4DPWSSD_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI)
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BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds, "__builtin_ia32_vp4dpwssds", IX86_BUILTIN_4DPWSSDS, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI)
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BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds_mask, "__builtin_ia32_vp4dpwssds_mask", IX86_BUILTIN_4DPWSSDS_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv16si, "__builtin_ia32_vpopcountd_v16si", IX86_BUILTIN_VPOPCOUNTDV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI)
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BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv16si_mask, "__builtin_ia32_vpopcountd_v16si_mask", IX86_BUILTIN_VPOPCOUNTDV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv8di, "__builtin_ia32_vpopcountq_v8di", IX86_BUILTIN_VPOPCOUNTQV8DI, UNKNOWN, (int) V8DI_FTYPE_V8DI)
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BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv8di_mask, "__builtin_ia32_vpopcountq_v8di_mask", IX86_BUILTIN_VPOPCOUNTQV8DI_MASK, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_UQI)
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BDESC_END (ARGS2, MPX)
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@ -380,6 +380,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
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def_or_undef (parse_in, "__AVX5124VNNIW__");
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if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
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def_or_undef (parse_in, "__AVX5124FMAPS__");
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if (isa_flag2 & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
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def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
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if (isa_flag & OPTION_MASK_ISA_FMA)
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def_or_undef (parse_in, "__FMA__");
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if (isa_flag & OPTION_MASK_ISA_RTM)
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@ -4320,6 +4320,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2, int flags,
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{
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{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
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{ "-mavx5124fmaps", OPTION_MASK_ISA_AVX5124FMAPS },
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{ "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ },
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};
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/* Flag options. */
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static struct ix86_target_opts flag_opts[] =
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@ -4919,6 +4920,7 @@ ix86_option_override_internal (bool main_args_p,
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#define PTA_PKU (HOST_WIDE_INT_1 << 59)
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#define PTA_AVX5124VNNIW (HOST_WIDE_INT_1 << 60)
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#define PTA_AVX5124FMAPS (HOST_WIDE_INT_1 << 61)
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#define PTA_AVX512VPOPCNTDQ (HOST_WIDE_INT_1 << 62)
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#define PTA_CORE2 \
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(PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \
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@ -5581,6 +5583,9 @@ ix86_option_override_internal (bool main_args_p,
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if (processor_alias_table[i].flags & PTA_AVX5124FMAPS
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&& !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_AVX5124FMAPS))
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX5124FMAPS;
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if (processor_alias_table[i].flags & PTA_AVX512VPOPCNTDQ
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&& !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_AVX512VPOPCNTDQ))
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VPOPCNTDQ;
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if (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))
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x86_prefetch_sse = true;
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@ -6625,6 +6630,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
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IX86_ATTR_ISA ("avx512vl", OPT_mavx512vl),
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IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps),
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IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
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IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
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IX86_ATTR_ISA ("mmx", OPT_mmmx),
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IX86_ATTR_ISA ("pclmul", OPT_mpclmul),
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IX86_ATTR_ISA ("popcnt", OPT_mpopcnt),
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@ -33300,6 +33306,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
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F_AVX512IFMA,
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F_AVX5124VNNIW,
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F_AVX5124FMAPS,
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F_AVX512VPOPCNTDQ,
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F_MAX
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};
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@ -33414,6 +33421,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
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{"avx512ifma",F_AVX512IFMA},
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{"avx5124vnniw",F_AVX5124VNNIW},
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{"avx5124fmaps",F_AVX5124FMAPS},
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{"avx512vpopcntdq",F_AVX512VPOPCNTDQ},
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};
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tree __processor_model_type = build_processor_model_struct ();
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@ -34891,8 +34899,10 @@ ix86_expand_args_builtin (const struct builtin_description *d,
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case V16SF_FTYPE_V4SF:
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||||
case V16SI_FTYPE_V4SI:
|
||||
case V16SI_FTYPE_V16SF:
|
||||
case V16SI_FTYPE_V16SI:
|
||||
case V16SF_FTYPE_V16SF:
|
||||
case V8DI_FTYPE_UQI:
|
||||
case V8DI_FTYPE_V8DI:
|
||||
case V8DF_FTYPE_V4DF:
|
||||
case V8DF_FTYPE_V2DF:
|
||||
case V8DF_FTYPE_V8DF:
|
||||
|
||||
@ -85,6 +85,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||
#define TARGET_AVX5124FMAPS_P(x) TARGET_ISA_AVX5124FMAPS_P(x)
|
||||
#define TARGET_AVX5124VNNIW TARGET_ISA_AVX5124VNNIW
|
||||
#define TARGET_AVX5124VNNIW_P(x) TARGET_ISA_AVX5124VNNIW_P(x)
|
||||
#define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ
|
||||
#define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x)
|
||||
#define TARGET_FMA TARGET_ISA_FMA
|
||||
#define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x)
|
||||
#define TARGET_SSE4A TARGET_ISA_SSE4A
|
||||
|
||||
@ -705,6 +705,10 @@ mavx5124vnniw
|
||||
Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save
|
||||
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation.
|
||||
|
||||
mavx512vpopcntdq
|
||||
Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags2) Save
|
||||
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation.
|
||||
|
||||
mfma
|
||||
Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
|
||||
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
|
||||
|
||||
@ -72,6 +72,8 @@
|
||||
|
||||
#include <avx5124vnniwintrin.h>
|
||||
|
||||
#include <avx512vpopcntdqintrin.h>
|
||||
|
||||
#include <shaintrin.h>
|
||||
|
||||
#include <lzcntintrin.h>
|
||||
|
||||
@ -19875,3 +19875,10 @@
|
||||
[(set_attr ("type") ("ssemuladd"))
|
||||
(set_attr ("prefix") ("evex"))
|
||||
(set_attr ("mode") ("TI"))])
|
||||
|
||||
(define_insn "vpopcount<mode><mask_name>"
|
||||
[(set (match_operand:VI48_512 0 "register_operand" "=v")
|
||||
(popcount:VI48_512
|
||||
(match_operand:VI48_512 1 "nonimmediate_operand" "vm")))]
|
||||
"TARGET_AVX512VPOPCNTDQ"
|
||||
"vpopcnt<ssemodesuffix>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}")
|
||||
|
||||
@ -1,3 +1,16 @@
|
||||
2017-01-10 Andrew Senkevich <andrew.senkevich@intel.com>
|
||||
|
||||
* g++.dg/other/i386-2.C: Add -mavx512vpopcntdq.
|
||||
* g++.dg/other/i386-3.C: Ditto.
|
||||
* gcc.target/i386/sse-12.c: Ditto.
|
||||
* gcc.target/i386/sse-13.c: Ditto.
|
||||
* gcc.target/i386/sse-22.c: Ditto.
|
||||
* gcc.target/i386/sse-23.c: Ditto.
|
||||
* gcc.target/i386/builtin_target.c: Handle new option.
|
||||
* gcc.target/i386/funcspec-56.inc: Test new attributes.
|
||||
* gcc.target/i386/avx512vpopcntdq-vpopcntd.c: New test.
|
||||
* gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto.
|
||||
|
||||
2017-01-09 Martin Sebor <msebor@redhat.com>
|
||||
|
||||
PR testsuite/79036
|
||||
|
||||
@ -1,11 +1,11 @@
|
||||
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
||||
/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
|
||||
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
||||
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
||||
popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h,
|
||||
avx5124vnniwintrin.h and mm_malloc.h.h are usable with
|
||||
-O -pedantic-errors. */
|
||||
avx5124vnniwintrin.h, avx512vpopcntdqintrin.h and mm_malloc.h.h are usable
|
||||
with -O -pedantic-errors. */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
|
||||
@ -1,10 +1,10 @@
|
||||
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
||||
/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
|
||||
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
||||
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
||||
popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h,
|
||||
avx5124vnniwintrin.h and mm_malloc.h are usable with
|
||||
-O -fkeep-inline-functions. */
|
||||
avx5124vnniwintrin.h, avx512vpopcntdqintrin.h and mm_malloc.h are
|
||||
usable with -O -fkeep-inline-functions. */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
20
gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c
Normal file
20
gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c
Normal file
@ -0,0 +1,20 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mavx512vpopcntdq" } */
|
||||
/* { dg-final { scan-assembler-times "vpopcntd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpopcntd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpopcntd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
extern __m512i z, z1;
|
||||
|
||||
int foo ()
|
||||
{
|
||||
__mmask16 msk;
|
||||
__m512i c = _mm512_popcnt_epi32 (z);
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm512_mask_popcnt_epi32 (z, msk, z1);
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm512_maskz_popcnt_epi32 (msk, z);
|
||||
asm volatile ("" : "+v" (c));
|
||||
}
|
||||
20
gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c
Normal file
20
gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c
Normal file
@ -0,0 +1,20 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mavx512vpopcntdq" } */
|
||||
/* { dg-final { scan-assembler-times "vpopcntq\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpopcntq\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpopcntq\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
extern __m512i z, z1;
|
||||
|
||||
int foo ()
|
||||
{
|
||||
__mmask8 msk;
|
||||
__m512i c = _mm512_popcnt_epi64 (z);
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm512_mask_popcnt_epi64 (z, msk, z1);
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm512_maskz_popcnt_epi64 (msk, z);
|
||||
asm volatile ("" : "+v" (c));
|
||||
}
|
||||
@ -217,6 +217,8 @@ check_features (unsigned int ecx, unsigned int edx,
|
||||
assert (__builtin_cpu_supports ("avx5124vnniw"));
|
||||
if (edx & bit_AVX5124FMAPS)
|
||||
assert (__builtin_cpu_supports ("avx5124fmaps"));
|
||||
if (ecx & bit_AVX512VPOPCNTDQ)
|
||||
assert (__builtin_cpu_supports ("avx512vpopcntdq"));
|
||||
}
|
||||
}
|
||||
|
||||
@ -319,6 +321,8 @@ quick_check ()
|
||||
|
||||
assert (__builtin_cpu_supports ("avx5124fmaps") >= 0);
|
||||
|
||||
assert (__builtin_cpu_supports ("avx512vpopcntdq") >= 0);
|
||||
|
||||
/* Check CPU type. */
|
||||
assert (__builtin_cpu_is ("amd") >= 0);
|
||||
|
||||
|
||||
@ -30,6 +30,7 @@ extern void test_avx512pf(void) __attribute__((__target__("avx512pf")));
|
||||
extern void test_avx512cd(void) __attribute__((__target__("avx512cd")));
|
||||
extern void test_avx5124fmaps(void) __attribute__((__target__("avx5124fmaps")));
|
||||
extern void test_avx5124vnniw(void) __attribute__((__target__("avx5124vnniw")));
|
||||
extern void test_avx512vpopcntdq(void) __attribute__((__target__("avx512vpopcntdq")));
|
||||
extern void test_bmi (void) __attribute__((__target__("bmi")));
|
||||
extern void test_bmi2 (void) __attribute__((__target__("bmi2")));
|
||||
|
||||
@ -63,6 +64,7 @@ extern void test_bo_avx512pf(void) __attribute__((__target__("no-avx512pf")));
|
||||
extern void test_no_avx512cd(void) __attribute__((__target__("no-avx512cd")));
|
||||
extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps")));
|
||||
extern void test_no_avx5124vnniw(void) __attribute__((__target__("no-avx5124vnniw")));
|
||||
extern void test_no_avx512vpopcntdq(void) __attribute__((__target__("no-avx512vpopcntdq")));
|
||||
extern void test_no_bmi (void) __attribute__((__target__("no-bmi")));
|
||||
extern void test_no_bmi2 (void) __attribute__((__target__("no-bmi2")));
|
||||
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
popcntintrin.h and mm_malloc.h are usable
|
||||
with -O -std=c89 -pedantic-errors. */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */
|
||||
/* { dg-add-options bind_pic_locally } */
|
||||
|
||||
#include <mm_malloc.h>
|
||||
|
||||
@ -9,8 +9,8 @@
|
||||
are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h,
|
||||
mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h,
|
||||
tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h,
|
||||
avx5124fmapsintrin.h, avx5124vnniwintrin.h and mm_malloc.h
|
||||
that reference the proper builtin functions.
|
||||
avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h and
|
||||
mm_malloc.h that reference the proper builtin functions.
|
||||
|
||||
Defining away "extern" and "__inline" results in all of them being
|
||||
compiled as proper functions. */
|
||||
@ -101,7 +101,7 @@
|
||||
|
||||
|
||||
#ifndef DIFFERENT_PRAGMAS
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw")
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq")
|
||||
#endif
|
||||
|
||||
/* Following intrinsics require immediate arguments. They
|
||||
@ -218,7 +218,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1)
|
||||
|
||||
/* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */
|
||||
#ifdef DIFFERENT_PRAGMAS
|
||||
#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx5124fmaps,avx5124vnniw")
|
||||
#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx5124fmaps,avx5124vnniw,avx512vpopcntdq")
|
||||
#endif
|
||||
#include <immintrin.h>
|
||||
test_1 (_cvtss_sh, unsigned short, float, 1)
|
||||
|
||||
@ -8,8 +8,8 @@
|
||||
are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h,
|
||||
mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h,
|
||||
tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h,
|
||||
avx5124fmapsintrin.h, avx5124vnniwintrin.h and mm_malloc.h
|
||||
that reference the proper builtin functions.
|
||||
avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h
|
||||
and mm_malloc.h that reference the proper builtin functions.
|
||||
|
||||
Defining away "extern" and "__inline" results in all of them being
|
||||
compiled as proper functions. */
|
||||
@ -595,6 +595,6 @@
|
||||
#define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D)
|
||||
#define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D)
|
||||
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,clwb,mwaitx,clzero,pku")
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku")
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
@ -1,3 +1,10 @@
|
||||
2017-01-10 Andrew Senkevich <andrew.senkevich@intel.com>
|
||||
|
||||
* config/i386/cpuinfo.h (processor_features): Add
|
||||
FEATURE_AVX512VPOPCNTDQ.
|
||||
* config/i386/cpuinfo.c (get_available_features): Habdle new
|
||||
feature.
|
||||
|
||||
2017-01-04 Joseph Myers <joseph@codesourcery.com>
|
||||
|
||||
* config/mips/sfp-machine.h (_FP_CHOOSENAN): Always preserve NaN
|
||||
|
||||
@ -277,6 +277,8 @@ get_available_features (unsigned int ecx, unsigned int edx,
|
||||
features |= (1 << FEATURE_AVX5124VNNIW);
|
||||
if (edx & bit_AVX5124FMAPS)
|
||||
features |= (1 << FEATURE_AVX5124FMAPS);
|
||||
if (ecx & bit_AVX512VPOPCNTDQ)
|
||||
features |= (1 << FEATURE_AVX512VPOPCNTDQ);
|
||||
}
|
||||
|
||||
unsigned int ext_level;
|
||||
|
||||
@ -104,7 +104,8 @@ enum processor_features
|
||||
FEATURE_AVX512VBMI,
|
||||
FEATURE_AVX512IFMA,
|
||||
FEATURE_AVX5124VNNIW,
|
||||
FEATURE_AVX5124FMAPS
|
||||
FEATURE_AVX5124FMAPS,
|
||||
FEATURE_AVX512VPOPCNTDQ
|
||||
};
|
||||
|
||||
extern struct __processor_model
|
||||
|
||||
Loading…
Reference in New Issue
Block a user