200x-xx-xx Sandra Loosemore <sandra@codesourcery.com>
gcc/ 200x-xx-xx Sandra Loosemore <sandra@codesourcery.com> * longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add ColdFire alternatives. * config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro. * config/m68k/m68k.md (clzsi2): Define for ColdFire architectures that support ff1 instruction. From-SVN: r120959
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@ -1,3 +1,11 @@
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2007-01-19 Sandra Loosemore <sandra@codesourcery.com>
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* longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add
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ColdFire alternatives.
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* config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro.
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* config/m68k/m68k.md (clzsi2): Define for ColdFire
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architectures that support ff1 instruction.
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2007-01-19 Richard Sandiford <richard@codesourcery.com>
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Julian Brown <julian@codesourcery.com>
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@ -1006,6 +1006,9 @@ __transfer_from_trampoline () \
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#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
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/* The ColdFire FF1 instruction returns 32 for zero. */
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#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
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#define STORE_FLAG_VALUE (-1)
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#define Pmode SImode
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@ -3961,6 +3961,15 @@
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return "f<FP:prec>abs%.<FP:prec> %1,%0";
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})
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;; bit indexing instructions
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;; ColdFire ff1 instruction implements clz.
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(define_insn "clzsi2"
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[(set (match_operand:SI 0 "register_operand" "=d")
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(clz:SI (match_operand:SI 1 "register_operand" "0")))]
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"TARGET_ISAAPLUS || TARGET_ISAC"
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"ff1 %0")
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;; one complement instructions
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;; "one_cmpldi2" is mainly here to help combine().
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@ -521,6 +521,11 @@ UDItype __umulsidi3 (USItype, USItype);
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__asm__ ("bfffo %1{%b2:%b2},%0" \
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: "=d" ((USItype) (count)) \
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: "od" ((USItype) (x)), "n" (0))
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/* Some ColdFire architectures have a ff1 instruction supported via
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__builtin_clz. */
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#elif defined (__mcfisaaplus__) || defined (__mcfisac__)
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#define count_leading_zeros(count,x) ((count) = __builtin_clz (x))
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#define COUNT_LEADING_ZEROS_0 32
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#endif
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#endif /* mc68000 */
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