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Fix sparc regression due to recent movcc pattern changes. 

PR target/49965
	* config/sparc/sparc.c (sparc_expand_conditional_move): Handle the
	fact that sparc_emit_float_lib_cmp modifies the comparison in
	operands[1].

From-SVN: r180982
This commit is contained in:
David S. Miller 2011-11-04 20:25:59 +00:00 committed by David S. Miller
parent 801fe0bb11
commit 7a83e5bc55
2 changed files with 15 additions and 7 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,10 @@
2011-11-03 David S. Miller <davem@davemloft.net>
PR target/49965
* config/sparc/sparc.c (sparc_expand_conditional_move): Handle the
fact that sparc_emit_float_lib_cmp modifies the comparison in
operands[1].
2011-11-05 Ralf Corsépius <ralf.corsepius@rtems.org>
* config/lm32/t-rtems: New.
@ -67,7 +74,7 @@
(avr_init_builtin_int24): New static function to define built-in
24-bit types __int24 and __uint24.
(avr_init_builtins): Use it.
2011-11-04 Thomas Doerfler <thomas.doerfler@embedded-brains.de>
PR target/50989

13
gcc/config/sparc/sparc.c
View File

@ -11509,12 +11509,16 @@ sparc_expand_conditional_move (enum machine_mode mode, rtx *operands)
rtx cc_reg, dst, cmp;
cmp = operands[1];
cmp_mode = GET_MODE (XEXP (cmp, 0));
if (cmp_mode == DImode && !TARGET_ARCH64)
if (GET_MODE (XEXP (cmp, 0)) == DImode && !TARGET_ARCH64)
return false;
dst = operands[0];
if (GET_MODE (XEXP (cmp, 0)) == TFmode && !TARGET_HARD_QUAD)
cmp = sparc_emit_float_lib_cmp (XEXP (cmp, 0), XEXP (cmp, 1), rc);
cmp_mode = GET_MODE (XEXP (cmp, 0));
rc = GET_CODE (cmp);
dst = operands[0];
if (! rtx_equal_p (operands[2], dst)
&& ! rtx_equal_p (operands[3], dst))
{
@ -11533,9 +11537,6 @@ sparc_expand_conditional_move (enum machine_mode mode, rtx *operands)
rc = reverse_condition (rc);
}
if (cmp_mode == TFmode && !TARGET_HARD_QUAD)
cmp = sparc_emit_float_lib_cmp (XEXP (cmp, 0), XEXP (cmp, 1), rc);
if (XEXP (cmp, 1) == const0_rtx
&& GET_CODE (XEXP (cmp, 0)) == REG
&& cmp_mode == DImode