i386.md (*addsi3_cc): Renamed from addcsi3.

* i386.md (*addsi3_cc): Renamed from addcsi3.
        (*addsi3_carry): Renamed from addxsi3.
        (*subsi3_cc): Renamed from subcsi3.
        (*subsi3_carry): Renamed from subxsi3.
        (*xorqi_cc_1): Renamed from xorcqi_1.
        (xorqi_cc_ext_1): Renamed from xorcqi_ext_1.
        * i386.c (ix86_expand_fp_compare): Update for xorqi_cc_ext_1.

From-SVN: r29952
This commit is contained in:
Richard Henderson 1999-10-13 13:33:42 -07:00 committed by Richard Henderson
parent a13c82d439
commit 7abd4e0091
3 changed files with 17 additions and 7 deletions

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@ -1,3 +1,13 @@
Wed Oct 13 13:30:34 1999 Richard Henderson <rth@cygnus.com>
* i386.md (*addsi3_cc): Renamed from addcsi3.
(*addsi3_carry): Renamed from addxsi3.
(*subsi3_cc): Renamed from subcsi3.
(*subsi3_carry): Renamed from subxsi3.
(*xorqi_cc_1): Renamed from xorcqi_1.
(xorqi_cc_ext_1): Renamed from xorcqi_ext_1.
* i386.c (ix86_expand_fp_compare): Update for xorqi_cc_ext_1.
Wed Oct 13 13:10:46 1999 Richard Henderson <rth@cygnus.com> Wed Oct 13 13:10:46 1999 Richard Henderson <rth@cygnus.com>
* Makefile.in (ggc-common.o): Depend on RTL_H not RTL_BASE_H. * Makefile.in (ggc-common.o): Depend on RTL_H not RTL_BASE_H.

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@ -4056,7 +4056,7 @@ ix86_expand_fp_compare (code, op0, op1, unordered)
break; break;
case NE: case NE:
emit_insn (gen_andqi_ext_0 (tmp, tmp, GEN_INT (0x45))); emit_insn (gen_andqi_ext_0 (tmp, tmp, GEN_INT (0x45)));
emit_insn (gen_xorcqi_ext_1 (tmp, tmp, GEN_INT (0x40))); emit_insn (gen_xorqi_cc_ext_1 (tmp, tmp, GEN_INT (0x40)));
code = NE; code = NE;
break; break;
default: default:

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@ -2965,7 +2965,7 @@
split_di (operands+1, 1, operands+1, operands+4); split_di (operands+1, 1, operands+1, operands+4);
split_di (operands+2, 1, operands+2, operands+5);") split_di (operands+2, 1, operands+2, operands+5);")
(define_insn "addcsi3" (define_insn "*addsi3_cc"
[(set (reg:CC 17) (plus:CC (match_operand:SI 1 "nonimmediate_operand" "%0,0") [(set (reg:CC 17) (plus:CC (match_operand:SI 1 "nonimmediate_operand" "%0,0")
(match_operand:SI 2 "general_operand" "ri,rm"))) (match_operand:SI 2 "general_operand" "ri,rm")))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
@ -2974,7 +2974,7 @@
"add{l}\\t{%2, %0|%0, %2}" "add{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")]) [(set_attr "type" "alu")])
(define_insn "addxsi3" (define_insn "*addsi3_carry"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
(plus:SI (match_operand:SI 2 "general_operand" "ri,rm") (plus:SI (match_operand:SI 2 "general_operand" "ri,rm")
@ -3512,7 +3512,7 @@
split_di (operands+1, 1, operands+1, operands+4); split_di (operands+1, 1, operands+1, operands+4);
split_di (operands+2, 1, operands+2, operands+5);") split_di (operands+2, 1, operands+2, operands+5);")
(define_insn "subcsi3" (define_insn "*subsi3_cc"
[(set (reg:CC 17) (minus:CC (match_operand:SI 1 "nonimmediate_operand" "0,0") [(set (reg:CC 17) (minus:CC (match_operand:SI 1 "nonimmediate_operand" "0,0")
(match_operand:SI 2 "general_operand" "ri,rm"))) (match_operand:SI 2 "general_operand" "ri,rm")))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
@ -3521,7 +3521,7 @@
"sub{l}\\t{%2, %0|%0, %2}" "sub{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")]) [(set_attr "type" "alu")])
(define_insn "subxsi3" (define_insn "*subsi3_carry"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0") (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(plus:SI (match_operand:SI 2 "general_operand" "ri,rm") (plus:SI (match_operand:SI 2 "general_operand" "ri,rm")
@ -4624,7 +4624,7 @@
xor{l}\\t{%k2, %k0|%k0, %k2}" xor{l}\\t{%k2, %k0|%k0, %k2}"
[(set_attr "type" "alu")]) [(set_attr "type" "alu")])
(define_insn "xorcqi_1" (define_insn "*xorqi_cc_1"
[(set (reg:CCNO 17) [(set (reg:CCNO 17)
(compare:CCNO (compare:CCNO
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0") (xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
@ -4636,7 +4636,7 @@
"xor{b}\\t{%2, %0|%0, %2}" "xor{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")]) [(set_attr "type" "alu")])
(define_insn "xorcqi_ext_1" (define_insn "xorqi_cc_ext_1"
[(set (reg:CCNO 17) [(set (reg:CCNO 17)
(compare:CCNO (compare:CCNO
(xor:SI (xor:SI